INTEGRATED CIRCUITS DATA Sil 74LV393 = = | Dual 4-bit binary ripple counter Product specification Supersedes data of 1997 Mar 04 IC24 Data Handbook Philips Semiconductors Di 1997 Jun 10 PHILIPSPhilips Semiconductors Product specification Dual 4-bit binary ripple counter 74LV393 FEATURES Optimized for Low Voltage applications: 1.0 to 3.6V Accepts TTL input levels between Voc = 2.7V and Voc = 3.6V Typical Vo_p (output ground bounce) < 0.8V @ Vcc = 3.3V, Tamb = 25C Typical Voyy (output Voy undershoot) > 2V @ Vcc = 3.3V, Tamb = 25C Two 4-bit binary counters with individual clocks Divide-by any binary module up to 28 in one package Two master resets to clear each 4-bit counter individually Output capability: standard loc category: MSI QUICK REFERENCE DATA GND = OV; Tamb = 25C; t, =} $2.5 ns DESCRIPTION The 74LV393 is a lowvoltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT393. The 74LV393 is a dual 4-bit binary ripple counter with separate clocks (1CP, 2CP) and master reset (1MR, 2MR) inputs to each counter. The operation of each half of the 393 is the same as the 93 except no external clock connections are required. The counters are triggered by a HIGH-to-LOW transition of the clock inputs. The counter outputs are internally connected to provide clock inputs to succeeding stages. The outputs of the ripple counter do not change synchronously and should not be used for high-speed address decoding. The master resets are active-HIGH asynchronous inputs to each 4-bit counter identified by the 1 and 2 in the pin description. A HIGH level on the nMR input overrides the clock and sets the outputs LOW. SYMBOL PARAMETER CONDITIONS TYPICAL UNIT Propagation delay nCP to nQg 12 teHUtPLH nQ to nQn+1 C_ = 15pF 4 ns nMR to nQn Voc = 3.3V 11 fmax Maximum clock frequency 99 MHz Cc Input capacitance 3.5 pF Cpp Power dissipation capacitance per flip-flop V, = GND to Vgc 1 23 pF NOTE: 1. Cpp is used to determine the dynamic power dissipation (Pp in uW) Pp =Cpp X Voc? x ff +2 (CL x Voc? x fo) where: f, = input frequency in MHz; C_ = output load capacity in pF; fy = output frequency in MHz; Vcc = supply voltage in V; Z(CL xX Vec? x fy) = sum of the outputs. ORDERING INFORMATION PACKAGES TEMPERATURE RANGE | OUTSIDE NORTH AMERICA | NORTH AMERICA PKG. DWG. # 14-Pin Plastic DIL 40C to +125C 74LV393 N 74LV393 N SOT27-1 14-Pin Plastic SO 40C to +125C 74LV393 D 74LV393 D SOT108-1 14-Pin Plastic SSOP Type Il 40C to +125C 74LV393 DB 74LV393 DB SOT337-1 14-Pin Plastic TSSOP Type | 40C to +125C 74LV393 PW 74LV393PW DH SOT402-1 PIN CONFIGURATION PIN DESCRIPTION YW PIN {cP [| 14] Voo NUMBER SYMBOL FUNCTION 1MR | 2 13 | 2cP __ i 1,18 TGP, 2CP (HIGHS LOW edge-triggered) 1Q_ | 3 12] 2MR ; Asynchronous master reset inputs 10, | 4 411 2Qo 2,12 1MR, 2MR (active HIGH) mes es 3, 4,5, 6 1Q0 10.123 | Flip-flop outputs 1a, [e [3] 202 11,10,9,8 | 2Q9 to 2Q3 P-Hop outp GND | 7 8] 203 7 GND Ground (OV) SVo00672 14 Vec Positive supply voltage 1998 Jun 10 853-1936 19545Philips Semiconductors Product specification Dual 4-bit binary ripple counter 74LV393 LOGIC SYMBOL FUNCTIONAL DIAGRAM 1_ [CP 10 | 3 1 Ojicp 1a,/-3 FO 4-BIT to. | 4 4a, H4 BINARY , 1 RIPPLE 1Q2 | 5 1a 2 fima | COUNTER Jia, | 6 2 limr 1a; -6 13 |20P 2Qo | 41 138 OCj 2cP _2Q9 FH-11 4-BIT 2a, | 10 BINARY 5 2p 10 RIPPLE 205 | 9 2Q5 / 9 i2fomrn | COUNTER Jog, |g 12 J2mR 20; L8 SV00673 8V00675 LOGIC SYMBOL (IEEE/IEC) STATE DIAGRAM CTR4 6 3 2 CT=0 4 CT a 5 3 6 CTR4 6 11 12 CT=0 10 CT ON, 9 3 8 SV00674 SV00676 1998 Jun 10 COUNT SEQUENCE FOR 1 COUNTER OUTPUTS COUNT Qo Qy Qe Qs 0 L L L L 1 H L L L 2 L H L L 3 H H L L 4 L L H L 5 H L H L 6 L H H L 7 H H H L 8 L L L H 9 H L L H 10 L H L H 11 H H L H 12 L L H H 13 H L H H 14 L H H H 15 H H H HPhilips Semiconductors Product specification Dual 4-bit binary ripple counter 74LV393 LOGIC DIAGRAM are ar are are oo >t FFI eOr Fre eOr rs eoar FFr4 Rp Rp Rp Rp MR l>o ] l l ] Qo Qy Qe Q3 SV00677 RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT Voc DC supply voltage See Note 1 1.0 3.3 3.6 Vv V| Input voltage 0 - Voc Vv Vo Output voltage 0 - Voc Vv T. Operating ambient temperature range in free See DC and AC -40 +85 C amb air characteristics 40 +125 Voc = 1.0V to 2.0V - - 500 t,t Input rise and fall times Voc = 2.0V to 2.7V - - 200 ns/V Voc = 2.7V to 3.6V - - 100 NOTES: 1. The LV is guaranteed to function down to Voc = 1.0V (input levels GND or Voc); DC characteristics are guaranteed from Voc = 1.2V to Voc =3.6V. ABSOLUTE MAXIMUM RATINGS" 2 In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = OV). SYMBOL PARAMETER CONDITIONS RATING UNIT Voc DC supply voltage 0.5 to +4.6 Vv +k DC input diode current V, <-0.5 or Vi > Voc + 0.5V 20 mA +lox DC output diode current Vo < 0.5 or Vo > Veco + 0.5V 50 mA DC output source or sink current _ tlo - standard outputs 0.5V < Vo < Voc + 0.5V 25 mA DC Vcc or GND current for types with + IGN standard outputs 50 mA Tetg Storage temperature range 65 to +150 C Power dissipation per package for temperature range: 40 to +125C Pp plastic DIL above +70C derate linearly with 12 mW/K 750 mW TOT plastic mini-pack (SC) above +70C derate linearly with 8 mW/K 500 plastic shrink mini-pack (SSOP and TSSOP) above +60C derate linearly with 5.5 mW/K 400 NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1998 Jun 10Philips Semiconductors Product specification Dual 4-bit binary ripple counter 74LV393 DC CHARACTERISTICS FOR THE LV FAMILY Over recommended operating conditions. Voltages are referenced to GND (ground = OV). LIMITS SYMBOL PARAMETER TEST CONDITIONS -40C to +85C -40C to +125C UNIT MIN TYP! MAX MIN MAX Voc = 1.2V 0.9 0.9 HIGH level Input _ Vin voltage Voc = 2.0V 1.4 1.4 Vv Voc = 2.7 to 3.6V 2.0 2.0 Voc = 1.2V 0.3 0.3 LOW level Input VIL voltage Voc = 2.0V 0.6 0.6 Vv Voc = 2.7 to 3.6V 0.8 0.8 Vec = 1.2V; Vv, = Vin or ViL; -lo = 100A 1.2 HIGH level output Vec = 2.0V; Vv, = Vin or ViL; -lo = 100A 1.8 2.0 1.8 voltage, all outputs | VGq = 2.7V; Vj = Viy or ViL-lo = 100pA 25 27 25 Vou Vec = 3.0V; V| = Vin or VIL; -lo = 100A 2.8 3.0 2.8 Vv HIGH level output voltage; STANDARD Veco = 3.0V; V) = Vin or Vi_;-lo = 6MA 2.40 2.82 2.20 outputs Vec = 1.2V; V| = Vin or VIL; lo = 100A 0 LOW level output Vec = 2.0V; V| = Vin or VIL; lo = 100A 0 0.2 0.2 voltage; all outputs | Vo = 2.7V; Vj = Viyor Vit: lo = 100nA 0 0.2 0.2 VoL Vec = 3.0V; V| = Vin or VIL; lo = 100A 0 0.2 0.2 Vv LOW level output voltage; STANDARD Voc = 3.0V; V| = Vin or ViL; lo = 6MA 0.25 0.40 0.50 outputs Input leakage I current 9 Voc = 3.6V; V = Veco or GND 1.0 1.0 WA Quiescent supply _ ve poe loc current: MSI Vec = 3.6V; V| = Vec or GND; lo =0 20.0 160 pA Additional Alec quiescent supply Voc = 2.7V to 3.6V; V| = Voc 0.6V 500 850 pA current per input NOTE: 1. All typical values are measured at Tamp = 25C. 1998 Jun 10Philips Semiconductors Product specification Dual 4-bit binary ripple counter 74LV393 AC CHARACTERISTICS GND = OV; t, = t $ 2.5ns; C_ = 50pF; R_ = 1KQ CONDITION ums SYMBOL PARAMETER WAVEFORM 40 to +85 C 40 to +125 C | UNIT VoctV) MIN | TYP? | MAX | MIN | MAX 1.2 - 75 - 2.0 - 26 49 - 60 PHUAPLH rch tc no ed Figure 1 27 - 19 36 44 ms 3.010 36 142 29 - 35 1.2 - 25 - 2.0 - 9 17 - 20 tPHLUAPLH ror tenanat Figure 1 27 - 6 13 - 15 ns 3.010 36 52 10 - 12 1.2 - 70 - 2.0 - 24 44 - 54 PHL nM te nn ny Figure 2 27 = 18 33 = 40 ms 3.010 36 132 26 - 32 2.0 34 10 - 41 = tw har puise wan Figure 1 27 25 8 30 = ns 3.010 36 20 62 - 24 - 2.0 34 12 - 41 two | ae GH Figure 2 27 25 9 [| 3% | - ns 3.010 36 20 72 - 24 1.2 - 5 2.0 5 - 5 trem ve Figure 2 a7 5 = 5 = ns 3.010 36 5 12 - 5 2.0 14 53 - 12 fmax aise hequency Figure 1 27 19 72 - 16 - MHz 3.010 36 24 902 - 20 - NOTES: 1. All typical values are measured at Tamp = 25C 2. Typical values are measured at Voc = 3.3V 1998 Jun 10 6Philips Semiconductors Dual 4-bit binary ripple counter Product specification 74LV393 AC WAVEFORMS Vu = 1.5V at Voc 2 2.7V Vu =0.5 * Voc at Veco < 2.7V Vo and Voy are the typical output voltage drop that occur with the output load. Voc nCP INPUT GND - - - Vou nQ, OUTPUT SV00678 Figure 1. Clock (nCP) to output (1Qn, 2Qn) propagation delays, the clock pulse width, and the maximum clock frequency Veo --- - nMR INPUT GND Vec nCP INPUT GND ---frrc rrr rrr Vou nQ, OUTPUT VoL SV00679 TEST CIRCUIT Voc VI Vo PULSE GENERATOR D.U.T. 5OPF go = 4k RT 1 FT Test Circuit for switching times DEFINITIONS R_,_ = Load resistor C._ = Load capacitance includes jig and probe capacitance Rr = Termination resistance should be equal to Zgut of pulse generators. TEST Voc Vv, teLHAPHL <2.7V Vec 2.7-3.6V 2.7V svoo90t Figure 2. Master reset (nMR) pulse width, the master reset to output (Qn) propagation delays, and the master reset to clock (nCP) removal time 1998 Jun 10 Figure 3. Load circuitry for switching timesPhilips Semiconductors Dual 4-bit binary ripple counter Product specification 74LV393 DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1 oO c Sg Qa D & S oD a 0 5 10 mm De scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) A Ay Ao (1) (1) z (1) UNIT | max. | min. | max. b by D E e al L Me MH w max. 1.73 0.53 0.36 19.50 6.48 3.60 8.25 10.0 mm 42 0.51 32 1.13 0.38 0.23 18.55 6.20 2.54 7.62 3.05 7.80 8.3 0.254 22 . 0.068 | 0.021 0.014 0.77 0.26 0.14 0.32 0.39 inches 0.17 0.020 0.13 0.044 | 0015 0.009 0.73 0.24 0.10 0.30 0.12 0.31 0.33 0.01 0.087 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES VERSION PROJECTION | SUE DATE IEC JEDEC EIAJ 02-44-44 sot27-1 050G04 MO-001AA nt oeont 1 1998 Jun 10Philips Semiconductors Dual 4-bit binary ripple counter Product specification 74LV393 $014: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 Zpre RAAB AA A | | t {Ne Ao - __ - __ - _} -- _ - ___-_}_ f A Ay \\ 4 As) pin 1 index ' | t } } - f Fe I ain Lp [e] _ detail X 0 2.5 5mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT | max. | 41 | Az | As bp c Dp) | EY | e HE L Lp Q v w y z | 6 0.25 | 1.45 0.49 | 0.25 | 8.75 | 4.0 6.2 10 | 07 0.7 mm 11-75) o40 | 1.25 | 975 | 036 | 019 | 355] 38} 127] 5a} 1] o4 | oe | 279] 275] Ot | og | go . 0.0098] 0.057 0.019 |0.0098] 0.35 | 0.16 0.24 0.039 | 0.028 0.028| 0 inches | 0.069 |q 9939] 0.049 | 9-91 | 0.014 {0.0075} 0.34 | 0.15 | %9} 0.23 | %41 | 0.016 | 0.024 | 201 | 2-1 | 9-004 | 9 40 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN VERSION PROJECTION ISSUE DATE IEC JEDEC EIAJ 94+08-+13- SOT108-1 076E06S MS-012AB on 95.01.33 1998 Jun 10Philips Semiconductors Product specification Dual 4-bit binary ripple counter 74LV393 SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1 D E [A] TON [ \ ! . T | _\ ey _| 1 _J / | = oy] le He ole f= a- 7 14 8 v 1 | | ! ! tf 0 Ao sp ---+---++ Ay mn 4 As) a I pin 1 index { | 4 i 6 | soe f T <<_ | r| yi U : | p 0 2.5 5mm be scale DIMENSIONS (mm are the original dimensions) UNIT mex. A, | As | Az | bp e | DM) EM) e | HE L Lp | @ v w y | 2] 6 0.21 | 1.80 0.38 | 0.20] 64 | 54 7.9 1.03 | 0.9 14 | 8 mm | 20 | 905 | 1.65 | 25 | 025] 0.09] 60 | 52 | 2] 76 | 125] 063} 07 | 9% | 21] OT] Og | Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC EIAJ PROJECTION $OT337-1 MO-150AB a } coor ta 1998 Jun 10 10Philips Semiconductors Product specification Dual 4-bit binary ripple counter TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 D E A Pal | NN + f \ - cle -________J wy } : | \~ | ly] : He oles *| Z 14 8 I l | { | Q \ A (Az) 4-4, an j A pin 1 index | x 1 t | f re 1 Lp }< |_+] 1 7 [detail x] ae 0 2.5 5mm scale DIMENSIONS (mm are the original dimensions) A UNIT | ax | At | A2 | As | bp c pM) | EQ] e HE L Lp Q v w y Zz] 6 0.15 | 0.95 0.30 0.2 5.1 4.5 6.6 0.75 0.4 0.72 8 mm | 1-19 | o05 | 0.80] %? | 019] 0.1 | 49 | 43 1] 62 | 1 |oso] o3 | 2? | 218] O71 | o38 } 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC EIAJ PROJECTION $OT402-1 MO-153 a oe nog 1998 Jun 10 11Philips Semiconductors Product specification Dual 4-bit binary ripple counter 74LV393 DEFINITIONS Data Sheet Identification Product Status Definition Objective Specification Formative or in Design This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published ata later date. Philips Preliminary Specification Preproduction Product Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. seine, . This data sheet contains Final Specifications. Philips Semiconductors reserves the rightto make changes Product Specification Full Production . . oo | | F at any time without notice, in order to improve design and supply the best possible product. Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors Copyright Philips Electronics North America Corporation 1998 811 East Arques Avenue All rights reserved. Printed in U.S.A. P.O. Box 3409 Sunnyvale, California 94088-3409 print code Date of release: 05-96 Telephone 800-234-7381 Document order number: 9397-750-04451 Lett make things betew Semiconductors E> PH I LI PS