1
IDT74FST3245
OCTAL BUS SWITCH COMMERCIAL TEMPERATURE RANGE
OCTOBER 1999
1999 Integrated Device Technology, Inc. DSC-5520/-c
IDT74FST3257
COMMERCIAL TEMPERATURE RANGE
QUAD 2:1 MUX/DEMUX
BUS SWITCH
DESCRIPTION:
The FST3257 belongs to IDT's family of Bus switches. Bus switch
devices perform the function of connecting or isolating two ports without
providing any inherent current sink or source capability. Thus they
generate little or no noise of their own while providing a low resistance path
for an external driver. These devices connect input and output ports through
an n-channel FET. When the gate-to-source junction of this FET is
adequately forward-biased the device conducts or the resistance between
input and output ports is small. Without adequate bias on the gate-to-source
junction of the FET, the FET is turned off, therefore with no VCC applied, the
device has hot insertion capability.
The low on-resistance and simplicity of the connection between input
and output ports reduces the delay in this path to close to zero.
The FST3257 provides a 4-bit 2:1 multiplexer/demultiplexer. The S pin
controls the mux select and the OE pin serves as the switch enable.
1B1
4A
S
OE
3A
2A
1A
1B2
2B1
2B2
3B1
3B2
4B1
4B25
6
7
8
1
2
3
4
14
13
12
11
10
9
1B1
1B2
1A
S
2B1
2B2
2A
GND
4B1
4B2
4A
3B1
3B2
3A
Vcc
SO16-1
SO16-7
15
16
OE
SOIC/ QSOP
TOP VIEW
FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATION
FEATURES:
− Bus switches provide zero delay paths
− Extended commercial range of –40°C to +85°C
− Low switch on-resistance: 5Ω
− TTL-compatible input and output levels
− ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
− Available in QSOP and SOIC Packages
2
COMMERCIAL TEMPERATURE RANGE
IDT74FST3245
OCTAL BUS SWITCH
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Rating Max. Unit
VTERM(2) Terminal Voltage with Respect to GND –0.5 to +7 V
TSTG Storage Temperature –65 to +150 °C
IOUT Maximum Continuous Channel Current 128 mA
FST LINK
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other c onditions above t hose indicated in the operational s ections
of this specification is not implied. Exposure to absolute maximum
rating condit i ons for extended periods may affec t reliability.
2. Vcc, Control, and Switch terminals.
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Measured by voltage drop between ports at indicated current through the switch.
CAPACITANCE (1)
Symbol Parameter Conditions(2) Typ. Unit
CIN Control Input Capacitance 4 pF
CI/O Switch Input/Output
Capacitance Switch Off pF
NOTES:
1. Capacitance is c haracteriz ed but not tes ted.
2. TA = 25°C, f = 1MHz, VIN = 0V, VOUT = 0V
PIN DESCRIPTION
Pin Names I/O Description
xB1 I/O Demultiplexed Port 1
xB2 I/O Demultiplexed Port 2
OE I Switch Enable (Active Low)
S I Mux Select
xA I/O Multiplexed Port
FUNCTIONAL TABLE (1)
S OE Function
X H Disconnect
LL 1
A to 1B1, 2A to 2B1, 3A to 3B1 and 4B to 4B1
HL 1
A to 1B2, 2A to 2B2, 3A to 3B2 and 4B to 4B2
NOTE:
1. H = HIGH
L = LOW
X = Don’t Care
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Conditions: TA = -40°C to +85°C, VCC = 5.0V ±5%
Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit
VIH Input HIGH Voltage Guaranteed Logic HIGH for Control Inputs 2 — — V
VIL Input LOW Voltage Guaranteed Logic LOW for Control Inputs — — 0.8 V
IIH Input HIGH Current VCC = Max. VI = VCC ——±1µA
I
IL Input LOW Voltage VI = GND — — ±1
IOZH High Impedance Output Current VCC = Max. VO = VCC ——±1µA
I
OZL (3-State Output pins) VO = GND — — ±1
IOS Short Circuit Current VCC = Max., VO = GND(3) — 300 — mA
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA — –0.7 –1.2 V
RON Switch On Resistance(4) VCC = Min., VIN = 0.0V,
ION = 30mA —57Ω
V
CC = Min., VIN = 2.4V,
ION = 15mA —1015Ω
I
OFF Input/Output Power Off Leakage VCC = 0V, VIN or VO ≤ 4.5V — — ±1 µA
ICC Quiescent Power Supply Current VCC = Max., VI = GND or VCC —0.13µA
FCT LINK
3
IDT74FST3245
OCTAL BUS SWITCH COMMERCIAL TEMPERATURE RANGE
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fiN)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fi = Input Frequency
N = Number of Switches Toggling at fi
All currents are in milliamps and all frequencies are in megahertz.
POWER SUPPLY CHARACTERISTICS
Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit
∆ICC Quiescent Power Supply Current
TTL Inputs HIGH VCC = Max.
VIN = 3.4V(3) —0.51.5mA
I
CCD Dynamic Power Supply Current(4) VCC = Max.
Outputs Open VIN = VCC
VIN = GND —3040µA/
MHz/
Enable Pin Toggling
50% Duty Cycle Switch
ICTotal Power Supply Current(6) VCC = Max.
Outputs Open
Enable Pin Toggling
VIN = VCC
VIN = GND —1.21.6mA
(4 Switches Toggling)
fi = 10MHz
50% Duty Cycle
VIN = 3.4
VIN = GND —1.52.4
NOTES:
1. See test circuit and waveforms.
2. Minimum limits guaranteed but not tested.
3. This parameter is guaranteed by design but not tested.
4. The bus switch contributes no propagation delay other than the RC delay of the on resistance of the switch and the load capacitance. The time constant
for the switch alone is of the order of 0.25 ns for 50 pF load. Since this time is constant and much smaller than the rise/fall times of typical driving signals,
it adds very little propagation delay to the system. Propagation delay of the bus switch when used in a system is determined by the driving circuit on
the driving side of the switch and its interaction with the load on the driven side.
5. Measured at switch turn off, load = 50 pF in parallel with 10 mΩ scope probe, VIN = 0.0 volts.
6. Measured at switch turn off through bus multiplexer, (e.g.- B1 to A = > B2 to A), load = 50 pF in parallel with 10 MΩ scope probe, VIN at A = 0.0 volts. Charge
injection is reduced because the injection from the turn off of the B1 to A switch is compensated by the turn on of the B 2 to A switch.
7. Characterized parameter. Not 100% tested.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Conditions: TA = -40°C to +85°C, VCC = 5.0V ±5%
Symbol Description Condition(1) Min.(2) Typ. Max. Unit
tPLH
tPHL Data Propagation Delay
A to B, B to A(3,4) CL = 50pF
RL = 500Ω— — 0.25 ns
tPLH
tPHL Switch Multiplex Delay
S to A or B 1.5 — 5.2 ns
tPZH
tPZL Switch Turn on Delay
OE to A or B 1.5 — 4.8 ns
tPHZ
tPLZ Switch Turn off Delay
OE to A or B(3) 1.5 — 5 ns
|QCI| Charge Injection, Typical(5,6) —1.5—pC
|QCDI| Charge Injection, Typical(6,7) —0.5—pC
4
COMMERCIAL TEMPERATURE RANGE
IDT74FST3245
OCTAL BUS SWITCH
Pulse
Generator
RT
D.U.T.
VCC
VIN
CL
VOUT
50pF 500Ω
500Ω
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
TI MI NG
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRO NOU S CONTRO L
tSU tH
tREM
tSU tH
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
tW
1.5V
1.5V
SAME PHASE
INPU T TRA NSITION
3V
1.5V
0V
1.5V
VOH
tPLH
OUTPUT
OPPOSITE PHASE
INPU T TRA NSITION
3V
1.5V
0V
tPLH tPHL
tPHL
VOL
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
SWITCH
OPEN
VOL
0.3V
0.3V
tPLZ
tPZL
tPZH tPHZ
3.5V
0V
1.5V
1.5V
ENABLE DISABLE
VOH
PRESET
CLEAR
CLOCK ENABLE
ETC.
Octal link
Octal link
Octal link
Octal link
Octal link
TEST CIRCUITS AND WAVEFORMS
PROPAGATION DELAY
TEST CIRCUITS FOR ALL OUTPUTS
ENABLE AND DISABLE TIMES
SET-UP, HOLD, AND RELEASE TIMES PULSE WIDTH
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
SWITCH POSITION
Test Switch
Open Drain
Disable Low Closed
Enable Low
All Other Tests Open
FCT LINK
DEFINITIONS:
CL = Load capacit ance: inc l udes jig and probe capacitanc e.
RT = Termination resi s tance: should be equal to ZOUT of the Pulse
Generator.
5
IDT74FST3245
OCTAL BUS SWITCH COMMERCIAL TEMPERATURE RANGE
CORPORATE HEADQUARTERS for SALES:
2975 Stender Way 800-345-7015 or 408-727-6116
Santa Clara, CA 95054 fax: 408-492-8674
www.idt.com*
*To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
ORDERING INFORMATION
ID T X X
Temp. Range XX
De vice Type X
Package
74 −40°C to + 8 5 °C
SO
Q
3257
Sm all O utline IC (SO1 6-1)
Quarter-size Small Outline Package (S O16-7)
Qu ad 2 :1 Mux/De m ux B us Sw itch
FST
