User's Guide
SLAU629April 2015
ADS54J60EVM
This user's guide describes the function and use of the ADS54J60 evaluation module. Included in this
document are a quick-start guide, instructions for optimizing evaluation results, software description,
alternate hardware configurations, and jumper, connector, and LED descriptions.
Contents
1 Overview...................................................................................................................... 2
1.1 Required Hardware................................................................................................. 2
1.2 Required Software.................................................................................................. 2
1.3 Evaluation Board Feature Identification Summary ............................................................. 3
1.4 References .......................................................................................................... 3
2 Quick Start Guide............................................................................................................ 4
2.1 Software Installation................................................................................................ 4
2.2 Hardware Setup Procedure ....................................................................................... 5
2.3 Software Setup Procedure......................................................................................... 6
2.4 Quick Start Trouble Shooting ..................................................................................... 9
3 Optimizing Evaluation Results............................................................................................ 10
3.1 Clocking Optimization............................................................................................. 10
3.2 Coherent Input Source............................................................................................ 10
3.3 HSDC Pro Settings................................................................................................ 10
4 Software Description....................................................................................................... 11
4.1 ADS54J60 EVM GUI.............................................................................................. 11
4.2 Low Level View.................................................................................................... 12
5 Alternate Hardware Configurations ...................................................................................... 13
5.1 Clocking Options .................................................................................................. 13
5.2 Analog Input Options ............................................................................................. 14
Appendix A Jumper, Connector, and LED Descriptions.................................................................... 15
List of Figures
1 EVM Feature Locations..................................................................................................... 3
2 Quick Start Test Setup...................................................................................................... 5
3 ADS54Jxx GUI Low Level View Tab...................................................................................... 6
4 HSDC Pro GUI Main Panel................................................................................................. 7
5 Channel 1 Data Capture Results from Quick Start Procedure......................................................... 8
6 ADS54Jxx GUI.............................................................................................................. 11
7 Low Level View Tab ....................................................................................................... 12
8 LMK04828 Clock Outputs Tab ........................................................................................... 13
List of Tables
1 Quick Start Performance Measurements................................................................................. 8
2 Troubleshooting Tips........................................................................................................ 9
3 HSDC Pro Settings to Optimize Results ................................................................................ 10
4 ADS54J60 GUI Tab Descriptions ........................................................................................ 11
5 Low Level View Controls.................................................................................................. 12
6 Jumper Descriptions and Default Settings.............................................................................. 15
Microsoft, Windows are registered trademarks of Microsoft Corporation.
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Overview
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7 Connector Descriptions.................................................................................................... 15
8 LED Descriptions........................................................................................................... 16
1 Overview
The ADS54J60EVM is an evaluation module (EVM) designed to evaluate the ADS54J60 high-speed,
JESD204B interface ADCs. The EVM includes an onboard clocking solution (LMK04828), transformer
coupled inputs, full power solution, and easy-to-use software GUI and USB interface.
The following features apply to this EVM:
Transformer-coupled signal input network allowing a single-ended signal source from 0.4 MHz to 800
MHz
LMK04828 system clock generator that generates field-programmable gate array (FPGA) reference
clocks for the high-speed serial interface and may be used to generate the ADC sampling clock
(default setting)
Transformer-coupled clock input network to test the ADC performance with a very low-noise clock
source
High-speed serial data output over a standard FPGA Mezzanine Card (FMC) interface connector
The ADS54J60EVM is designed to work seamlessly with the TSW14J56EVM, Texas Instruments’
JESD204B data capture/ pattern generator card, through the High Speed Data Converter Pro (HSDC Pro)
software tool for high-speed data converter evaluation. The ADS54J60EVM was also designed to work
with many of the development kits from leading FPGA vendors that contain an FMC connector.
1.1 Required Hardware
The following equipment is included in the EVM evaluation kit:
ADS54J60 Evaluation Board (EVM)
+5-V DC wall-mounted power supply
Mini-USB cable
The following list of equipment are items that are not included in the EVM evaluation kit but are items
required for evaluation of this product in order to achieve the best performance:
TSW14J56EVM Data Capture Board, +5-V power supply and Mini-USB cable
Computer running Microsoft®Windows®8, Windows 7, or Windows XP
One Low-Noise Signal Generator. Recommendations:
RF generator, > +17 dBm, < –40 dBc harmonics, < 500 fs jitter 20 kHz–20 MHz, 10-MHz to 2-GHz
frequency range
Examples: TSW2170EVM, HP HP8644B, Rohde & Schwarz SMA100A
Bandpass filter for desired analog input. Recommendations:
Bandpass filter, 60-dB harmonic attenuation, 5% bandwidth, > +18-dBm power, < 5-dB insertion
loss
Examples: Trilithic 5VH-series Tunable BPF, K&L BT-series Tunable BPF, TTE KC6 or KC7-series
Fixed BPF
Signal path cables, SMA and/or BNC with BNC-to-SMA adapters
1.2 Required Software
The following software is required to operate the ADS54J60EVM and available online. See References,
Section 1.4 for links.
ADS54Jxx_EVM_GUI_Installer_vxpx.zip
The following software is required to operate the TSW14J56EVM and available online. See References,
Section 1.4 for links.
High Speed Data Converter Pro software
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+5-V Input Power
Connector
USB Connector
ADC Reset Switch
LMK04828
Reference
Input
FMC
Connector
(Backside)
Channel A
Analog Input
External
ADC Clock
Input
Channel B
Analog Input
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Overview
1.3 Evaluation Board Feature Identification Summary
The EVM features are labeled in Figure 1.
Figure 1. EVM Feature Locations
1.4 References
ADS54J60EVM software, available at: www.ti.com/tool/ads54j60evm
ADS54J60 datasheet (SBAS706), available at www.ti.com/product/ads54j60
LMK04828 datasheet (SNAS605), available at www.ti.com/product/lmk04828
TSW14J56EVM User’s Guide (SLWU086), available at www.ti.com/tool/TSW14J56EVM
High Speed Data Converter Pro software (SLWC107) and User's Guide (SLWU087), available at
www.ti.com/tool/dataconverterpro-sw
NOTE: Schematics, layout, and BOM are available on the ADS54J60EVM product page on
www.ti.com.
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Quick Start Guide
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2 Quick Start Guide
This section guides the user through the EVM test procedure to obtain a valid data capture from the
ADS54J60EVM using the TSW14J56EVM capture card. This should be the starting point for all
evaluations.
2.1 Software Installation
The proper software must be installed before beginning evaluation. See Section 1.2 for a list of the
required software. The References section of this document contains links to find the software on the TI
website.
Important: The software must be installed before connecting the ADS54J60EVM and TSW14J56 to the
computer for the first time.
2.1.1 ADS54Jxx EVM GUI Installation
The ADS54Jxx EVM GUI is used to control the ADS54J60EVM. It must be used to properly configure the
devices on the EVM.
1. Download the ADS54Jxx EVM GUI from the TI website. The References section of this document
contains links to find the software on the TI website.
2. Extract the files from the zip file.
3. Run setup.exe and follow the installation prompts.
2.1.2 High Speed Data Converter Pro GUI Installation
High Speed Data Converter Pro (HSDC Pro) is used to control the TSW14J56EVM and analyze the
captured data. Please see the HSDC Pro user’s guide (SLWU087) for more information.
1. Download HSDC Pro from the TI website. The References section of this document contains the link to
find the software on the TI website.
2. Extract the files from the zip file.
3. Run setup.exe and follow the installation prompts.
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Channel A
Channel B
Analog Input
Low Noise
Signal Generator
Mini-USB Cable
+5-V Power Supplies
170-MHz
Bandpass
Filter
PC Computer
Running HSDC Pro
ADC EVM
TSW14J56EVM
Power
Switch
OFF ON
170 MHz, +15 dBm
Mini-USB Cable
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
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Quick Start Guide
2.2 Hardware Setup Procedure
A typical test setup using the ADS54J60EVM and TSW14J56EVM is shown in Figure 2. This is the test
setup used for the quick start procedure. The rest of this section describes the hardware setup steps.
Figure 2. Quick Start Test Setup
2.2.1 TSW14J56EVM Setup
First, setup the TSW14J56EVM using the following steps:
1. Connect the ADS54J60EVM to the TSW14J56EVM using the FMC connectors.
2. Connect the included 5-V power supply to connector J11 (+5V IN).
3. Connect the included mini-USB cable to the USB connector (J9).
4. Flip the power switch (SW6) to the ON position.
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2.2.2 ADS54J60EVM Setup
Next, setup the ADS54J60EVM using the following:
1. Connect the included 5-V power supply to connector J14.
2. Connect the included mini-USB cable to the USB connector J13.
3. Set the analog input signal generator for 170 MHz, and about +15 dBm of power.
4. Place a narrow pass-band band-pass filter at the output of the analog signal generator to remove noise
and harmonics from the signal generator.
5. Connect the analog input signal generator to the EVM though SMA connector AINP (J2).
2.3 Software Setup Procedure
The software can be opened and configured once the hardware is properly setup.
2.3.1 ADS54J60 GUI Configuration
1. Open the ADS54Jxx EVM GUI by going to Start Menu All Programs Texas Instruments ADCs
ADS54Jxx EVM GUI.
2. Verify that the green USB Status indicator is lit in the top right corner of the GUI. If it is not lit, click the
Reconnect USB button and check the USB Status indicator again. If it is still not lit, then verify the EVM
is connected to the computer through the included mini-USB cable.
3. Click on the Low Level View tab then click the Load Config button.
4. Navigate to C:\Program Files(86)\Texas Instruments\ADS54Jxx EVM GUI\Configuration Files, select
the file called LMK_Config_Onboard_983p04_MSPS.cfg, then click OK. This programs the LMK04828
to provide a 983.04 MHz clock to the ADC.
5. Verify that the LMK04828 phase lock loop (PLL) is locked by checking that the PLL2 LOCKED LED
(D3) is lit.
6. Once the LMK04828 PLL is locked, press SW1 (ADC RESET) to provide a hardware reset to the ADC.
This switch is located in the middle of the EVM.
7. In the Low Level View tab, click Load Config. Select the file called ADS54J60_LMF_8224.cfg and click
OK. The ADS54J60EVM is now configured for no decimation and 8 JESD204B lanes.
Figure 3. ADS54Jxx GUI Low Level View Tab
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Quick Start Guide
2.3.2 HSDC Pro GUI Configuration
1. Open High Speed Data Converter Pro by going to Start Menu All Programs Texas Instruments
High Speed Data Converter Pro. The GUI main page looks as shown in Figure 4.
Figure 4. HSDC Pro GUI Main Panel
2. When prompted to select the capture board, select the TSW14J56 whose serial number corresponds
to the serial number on the TSW14J56EVM and click OK. This popup can be accessed through the
Instrument Options menu.
3. If no firmware is currently loaded, there is a message indicating this. Click on OK.
4. Verify the ADC tab at the top of the GUI is selected.
5. Use the Select ADC drop-down menu at the top left corner to select ADS54J60_LMF_8224.
6. When prompted to update the firmware for the ADC, click Yes and wait for the firmware to download to
the TSW14J56. This takes about 30-40 seconds.
7. Enter “983.04M” into the ADC Output Data Rate field at the bottom left corner then click outside this
box or press return on the PC keyboard.
8. The GUI displays the new lane rate of the SerDes interface based off of the sample rate and other
parameters from the loaded configuration files. Click OK.
9. Click the Instrument Options menu at the top of HSDC Pro and select Reset Board.
10. Click Capture in HSDC Pro to capture data from the ADC.
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Quick Start Guide
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11. The results from the captured data of Channel 1 should look like Figure 5 and the performance should
be similar to Table 1. If this result is not achieved, then see the Quick Start Troubleshooting section of
this document.
Figure 5. Channel 1 Data Capture Results from Quick Start Procedure
Table 1. Quick Start Performance Measurements
Result Measured Value Units
SNR 69.25 dBFS
SFDR 85.31 dBFS
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Quick Start Guide
2.4 Quick Start Trouble Shooting
Use Table 2 to assist with problems that may have occurred during the quick start procedure.
Table 2. Troubleshooting Tips
Issue Troubleshooting Tips
General Problems Verify the test setup shown in Figure 2 and repeat the setup procedure as described in this
document.
Check power supplies to the EVM's. Verify that the power switches are in the ON position.
Check signal and clock connections to the EVM.
Check that all boards are properly connected together.
Try pressing the CPU_RESET button on the TSW14J56EVM.
Try power-cycling the external power supply to the EVM and reprogram the LMK and ADC
devices.
TSW14J56 LEDs are not correct: Verify the settings of the configuration switches on the TSW14J56EVM.
D1, D5 N/A Verify that the EVM configuration GUI is communicating with the USB and that the
D2, D4 Blinking configuration procedure has been followed.
D3, D6, D7 OFF (LEDs Not Blinking) Reprogram the LMK device.
D8, D28 ON Try pressing the CPU_RESET button on the TSW14J56EVM.
Try capturing data in HSDC Pro to force an LED status update.
Device GUI is not working properly Verify that the USB cable is plugged into the EVM and the PC.
Check the computer’s Device Manager and verify that a USB Serial Device is recognized
when the EVM is connected to the PC.
Verify that the green USB Status LED light in the top right corner of the GUI is lit. If it is not
lit, press Reconnect FTDI button.
Try restarting the configuration GUI.
Check default jumper connections as shown in Appendix A.
HSDC Pro Software is not Verify that the TSW14J56EVM is properly connected to the PC with a mini-USB cable and
capturing good data or analysis that the board serial number is properly identified by the HSDC Pro software.
results are incorrect. Check that the proper ADC device is selected. In default conditions, ADS54J60_LMF_8224
should be selected.
Check that the analysis parameters are properly configured.
Check that the fundamental power is no larger than -1 dBFs.
HSDC Pro Software gives a Time- Try to reprogram the LMK device and reset the JESD204 link.
Out error when capturing data Verify that the ADC sampling rate is correct in the HSDC Pro software.
Sub-Optimal Measured Make sure an ADC hardware reset was issued after loading the LMK but before loading the
Performance ADC configuration file.
Check that the spectral analysis parameters are properly configured.
Verify that bandpass filters are used in the clock and input signal paths and that low-noise
signal sources are used.
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Optimizing Evaluation Results
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3 Optimizing Evaluation Results
This section assists the user in optimizing the performance during evaluation of the product.
3.1 Clocking Optimization
The sampling clock provided to the ADC needs to have very low phase noise to achieve optimal results.
The default EVM configuration uses the LMK04828 clocking device to generate the sampling clock. There
are two options to improve the clock noise performance.
1. To achieve the best performance, the LMK04828 can be bypassed in favor of an externally provided
clock that is transformer coupled to the ADC. The clock must have very low noise and must use an
external narrow pass-band filter to achieve optimal noise performance. The clock amplitude must be
within the datasheet limits. See Section 5 for more information regarding this setup.
2. The LMK04828 can be used as a clock distributor by using an external clock as the input to the
LMK04828. Filters should still be used on the clock to optimize the noise performance. See Section 5.2
for more information regarding this setup.
3.2 Coherent Input Source
ARectangular window function can be applied to the captured data when the sample rate and the input
frequency are set precisely to capture an integer number of cycles of the input frequency (sometimes
called coherent frequency). This may yield better SNR results. The clock and analog inputs must be
frequency locked (such as through 10-MHz references) in order to achieve coherency.
3.3 HSDC Pro Settings
HSDC Pro has some settings that can help improve the performance measurements. These are
highlighted in Table 3.
Table 3. HSDC Pro Settings to Optimize Results
HSDC Pro Feature Description
Analysis Window (samples) Selects the number of samples to include in the selected test analysis. Collect more data to
improve frequency resolution of Fast-Fourier Transform (FFT) analysis. If more than 65,536
samples are required, the setting in the Data Capture Options needs to be increased to match this
value.
Data Windowing Function Select the desired windowing function applied to the data for FFT analysis. Select Blackman when
sampling a non-coherent input signal or Rectangle when sampling a coherent input signal.
Test Options Notch Select bins to be removed from the spectrum and back-filled with the average noise level. May
Frequency Bins also customize which Harmonics/Spurs are considered in SNR and THD calculations and select
the method for calculating spur power.
Test Options Bandwidth Enable markers to narrow the Single-Tone FFT test analysis to a specific bandwidth.
Integration Markers
Data Capture Options Configure the number of contiguous samples per capture (capture depth). May also enable
Capture Options Continuous Capture and FFT Averaging.
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Software Description
4 Software Description
4.1 ADS54J60 EVM GUI
Figure 6 shows the front page of the ADS54Jxx EVM GUI as it should be seen upon opening the GUI.
Descriptions for each of the tabs of the GUI are shown in Table 4.
Figure 6. ADS54Jxx GUI
Table 4. ADS54J60 GUI Tab Descriptions
Tab Description
ADS54J40 Enables control of the ADS54Jxx features. None of these controls need to be touched for basic operation.
Instead, use the Low Level View tab to load configuration files.
LMK04828 Enables control of many of the LMK04828 features. Configuration files can be used to setup the
LMK04828 in known working configurations, however this tab can be used to setup more advanced
clocking schemes.
Low Level View Allows write and read access to all device registers. Also allows loading and saving of configuration files.
The device configurations can be saved from this tab for use in the user’s system. See Section 4.2 for
more information.
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4.2 Low Level View
The Low Level View tab, shown in Figure 7, allows configuration of the devices at the bit and field level. At
any time, the controls described in Table 5 may be used to configure or read from the device.
Figure 7. Low Level View Tab
Table 5. Low Level View Controls
Control Description
Register Map Displays the devices on the EVM, registers for those devices, and the states of the registers.
Selecting a register field allows bit manipulation in the Register Data section.
The Value column shows the value of the register at the time the GUI was last updated due
to a read or write event.
Write Register button Write to the register highlighted in the Register Map with the value in the Write Data field. This
button must be clicked after changing bits in the register data section.
Write All button Update all registers shown in the Register Map with the values shown in the Register Map log.
The log can be viewed by double left clicking in the bottom left status bar of this page.
Read Register button Read from the register highlighted in the Register Map and display the results in the Value
column.
Read All button Read from all registers in the Register Map and display the current state of hardware. Also
updates the controls in the other tabs.
Load Config button Load a configuration file from disk and write the registers in the file.
Save Config button Save a configuration file to disk that contains the current register configuration.
Register Data Cluster Manipulate individual accessible bits of the register highlighted in the Register Map.
Generic Read/Write Register Perform a generic read or write command to the device shown in the Block drop-down box using
buttons the Address and Write Data information
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Alternate Hardware Configurations
5 Alternate Hardware Configurations
This section describes alternate hardware configurations in order to achieve better results or to more
closely mimic the system configuration.
5.1 Clocking Options
The default clocking mode uses the LMK04828 to generate the ADC sampling clock and FPGA clocks.
There are three additional clocking options that the EVM supports. These options are described in the
following sections.
5.1.1 External ADC Sampling Clock
An external clock can be used as the sampling clock for the ADC. This clock can be provided through a
transformer using the EXT_ADC_CLK connector (J6). For this option, C47 and C48 need to be uninstalled
and installed at R35 and R39. The LMK04828 must still be used to provide the device clock to the
TSW14J56 and the SYSREF signals to both boards. This option provides the best performance, as long
as the clock source has better phase-noise performance than the LMK04828. The source of the EXT ADC
clock must be synchronized with the LMK04828. To accomplish this, send the 10-MHz reference output
from the signal generator and connect it to J12 (CLKIN) of the ADS54J60EVM. This causes LED D6 to
illuminate indicating the LMK VCXO source is locked to the external reference clock. The provided LMK
configuration files will work in this mode as well. To turn off the ADC clock provided by the LMK04828 to
reduce switching noise, click on the LMK04828 tab, then click on Clock Outputs tab, then select
Powerdown for DCLK Type under CLKout 2 and 3 as shown in Figure 8.
Figure 8. LMK04828 Clock Outputs Tab
5.1.2 External LMK04828 Clock (Clock Distribution Mode)
The LMK04828 can be used as a clock distributor. In this case, the LMK04828 uses in input clock source
from CLKIN SMA connector (J12). JP2 (XO_PWR) can be left open to turn off the onboard VCXO to avoid
crosstalk. To use this mode, load the configuration file named LMK_Config_External_Clock.cfg. This mode
allows generation of frequencies that are not possible with the LMK when using the on-board VCXO.
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5.1.3 Clock Generator Using Onboard VCXO
The LMK04828 is used as a clock generator using the onboard 122.88 MHz VCXO. JP2 must be shorted
to turn on the onboard VCXO. The internal PLLs of the LMK04828 can be used with the onboard VCXO to
generate the desired frequencies. To use this mode, load one of the configuration files named
LMK_Config_Onboard_xxxx_MSPS.cfg, where xxxx corresponds to the desired ADC sampling rate. A
10-MHz signal can be brought into the CLKIN input to synchronize to external instruments. This is the
board default mode of operation.
5.2 Analog Input Options
The ADS54J60EVM allows for a differential analog input configuration in addition to the default using the
single-ended transformer coupled input. This option is described in the following section.
5.2.1 Differential Input
The analog input transformers can be bypassed in favor of a differential input source. This allows for a
wider range of input frequencies, including the possibility of DC coupling. To configure the EVM for a
differential analog input, remove R14, R15, C140, C141, and install R56, R58, C1, and C6 for Channel A.
For channel B, remove R16, R17, C157, C158, and install R54, R55, C7, and C12. For a DC coupled
application, swap the capacitors with 0-Ωresistors. The input signal must be biased to the required ADC
input common mode voltage.
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Appendix A
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Jumper, Connector, and LED Descriptions
A.1 Jumper Descriptions
The EVM jumpers are shown in Table 6 as well as the default settings for the jumpers. Use this table to
reset the EVM in the default configuration, in case of issues.
Table 6. Jumper Descriptions and Default Settings
Jumper Description Default setting
SW1 ADC hardware reset (active high) Logic low
JP1 2.5-V switcher enable. Default is power on. Open
JP2 Power enable to VCXO oscillator Y1. Default is power on. Shunt pins 1-2
JP3 Selects SPI source from USB or FMC. Default is USB. Shunt pins 2-3
JP6 Not used Open
JP7 ADC power down. Default is ADC powered on. Shunt pins 2-3
JP8 AVDD Shunt pins 1-2
SJP1 Selects either 3.3 V or GND for Y1 enable. Default is open Open
SJP2 Selects either diff sync or single-ended sync from FMC. Default is diff. Shunt pins 2-3
A.2 Connector Descriptions
The EVM connectors and their function are described in Table 7.
Table 7. Connector Descriptions
Connector Description
J2 Channel A positive analog input
J1 (Not installed) Channel A negative analog input. Used for differential input mode only.
J5 Channel B positive analog input
J4 (Not installed) Channel B negative analog input. Used for differential input mode only.
J6 External ADC sample clock input
J7 Not used
J10 LMK04828 external sync input
J12 LMK04828 reference clock input
J3 JESD204B FMC connector. Interfaces to TSW14J56EVM or FPGA evaluation boards
J12 (EEPROM PROG) EEPROM programming interface connector
J13 (USB) USB interface connector. Not used.
J14 (+5V IN) 5-V power supply input
J15 (JTAG) JTAG interface to CPLD
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A.3 LED Descriptions
The EVM LEDs are described Table 8.
Table 8. LED Descriptions
Connector Description
D1 Not used
D2 5 VDC power present
D3 LMK04828 locked to VCXO
D6 VCXO locked to external reference applied to J12
D4, D5 Not used
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STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES
1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or
documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein.
Acceptance of the EVM is expressly subject to the following terms and conditions.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software
License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment
by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any
way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or
instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as
mandated by government requirements. TI does not test all parameters of each EVM.
2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM,
or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the
warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to
repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall
be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
3Regulatory Notices:
3.1 United States
3.1.1 Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2 For EVMs annotated as FCC FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
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FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required by Radio Law of
Japan to follow the instructions below with respect to EVMs:
1. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
2. Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
3. Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて
いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。
1. 電波法施行規則第6条第1項第1号に基づく平成18328日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
2. 実験局の免許を取得後ご使用いただく。
3. 技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿6丁目24番1号
西新宿三井ビル
3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ
い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
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4EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1 User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5. Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
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6. Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE
DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY
THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND
CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY
OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD
PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY
INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF
THE EVM.
7. USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION
SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY
OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8. Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED
TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS,
LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL
BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION
ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM
PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER
THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE
OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND
CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9. Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2015, Texas Instruments Incorporated
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changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
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TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
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In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
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requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
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