ISL83220EIV-T - Intersil Corporation

FN6011.5

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

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All other trademarks mentioned are the property of their respective owners.

ISL83220E

±15kV ESD Protected, +3V to +5.5V,

1Microamp, 250kbps, RS-232

Transmitters/Receivers

The Intersil ISL83220E is a 3.0V to 5.5V powered RS-232

transmitter/receiver which meets ElA/TIA-232 and V.28/V.24

specifications, even at VCC = 3.0V. Additionally, it provides

±15kV ESD protection (IEC61000-4-2 Air Gap and Human

Body Model) on transmitter outputs and receiver inputs

(RS-232 pins). Targeted appl ications are PDAs, Palmtops,

and notebook and laptop computers where the low

operational, and even lo wer standby, power consumption is

critical. Efficient on-chip charge pumps, coupled with a

manual powerdown function, reduce th e standby supply

current to a 1μA trickle. Small footprint packaging, and the

use of small, low value capacitors ensure board space

savings as well. Data rates greater than 250kbps are

guaranteed at worst case load conditions. This family is fully

compatible with 3.3V only systems, mixed 3.3V and 5.0V

systems, and 5.0V only systems.

Table 1 summarizes the features of the ISL83320E, while

Application Note AN9863 summarizes the fe atures of each

device comprising the ICL32XXE 3V family.

Features

• Pb-Free Plus Anneal Available (RoHS Compliant)

• ESD Protection for RS-232 I/O Pins to ±15kV (IEC61000)

• Drop in Replacement for SP3220E

• Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V

• RS-232 Compatible Outputs at 2.7V

• Latch-Up Fre e

• On-Chip Voltage Converters Require Only Four External

0.1μF Capacitors

• Manual Powerdown Feature with Receivers Active

• Separate Receiver Enable Pin

•R

X and TX Hysteresis For Improved Noise Immunity

• Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps

• Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/μs

• Wide Power Supply Range . . . . . . . Single +3V to +5.5V

• Low Supply Current in Powerdown State. . . . . . . . . . .1μA

Applications

• Any System Requiring RS-232 Communication Ports

- Battery Powered, Hand-Held, and Portable Equipment

- Laptop Computers, Noteboo ks, Palmtops

- Modems, Printers and other Peripherals

- Digital Cameras

- Cellula r/Mobile Phones

Related Literature

• Technical Brief TB363 “Guidelines for Handling and

Processing Moisture Sensitive Surface Mo unt Devices

(SMDs)”

TABLE 1. SUMMARY OF FEATURES

P ART NUMBER NO. OF

Tx. NO. OF

Rx.

NO. OF

MONITOR Rx.

(ROUTB)

DATA

RATE

(kbps) Rx. ENABLE

FUNCTION? READY

OUTPUT?

MANUAL

POWER-

DOWN?

AUTOMATIC

POWERDOWN

FUNCTION?

ISL83220E 1 1 0 250 Yes No Yes No

Data Sheet April 27, 2006

Pinout ISL83220E (TSSOP)

TOP VIEW

C1+

V+

C1-

C2+

C2-

V-

R1IN

SHDN

GND

T1OUT

N.C.

T1IN

R1OUT

VCC

N.C.

Ordering Information

PART NUMBER PART

MARKING

TEMP.

RANGE

(°C) PACKAGE PKG.

DWG. #

ISL83220ECV 83220ECV 0 to 70 16 Ld TSSOP M16.173

ISL83220ECV-T 83220ECV 0 to 70 16 Ld TSSOP

Tape and Reel M16.173

ISL83220ECVZ

(See Note) 83220ECVZ 0 to 70 16 Ld TSSOP

(Pb-Free) M16.173

ISL83220ECVZ-T

(See Note) 83220ECVZ 0 to 70 16 Ld TSSOP

(Pb-Free)

Tape and Reel

M16.173

ISL83220EIV 83220EIV -40 to 85 16 Ld TSSOP M16.173

ISL83220EIV-T 83220EIV -40 to 85 16 Ld TSSOP

Tape and Reel M16.173

ISL83220EIVZ

(See Note) 83220EIVZ -40 to 85 16 Ld TSSOP

(Pb-Free) M16.173

ISL83220EIVZ-T

(See Note) 83220EIVZ -40 to 85 16 Ld TSSOP

(Pb-Free)

Tape and Reel

M16.173

NOTE: Intersil Pb-free plus anneal products employ special Pb-free

material sets; molding compounds/die attach materials and 100%

matte tin plate termination finish, which are RoHS compliant and

compatible with both SnPb and Pb-free soldering operations. Intersil

Pb-free products are MSL classified at Pb-free peak reflow

temperatures that meet or exceed the Pb-free requirements of

IPC/JEDEC J STD-020.

Pin Descriptions

PIN FUNCTION

VCC System power supply input (3.0V to 5.5V).

V+ Internally generated positive transmitter supply (+5.5V).

V- Internally generated negative transmitter supply (-5.5V).

GND Ground connection.

C1+ External capacitor (voltage doubler) is connected to this lead.

C1- External capacitor (voltage doubler) is connected to this lead.

C2+ External capacitor (voltage inverter) is connected to this lead.

C2- External capacitor (voltage inverter) is connected to this lead.

TIN TTL/CMOS compatible transmitt er Inputs.

TOUT ±15kV ESD Protected, RS-232 level (nominally ±5.5V) transmitter outputs.

RIN ±15kV ESD Protected, RS-232 compatible receiver inputs.

ROUT TTL/CMOS level receiver outputs.

EN Active low receiver enable control; doesn’t disable ROUTB outputs.

SHDN Active low input shuts down transmitters and on-board power supply, to place device in low power mode.

N.C. No internal connection.

ISL83220E

Typical Operating Circuit ISL83220E

VCC

T1OUTT1IN

0.1μF

+0.1μF

0.1μF

11 13

V+

V-

C1+

C1-

C2+

C2-

0.1μF5

R1OUT R1IN

5kΩ

+C3

GND

+3.3V +0.1μF

TTL/CMOS

LOGIC LEVELS RS-232

LEVELS

SHDN 16 VCC

ISL83220E

Absolute Maximum Ratings Thermal Information

VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V

V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V

V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V

V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V

Input Voltages

TIN, EN, SHD N. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V

RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V

Output Voltages

TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V

ROUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V

Short Circuit Duration

TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous

ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table

Thermal Resistance (Typical, Note 1) θJA (°C/W)

16 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . . 145

Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C

Maximum Storage Temperature Range. . . . . . . . . . .-65°C to 150°C

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C

(Lead Tips Only)

Operating Conditions

Temperature Range

ISL83220ECV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

Electrical Specifications Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1μF; Unless Otherwise Specified.

Typicals are at TA = 25°C

PARAMETER TEST CONDITIONS TEMP

(°C) MIN TYP MAX UNITS

DC CHARACTERISTICS

Supply Current All Outputs Unloaded,

SHDN = VCC VCC = 3.15V 25 - 0.3 1.0 mA

Supply Current, Powerdown SHDN = GND 25 - 1.0 10 μA

LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS

Input Logic Threshold Low TIN, EN, SHDN Full - - 0.8 V

Input Logic Threshold High TIN, EN, SHDN VCC = 3.3V Full 2.0 - - V

VCC = 5.0V Full 2.4 - - V

Transmitter Input Hysteresis 25 - 0.3 V

Input Leakage Current TIN, EN, SHDN Full - ±0.01 ±1.0 μA

Output Leakage Current EN = VCC Full - ±0.05 ±10 μA

Output Voltage Low IOUT = 1.6mA Full - - 0.4 V

Output Voltage High IOUT = -1.0mA Full VCC -0.6 VCC -0.1 - V

TRANSMITTER OUTPUTS

Output Voltage Swing All Transmitter Outputs Loaded with 3kΩ to Ground Full ±5.0 ±5.4 - V

Output Resistance VCC = V+ = V- = 0V, Transmitter Output = ±2V Full 300 10M - Ω

Output Short-Circuit Current VOUT = 0V Full - ±35 ±60 mA

Output Leakage Current VOUT = ±12V, VCC = 0V or 3V to 5.5V, SHDN = GND Full - - ±25 μA

RECEIVER INPUTS

Input Voltage Range Full -25 - 25 V

Input Threshold Low VCC = 3.3V Full 0.6 1.2 - V

VCC = 5.0V Full 0.8 1.5 - V

Input Threshold High VCC = 3.3V Full - 1.5 2.4 V

VCC = 5.0V Full - 1.8 2.4 V

Input Hysteresis 25 - 0.3 - V

Input Resistance Full 3 5 7 kΩ

ISL83220E

Detailed Description

The ISL83220E operates from a single +3V to +5.5V supply,

guarantees a 250kbps minimum data rate, requires only four

small external 0.1μF capacitors, features low power

consumption, and meets all ElA RS-232C and V.28

specifications. The circuit is divided into three sections: The

charge pump, the transmitter, and the receiver.

Charge-Pump

Intersil’s new 3.3V family utilizes regulated on-chip dual

charge pumps as voltage doublers, and voltage inverters to

generate ±5.5V transmitter supplies from a VCC supply as

low as 3.0V. This allows these device s to maint ai n RS-2 32

compliant output levels over the ±10% tolerance range of

3.3V powered systems. The efficient on-chip power supplies

require only four small, external 0.1μF capacitors for the

voltage doubler and inverter functions, even at VCC = 3.3V.

The char ge pump s operate discontinuously (i.e., they turn off

as soon as the V+ and V- supplies are pumped up to the

nominal values), resulting in significant power savings.

Transmitters

The transmitters are proprietary, low dropout, inverting

drivers that translate TTL/CMOS inputs to EIA/TIA-232

output levels. Coupled with the on-chip ±5.5V supplies,

these transmitters deliver true RS-232 levels over a wide

range of single supply system voltages.

The transmitter output disables and assumes a high

impedance state when the device enters the powerdown

mode (see Table 2). This output may be driven to ±12V when

disabled.

All devices guarantee a 250kbps data rate for full load

conditions (3kΩ and 1000pF), VCC ≥ 3.0V. Under more

typical conditions of VCC ≥ 3.3V, RL = 3kΩ, and CL = 250pF,

the ISL83220E easily operates at 900kbps.

Transmitter inputs float if left unconnected, and may cause

ICC increases.

Receivers

The ISL83220E device contains a standard inverting

receiver that three - states via the EN control line. Receivers

convert RS-232 signals to CMOS output levels and accept

inputs up to ±25V while presenting the required 3kΩ to 7kΩ

input impedance (see Figure 1) even if the power is off

(VCC = 0V). The receiver’s Schmitt trigger input stage uses

hysteresis to increase noise immunity and decrease errors

due to slow input signal transitions.

TIMING CHARACTERISTICS

Maximum Data Rate RL = 3kΩ, CL = 1000pF, One Transmitter Switching Full 250 500 - kbps

Transmitter Propagation Delay Transmitter Input to

Transmitter Output,

RL = 3kΩ, CL = 1000pF

tPHL 25 - 1.0 - μs

tPLH 25 - 1.0 - μs

Receiver Propagation Delay Receiver Input to Receiver

Output, CL = 150pF tPHL 25 - 0.20 - μs

tPLH 25 - 0.30 - μs

Receiver Output Enable Time Normal Operation 25 - 200 - ns

Receiver Output Disable Time Normal Operation 25 - 200 - ns

Transmitter Skew tPHL - tPLH (Note 2) 25 - 100 500 ns

Receiver Skew tPHL - tPLH Full - 100 1000 ns

Transition Region Slew Rate VCC = 3.3V,

RL = 3kΩ to 7kΩ,

Measured From 3V to -3V or

-3V to 3V

CL = 150pF to 2500pF 25 4 - 30 V/μs

CL = 150pF to 1000pF 25 6 - 30 V/μs

ESD PERFORMANCE

RS-232 Pins (TOUT, RIN) Human Body Model 25 - ±15 - kV

IEC61000-4-2 Contact Discharge 25 - ±8-kV

IEC61000-4-2 Air Gap Discharge 25 - ±15 - kV

All Other Pins Human Body Model 25 - ±3-kV

NOTE:

2. Transmitter skew is measured at the transmitter zero crossing points.

Electrical Specifications Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1μF; Unless Otherwise Specified.

Typicals are at TA = 25°C (Continued)

PARAMETER TEST CONDITIONS TEMP

(°C) MIN TYP MAX UNITS

ISL83220E

The ISL83220E receiver disab les only when EN is driven

high. (see Table 2). This allows the receiver to monitor

external devices, like a modem, even when the ISL83220E

is in its 1μA powerdown state.

Standard receivers driving powered down peripherals must

be disabled to prevent current flow through the peripheral’s

protection diodes (see Figure 2). This renders them useless

for wake up functions.

Operation Down to 2.7V

ISL83220E transmitter outputs meet RS-562 levels (±3.7V ),

at the full data rate, with VCC as low as 2.7V. RS-562 le vels

typically ensure interoperabi lity with RS-232 devices.

Powerdown Functionality

This 3V family of RS-232 interface devices require s a

nominal supply current of 0.3mA during normal operation

(not in powerdown mode), which is considerably less than

the 5mA to 11mA current required of 5V RS-232 devices.

The already low current requirement drops significantly

when the device enters powerdown mode. In powerdown,

supply current drops to 1μA, because the on-chip charge

pump turns off (V+ collapses to VCC, V- collapses to GND),

and the transmitter outputs three-state. This micro-power

mode makes these devices ideal for battery powered and

portable applications.

Software Controlled (Manual) Powerdown

On the ISL83220E, the powerdown control is via a simple

shutdown (SHDN) pin. Driving this pin high enables normal

operation, while driving it low forces the IC into it’s

powerdown state. Connect SHDN to VCC if the powerdow n

function isn’t needed. Note that the receiver output remains

enabled during shutdown (see Table 2). For the lowest

power consumption during powerdown, the receiver should

also be disabled by driving the EN input high (see next

section). The time to recover from manual powerdown mode

is typically 100μs.

Receiver ENABLE Control

The ISL83220E also features an EN input to control the

receiver output. Driving EN high disables the receiver output

placing it in a high impedance state. This is useful to

eliminate supply current, due to a receiver output forward

biasing the protection diode, when driving th e input of a

powered down (VCC = GND) peripheral (see Fi gure 2).

Capacitor Selection

The charge pumps require 0.1μF capacitors for 3.3V

operation. Do not use values smaller than 0.1μF. Increasin g

the capacitor values (by a factor of 2) reduces ripple on the

transmitter outputs and slightly reduces power consumption.

When using minimum required capacitor values, make sure

that capacitor values do not degrade excessively with

temperature. If in doubt, use capacitors with a larger nominal

value. The capacitor’s equivalent series resistance (ESR)

usually rises at low temperatures and it influences the

amount of ripple on V+ and V-.

Power Supply Decoupling

In most circumstances a 0.1μF bypass capacitor is

adequate. In application s that are particularly sensitive to

power supply noise, decouple VCC to ground with a

capacitor of the same valu e as the charge-pump cap acitor C1.

Connect the byp ass cap acitor as close as possible to the IC .

R1OUT

GND ≤ VROUT ≤ VCC

5kΩ

R1IN

-25V ≤ VRIN ≤ +25V

GND

VCC

FIGURE 1. INVERTING RECEIVER CONNECTIONS

TABLE 2. POWERDOWN AND ENABLE LOGIC TRUTH TABLE

SHDN

INPUT EN

INPUT TRANSMITTER

OUTPUT RECEIVER

OUTPUT MODE OF

OPERATION

L L High-Z Active Manual Powerdown

L H High-Z High-Z Manual Powerdown

w/Rcvr. Disabled

H L Active Active Normal Ope ration

H H Active High-Z Normal Operation

w/Rcvr. Disabled

FIGURE 2. POWER DRAIN THROUGH POWERED DOWN

PERIPHERAL

OLD

VCC

POWERED

GND SHDN = GND

VCC

CURRENT

VOUT = VCC

FLOW

RS-232 CHIP

DOWN

UART

ISL83220E

Transmitter Output when Exiting

Powerdown

Figure 3 shows the response of the transmitter output when

exiting powerdown mode. As it activates, the transmitter

output properly goes to RS-232 levels, with no glitching,

ringing, nor undesirable transients. The transmitter is loaded

with 3kΩ in parallel with 2500pF. Note that the transmitter

enables only when the magnitude of the supplies exceed

approximately 3V.

High Data Rates

The ISL83220E maintains the RS-232 ±5V minimum

transmitter output voltages even at high data rates. Figure 4

details a transmitter loopback test circuit, and Figure 5

illustrates the loopback test result at 120kbps. For this test,

the transmitter is driving an RS-232 load in parallel with

1000pF, at 120kbps. Figure 6 shows the loopback results for

the transmitter driving 1000 pF and an RS-232 load at

250kbps. Interconnection with 3V and 5V Logic

The ISL83220E directly interfaces with 5V CMOS and TTL

logic families. Nevertheless, with the device at 3.3V, and the

logic supply at 5V, AC, HC, and CD4000 outputs can drive

ISL83220E inputs, but ISL83220E outputs do not reach the

minimum VIH for these logic families. See Table 4 for more

information.

FIGURE 4. TRANSMITTER LOOPBACK TEST CIRCUIT

TIME (20µs/DIV)

2V/DIV

5V/DIV

VCC = +3.3V

SHDN

FIGURE 3. TRANSMITTER OUTPUT WHEN EXITING

POWERDOWN

C1 - C4 = 0.1µF

TIN = LOW

TIN = HIGH

ISL83220E

VCC

C2C4

1000pF

V+

V-

TIN

ROUT

C1+

C1-

C2+

C2-

RIN

TOUT

VCC

0.1μF

VCC

SHDN

FIGURE 5. LOOPBACK TEST AT 120kbps

FIGURE 6. LOOPBACK TEST AT 250kbps

T1IN

T1OUT

R1OUT

5µs/DIV

VCC = +3.3V

5V/DIV

C1 - C4 = 0.1µF

T1IN

T1OUT

R1OUT

2µs/DIV

5V/DIV

VCC = +3.3V

C1 - C4 = 0.1µF

ISL83220E

±15kV ESD Protection

All pins on ISL8XXX dev ice s in cl u de ES D protection

structures, but the ISL8XXXE family incorporates advanced

structures which allow the RS-232 pins (transmitter outputs

and receiver inputs) to survive ESD events up to ±15kV. The

RS-232 pins are particularly vulnerable to ESD damage

because they typically connect to an exposed port on th e

exterior of the finished product. Simply touching the port

pins, or connecting a cable, can cause an ESD event that

might destroy unprotected ICs. These new ESD structures

protect the de vi ce wh e th er or not it is powered up, protect

without allowing any latchup mechanism to activate, and

don’t interfere with RS-232 signals as large as ±25V.

Human Body Model (HBM) Testing

As the name implies, this test me thod emulates the ESD

event delivered to an IC during human handling. The tester

delivers the charge through a 1.5kΩ current limiting resistor,

making the test less severe than the IEC61000 test which

utilizes a 330Ω limiting resistor. The HBM method

determines an IC’s ability to withstand the ESD transients

typically present during handling and manufacturing. Due to

the random nature of these events, each pin is tested with

respect to all other pins. The RS-232 pins on “E” family

devices can withstand HBM ESD events to ±15kV.

IEC61000-4-2 Testing

The IEC61000 test method applies to finished equipment,

rather than to an individual IC. Therefore, the pins most likely

to suffer an ESD event are those that are exposed to the

outside world (the RS-232 pins in this case), and the IC is

tested in its typical application configuration (power applied)

rather than testing each pin-to-pin combination. The lower

current limiting resistor coupled with the larger charge

storage capacitor yields a test that is much more severe than

the HBM test. The extra ESD protection built into this

device’s RS-232 pins allows the design of equipment

meeting level 4 criteria without the need for additional board

level protection on the RS-232 port.

AIR-GAP DISCHARGE TEST METHOD

For this test method, a charged probe tip moves toward the

IC pin until the voltage arcs to it. The current waveform

delivered to the IC pin depends on approach speed,

humidity, temperature, etc., so it is difficult to obtain

repeatable results. The “E” device RS-232 pins withstand

±15kV air-gap discharges.

CONTACT DISCHARGE TEST METHOD

During the contact discharge test, the probe contacts the

tested pin before the probe tip is energized, thereby

eliminating the variables asso ciated with the air-gap

discharge. The result is a more repeatable and predictable

test, but equipment limits prevent testing devices at voltages

higher than ±8kV. All “E” family devices survive ±8kV contact

discharges on the RS-232 pins.

TABLE 3. LOGIC F AMILY COMP ATIBILITY WITH V ARIOUS

SUPPLY VOLTAGES

SYSTEM

POWER-SUPPLY

VOLTAGE

(V)

VCC

SUPPLY

VOLTAGE

(V) COMPATIBILITY

3.3 3.3 Compatible with all CMOS

families.

5 5 Compatible with all TTL and

CMOS logic families.

5 3.3 Compatible with ACT and HCT

CMOS, and with TTL.

ISL83220E outputs are

incompatible with AC, HC, and

CD4000 CMOS inputs.

Typical Performance Curves VCC = 3.3V, TA = 25°C

FIGURE 7. TRANSMITTER OUTPUT VOL TAGE vs LOAD

CAPACITANCE FIGURE 8. SLEW RATE vs LOAD CAPACITANCE

-6

-4

-2

1000 2000 3000 4000 50000

LOAD CAPACITANCE (pF)

TRANSMITTER OUTPUT VOLTAGE (V)

TRANSMITTER AT 250kbp s

VOUT+

VOUT -

LOAD CAPACITANCE (pF)

SLEW RATE (V/µs)

0 1000 2000 3000 4000 5000

+SLEW

-SLEW

ISL83220E

Die Characteristics

SUBSTRATE POTENTIAL (POWERED UP):

GND

TRANSISTOR COUNT:

286

PROCESS:

Si Gate CMOS

FIGURE 9. SUPPLY CURRENT vs LOAD CAP ACITANCE

WHEN TRANSMITTING DATA FIGURE 10. SUPPLY CURRENT vs SUPPLY VOLTAGE

Typical Performance Curves VCC = 3.3V, TA = 25°C (Continued)

0 1000 2000 3000 4000 5000

LOAD CAPACITANCE (pF)

SUPPLY CURRENT (mA)

20kbps

250kbps

120kbps

SUPPLY CURRENT (mA)

2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0

0.5

1.0

1.5

2.0

SUPPLY VOLTAGE (V)

2.5

3.0

3.5 NO LOAD

ALL OUTPUTS STATIC

ISL83220E

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No lice nse is gran t ed by i mpli catio n or other wise u nder an y p a tent or patent right s of Int ersi l or it s sub sidi aries.

For information regarding Intersil Corporation and its products, see www.intersil.com

ISL83220E

Thin Shrink Small Outline Plastic Packages (TSSOP)

NOTES:

1. These package dimensions are within allowable dimensions of

JEDEC MO-153-AB, Issue E.

2. Dimensioning and tolerancing per ANSI Y14.5M-1982.

3. Dimension “D” does not include mold flash, protrusions or gate

burrs. Mold flash, protrusion and gate burrs shall not exceed

0.15mm (0.006 inch) per side.

4. Dimension “E1” does not include interlead flash or protrusions.

Interlead flash and protrusions shall not exceed 0.15mm (0.006

inch) per side.

5. The chamfer on the body is optional. If it is not present, a visual

index feature must be located within the crosshatched area.

6. “L” is the length of terminal for soldering to a substrate.

7. “N” is the number of terminal positions.

8. Terminal numbers are shown for reference only.

9. Dimension “b” does not include dambar protrusion. Allowable

dambar protrusion shall be 0.08mm (0.003 inch) total in excess

of “b” dimension at maximum material condition. Minimum space

between protrusion and adjacent lead is 0.07mm (0.0027 inch).

10. Controlling dimension: MILLIMETER. Converted inch dimen-

sions are not necessarily exact. (Angles in degrees)

INDEX

AREA E1

123

-B-

0.10(0.004) C AMBS

-A-

-C-

SEATING PLANE

0.10(0.004)

E0.25(0.010) BM M

0.25

0.010

GAUGE

PLANE

0.05(0.002)

M16.173

16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE

SYMBOL

INCHES MILLIMETERS

NOTESMIN MAX MIN MAX

A - 0.043 - 1.10 -

A1 0.002 0.006 0.05 0.15 -

A2 0.033 0.037 0.85 0.95 -

b 0.0075 0.012 0.19 0.30 9

c 0.0035 0.008 0.09 0.20 -

D 0.193 0.201 4.90 5.10 3

E1 0.169 0.177 4.30 4.50 4

e 0.026 BSC 0.65 BSC -

E 0.246 0.256 6.25 6.50 -

L 0.020 0.028 0.50 0.70 6

N16 167

α0o8o0o8o-

Rev. 1 2/02