74ACT16244MTDX - FAIRCHILD SEMICONDUCTOR

August 1999

Revised May 2005

74AC16244 • 74ACT16244 16-Bit Buffer/Li ne Driver with 3-STATE Outputs

74AC16244 • 74ACT16244

16-Bit Buffer /L ine Driver with 3-STATE Outputs

General Descript ion

The AC16244 and ACT16244 contain sixteen non-inverting

buffers with 3- STATE ou tputs design ed to be emp loyed as

a memory and ad dress d river, clock driver, or bus ori ented

transmitter/receiver. The device is nibble controlled. Each

nibble has separate 3-STATE control inputs which can be

shorted together for full 16-bit operation.

Features

■Separate control logic for each byte and nibble

■16-bit version of the AC244/ACT244

■Outputs source/sink 24 mA

■ACT16244 has TTL-compatible inputs

Ordering Code:

Device a l s o av ailable in Tape and R eel. Specify by appending su ffix le t te r “X” to the ordering co de.

Logic Symbol

Pin Descriptions

Connection Diagram

FACT

is a trademark of Fairchild Semiconductor Corporation.

Order Number Package Number Package Description

74AC16244SSC MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

74ACT16244SSC MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

74ACT16244MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Pin Names Description

OEnOutput Enable Input (Active LOW)

I0 - I15 Inputs

O0 - 015 Outputs

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74AC16244 • 74ACT16244

Functional Description

The AC16244 and ACT16244 contain sixteen non-inverting

buffers with 3-STATE standard outputs. The device is nib-

ble (4 bits) controlled with each nibble functioning identi-

cally, but independ ent of th e o the r. The control p i ns c an b e

shorted together to obtain full 16-bit operation. The

3-STATE outputs are controlled by an Output Enable (OEn)

input for each nibble. When OEn is LOW , the outputs are in

2-state mode. When OEn is HIGH, the outputs are in the

high impedance mode, but this does not interfere with

entering new data into the inputs.

Truth Tables

LOW Voltage Le v el

HIGH Voltage Level X

Immaterial

High Impedance

Logic Diagram

Inputs Outputs

OE1I0–I3O0–O3

LL L

LH H

HX Z

Inputs Outputs

OE2I4–I7O4–O7

LL L

LH H

HX Z

Inputs Outputs

OE3I8–I11 O8–O11

LL L

LH H

HX Z

Inputs Outputs

OE4I12–I15 O12–O15

LL L

LH H

HX Z

3 www.fairchildsemi.com

74AC16244 • 74ACT16244

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions

Note 1: Absol ut e maximum ratings are t hose values beyon d w hich damag e

to the dev ice may occur. The databook specifi cations should be met, with-

out exception to ensure that the system design is reliable over its power

supply, temperature, and output/input loading variables. Fairchild does not

recommend operation of FACT

circuits outside databook spec if ic at ions.

DC Electrical Characteristics for AC

Note 2: All outputs load ed; thresholds a ssociated w it h output un der test.

Note 3: IIN and ICC @ 3.0V are gu aranteed to be less t han or equa l t o th e respectiv e limit @ 5. 5V VCC.

Note 4: Maximum te s t d uration 2.0 m illis econd; one output loaded at a ti m e.

Supply Voltage (VCC)



0.5V to



7.0V

DC Input Diode Current (IIK)



0.5V



20 mA

VCC



0.5V



20 mA

DC Output Diode Current (IOK)



0.5V



20 mA

VCC



0.5V



20 mA

DC O utput Voltage (VO)



0.5V to VCC



0.5V

DC Output Source/Sink Current (IO)

50 mA

DC VCC or Ground Current

per Output Pin

50 mA

Junction Temperature



140

Storage Temperature



C to



150

Supply Voltage (VCC)

AC 2.0V to 6.0V

ACT 4.5V to 5.5V

Input Voltage (VI)0V to V

Output Voltage (VO)0V to V

Operating Temperature (TA)



C to



Minimum Input Edge Rate (

AC Devices

VIN from 30% to 70%

VCC @ 3.3V, 4.5V, 5.5V 125 mV/ns

Minimum Input Edge Rate (

ACT Devices

VIN from 0.8V to 2.0V

VCC @ 4.5V, 5.5V 125 mV/ns

Symbol Parameter VCC TA





C to



CUnits Conditions

(V) Typ Guaranteed Limits

VIH Minimum HIGH Input Voltage 3.0 1.5 2.1 2.1 VVOUT

0.1V

4.5 2.25 3.15 3.15 or VCC



0.1V

5.5 2.75 3.85 3.85

VIL Maximum LOW Input Voltage 3.0 1.5 0.9 0.9 VVOUT

0.1V

4.5 2.25 1.35 1.35 or VCC



0.1V

5.5 2.75 1.65 1.65

VOH Minimum HIGH Output Voltage 3.0 2.99 2.9 2.9 VI

OUT



A4.5 4.49 4.4 4.4

5.5 5.49 5.4 5.4

3.0 2.56 2.46 IOH

-12 mA

4.5 3.86 3.76 V IOH



24 m A

5.5 4.86 4.76 IOH



24 mA (Note 2)

VOL Maximum LOW Output Voltage 3.0 0.002 0.1 0.1 VI

OUT

A4.5 0.001 0.1 0.1

5.5 0.001 0.1 0.1

3.0 0.36 0.44 IOL

12 m A

4.5 0.36 0.44 V IOL

24 m A

5.5 0.36 0.44 IOL

24 mA (Note 2)

IOZ Maximum 3-STAT E Leakage Current 5.5 0.50

5.0

I (OE)

VIL, VIH

VCC, GND

IIN Maximum Input Leakage Current (Note 3) 5.5

0.1

1.0

VCC, GND

ICC Max Quiescent Supply Current (Note 3) 5.5 8.0 80.0

VCC or GND

IOLD Minimum Dynamic 5.5 75 mA VOLD

1.65V Max

IOHD Output Current (Note 4) 5.5



75 mA VOHD

3.85V Min

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74AC16244 • 74ACT16244

DC Electrical Characteristics for ACT

Note 5: All outputs lo aded; thresholds as s ociated w ith out put und er test.

Note 6: Maximum test duration 2.0 millisecond; one output loaded at a time.

Symbol Parameter VCC TA





C to



CUnits Conditions

(V) Typ Guaranteed Limits

VIH Minimum HIGH Input Voltage 4.5 1.5 2.0 2.0 VVOUT

0.1V

5.5 1.5 2.0 2.0 or VCC



0.1V

VIL Maximum LOW Input Voltage 4.5 1.5 0.8 0.8 VVOUT

0.1V

5.5 1.5 0.8 0.8 or VCC



0.1V

VOH Minimum HIGH Output Vo ltage 4.5 4.49 4.4 4.4 VI

OUT



5.55.495.4 5.4 VIN

VIL or VIH

4.5 3.86 3.76 V IOH



24 mA

5.5 4.86 4.76 IOH



24 mA (Note 5)

VOL Maximum LOW Output Voltage 4.5 0.001 0.1 0.1 VI

OUT

5.5 0.001 0.1 0.1 VIN

VIL or VIH

4.5 0.36 0.44 V IOH

24 m A

5.5 0.36 0.44 IOH

24 mA (Note 5)

IOZ Maximum 3-STATE Leakage Current 5.5

0.5

5.0

VIL, VIH

VCC, GND

IIN Maximum Input Leakage Current 5.5

0.1

1.0

VCC, GND

ICCT Maximum ICC/Input 5.5 0.6 1.5 mA VI

VCC



2.1V

ICC Max Quiescent Supply Current 5.5 8 .0 80.0

VCC or GND

IOLD Minimum Dynamic 5.5 75 mA VOLD

1.65V Max

IOHD Output Current (Note 6)



75 mA VOHD

3.85V Min

5 www.fairchildsemi.com

74AC16244 • 74ACT16244

AC Electrical Characteristics for AC

Note 7: Voltage Range 5.0 is 5.0V

0.5V.

Voltage Range 3. 3 is 3. 3V

0.3V.

AC Electrical Characteristics for ACT

Note 8: Voltage Range 5.0 is 5.0V

0.5V.

Capacitance

VCC TA





C to



Symbol Parameter (V) CL

50 pF CL

50 pF Units

(Note 7) Min Typ Max Min Max

tPLH Propagation Delay 3.3 2.0 6.3 9.4 2.0 10.8 ns

Data to Output 5.0 1.6 4.6 6.5 1.6 7.1

tPHL Propagation Delay 3.3 2.4 5.7 10.7 2.4 11.8 ns

Data to Output 5.0 2.0 4.3 7.0 2.0 7.9

tPZH Output Enable Time 3.3 2.2 6.2 10 2.2 11.5 ns

5.0 1.7 4.6 6.7 1.7 7.5

tPZL Output Enable Time 3.3 2.9 6.4 13.0 2.9 14.6 ns

5.0 2.2 4.7 8.1 2.2 9.0

tPHZ Output Disable Time 3.3 3.1 5.5 8.4 3.1 9.1 ns

5.0 1.9 3.9 7.8 1.9 8.4

tPLZ Output Disable Time 3.3 2.4 4.7 8.1 2.4 8.8 ns

5.0 1.7 3.6 7.2 1.7 7.6

VCC TA





C to



Symbol Parameter (V) CL

50 pF CL

50 pF Units

(Note 8) Min Typ Max Min Max

tPLH Propagation Delay 5.0 3.0 5.2 7.3 3.0 7.8 ns

tPHL Data to Output 2.5 4.8 6.8 2.5 7.3

tPZH Output Enable 5.0 2.5 5.0 7.4 2.5 7.9 ns

tPZL Time 2.7 4.6 7.5 2.7 8.0

tPHZ Output Disable 5.0 2.3 5.0 7.9 2.3 8.2 ns

tPLZ Time 2.0 4.6 7.4 2.0 7.9

Symbol Parameter Typ Units Conditions

CIN Input Pin Capacitance 4.5 pF VCC

5.0V

COUT Output Pin Capacitance 12 pF VCC

5.0V

CPD Power Dissipation Capacitance 74AC16244 35 pF VCC

5.0V

74ACT16244 30

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74AC16244 • 74ACT16244

Physical Dimensions inches (millimeters) unless otherwise noted

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

Packag e Num b er MS48A

7 www.fairchildsemi.com

74AC16244 • 74ACT16244 16-Bit Buffer /Line Driver with 3-STATE Outputs

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

48-Lea d Th in S hri nk Sm all Ou tlin e Pack age (TSSOP ), JED EC MO-1 53, 6.1mm Wide

Package Number MTD48

Fairchild does not assum e any responsibility for use of any circuitry described, n o circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life suppor t de vices o r syst ems are dev ic es or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instruct ions fo r use provided in the l abe li ng, can be re a-

sonably expected to result in a significant injury to the

user.

2. A crit ical com ponen t in any com ponen t of a life s uppor t

device or system whose failure to perform can be rea-

sonabl y e xpec ted to cause th e fa i lure of the l ife suppor t

device or system, or to affect its safety or effectiveness.