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FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.5
December 2014
FODM8071
3.3V/5V Logic Gate Output Optocoupler with
High Noise Immunity
Features
■
High-noise Immunity Characterized by Common
Mode Rejection
– 20 kV/µs Minimum Common Mode Rejection
■
High Speed
– 20 Mbit/s Date Rate (NRZ)
– 55 ns Maximum Propagation Delay
– 20 ns Maximum Pulse Width Distortion
– 30 ns Maximum Propagation Delay Skew
■
3.3 V and 5 V CMOS Compatibility
■
Specifications Guaranteed Over 3 V to 5.5 V Supply
Voltage and -40°C to +110°C Temperature Range
■
Safety and Regulatory Approvals:
– UL1577, 3750 VAC
RMS
for 1 Minute
– DIN EN/IEC60747-5-5
Applications
■
Microprocessor System Interface:
– SPI, I
2
C
■
Industrial Fieldbus Communications:
– DeviceNet, CAN, RS485
■
Programmable Logic Control
■
Isolated Data Acquisition System
■
Voltage Level Translator
Description
The FODM8071 is a 3.3V/5V high-speed logic gate
output optocoupler, which supports isolated communica-
tions allowing digital signals to communicate between
systems without conducting ground loops or hazardous
voltages. It utilizes Fairchild’s patented coplanar packag-
ing technology, Optoplanar
®
, and optimized IC design to
achieve high-immunity, characterized by high common
mode rejection specifications.
This high-speed logic gate output optocoupler, housed in
a compact 5-pin Mini-Flat package, consists of a high-
speed AlGaAs LED at the input coupled to a CMOS
detector IC at the output. The detector IC comprises an
integrated photodiode, a high-speed transimpedance
amplifier and a voltage comparator with an output driver.
The CMOS technology coupled with a high-efficiency
LED achieves low power consumption as well as very
high speed (55 ns propagation delay, 20 ns pulse width
distortion).
Related Resources
■
FOD8001 Product Folder
■
FOD0721 Product Folder
Schematic
and Package Outline
1
3 4
5
6
VO
VDD
GND
ANODE
CATHODE
Truth Table
LED Output
Off High
On Low
Figure 1. Schematic and Package Outline
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.5 2
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Safety and Insulation Ratings
As per DIN EN/IEC 60747-5-5, this optocoupler is suitable for “safe electrical insulation” only within the safety limit
data. Compliance with the safety ratings shall be ensured by means of protective circuits.
Note:
1. Safety limit values – maximum values allowed in the event of a failure.
Parameter Characteristics
Installation Classifications per DIN VDE
0110/1.89 Table 1, For Rated Mains Voltage
< 150 V
RMS
I–IV
< 300 V
RMS
I–III
Climatic Classification 40/110/21
Pollution Degree (DIN VDE 0110/1.89) 2
Comparative Tracking Index 175
Symbol Parameter Value Unit
V
PR
Input-to-Output Test Voltage, Method A, V
IORM
x 1.6 = V
PR
,
Type and Sample Test with t
m
= 10 s, Partial Discharge < 5 pC 904 V
peak
Input-to-Output Test Voltage, Method B, V
IORM
x 1.875 = V
PR
,
100% Production Test with t
m
= 1 s, Partial Discharge < 5 pC 1060 V
peak
V
IORM
Maximum Working Insulation Voltage 565 V
peak
V
IOTM
Highest Allowable Over-Voltage 4000 V
peak
External Creepage
≥
5mm
External Clearance
≥
5mm
DTI Distance Through Insulation (Insulation Thickness)
≥
0.4 mm
T
S
Case Temperature
(1)
150 °C
I
S,INPUT
Input Current
(1)
200 mA
P
S,OUTPUT
Output Power
(1)
300 mW
R
IO
Insulation Resistance at T
S
, V
IO
= 500 V
(1)
> 10
9
Ω
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.5 3
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Pin Definitions
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. T
A
= 25ºC unless otherwise specified.
Notes:
2.
Derate linearly from 95˚C at a rate of -1.4 mW/˚C
3.
Derate linearly from 100˚C at a rate of -3.47 mW/˚C.
4.
Functional operation under these conditions is not implied. Permanent damage may occur if the device is subjected
to conditions outside these ratings.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Note:
5. 0.1µF bypass capacitor must be connected between 4 and 6.
Number Name Function Description
1 ANODE Anode
3 CATHODE Cathode
4 GND Output Ground
5V
O
Output Voltage
6V
DD
Output Supply Voltage
Symbol Parameter Value Unit
T
STG
Storage Temperature -40 to +125 ºC
T
OPR
Operating Temperature -40 to +110 ºC
T
J
Junction Temperature -40 to +125 ºC
T
SOL
Lead Solder Temperature (Refer to Reflow Temperature Profile) 260 for 10 seconds ºC
I
F
Forward Current 20 mA
V
R
Reverse Voltage 5 V
V
DD
Supply Voltage 0 to 6.0 V
V
O
Output Voltage -0.5 to V
DD
+
0.5 V
I
O
Average Output Current 10 mA
PD
I
Input Power Dissipation
(2)(4)
40 mW
PD
O
Output Power Dissipation
(3)(4)
70 mW
Symbol Parameter Min. Max. Unit
T
A
Ambient Operating Temperature -40 +110 ºC
V
DD
Supply Voltages
(5)
3.0 5.5 V
V
FL
Logic Low Input Voltage 0 0.8 V
I
FH
Logic High Input Current 5 16 mA
I
OL
Logic Low Output Current 0 7 mA
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.5 4
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Electrical Characteristics
Apply over all recommended conditions.T
A
= -40ºC to +110ºC, 3.0 V
≤
V
DD
≤
5.5 V, unless otherwise specified.
Typical value is measured at T
A
= 25ºC and V
DD
= 3.3 V.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
INPUT CHARACTERISTICS
V
F
Forward Voltage I
F
= 10 mA (Figure 2) 1.05 1.35 1.8 V
BV
R
Input Reverse
Breakdown Voltage I
R
= 10 µA 5 15 V
I
FHL
Threshold Input
Current (Figure 3) 2.8 5.0 mA
OUTPUT CHARACTERISTICS
I
DDL
Logic Low Output
Supply Current
V
DD
= 3.3 V, I
F
= 10 mA
(Figures 4 and 6) 3.3 4.8 mA
V
DD
= 5.0 V, I
F
= 10 mA
(Figures 4 and 7) 4.0 5.0 mA
I
DDH
Logic High Output
Supply Current
V
DD
= 3.3 V, I
F
= 0 mA (Figure 5) 3.3 4.8 mA
V
DD
= 5.0 V, I
F
= 0 mA (Figure 5) 4.0 5.0 mA
V
OH
Logic High Output
Voltage
V
DD
= 3.3 V, I
O
= -20 µA, I
F
= 0 mA V
DD
– 0.1 V 3.3 V
V
DD
= 3.3 V, I
O
= -4 mA, I
F
= 0 mA V
DD
– 0.5 V 3.1 V
V
DD
= 5.0 V, I
O
= -20 µA, I
F
= 0 mA V
DD
– 0.1 V 5.0 V
V
DD
= 5.0 V, I
O
= -4 mA, I
F
= 0 mA V
DD – 0.5 V 4.9 V
VOL
Logic Low Output
Voltage
IO = 20 µA, IF = 10 mA 0.0027 0.01 V
IO = 4 mA, IF = 10 mA 0.27 0.80 V
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.5 5
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Electrical Characteristics (Continued)
Apply over all recommended conditions.TA = -40ºC to +110ºC, 3.0 V ≤ VDD ≤ 5.5 V, unless otherwise specified.
Typical value is measured at TA = 25ºC and VDD = 3.3 V.
Switching Characteristics
Notes:
6. Data rate is based on 10 MHz, 50% NRZ pattern with a 50 nsec minimum bit time.
7. tPSK is equal to the magnitude of the worst case difference in tPHL and/or tPLH that will be seen between any two units
from the same manufacturing date code that are operated at same case temperature (±5°C), at the same operating
conditions, with equal loads (RL = 350 Ω and CL = 15 pF), and with an input rise time less than 5 ns.
8. Common mode transient immunity at output high is the maximum tolerable positive dVcm/dt on the leading edge of
the common mode impulse signal, Vcm, to assure that the output will remain high. Common mode transient immunity
at output low is the maximum tolerable negative dVcm/dt on the trailing edge of the common pulse signal, Vcm,
to assure that the output will remain low.
9. Unloaded dynamic power dissipation is calculated as follows: CPD x VDD x f + IDD + VPD where f is switched
time in MHz.
Isolation Characteristics
Notes:
10.Device is considered a two terminal device: pins 1, and 3 are shorted together and pins 4, 5, and 6 are shorted
together.
11.3,750 VACRMS for 1 minute duration is equivalent to 4,500 VACRMS for 1 second duration.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
Date Rate(6) 20 Mbps
tPW Pulse Width 50 ns
tPHL
Propagation Delay Time
to Logic Low Output
CL = 15 pF
(Figures 8, 9, and 13) 31 55 ns
tPLH
Propagation Delay Time
to Logic High Output
CL = 15 pF
(Figures 8, 9, and 13) 25 55 ns
PWD Pulse Width Distortion,
| tPHL - tPLH|
CL = 15 pF
(Figures 10 and 11) 5.5 20 ns
tPSK Propagation Delay Skew CL = 15 pF(7) 30 ns
tR
Output Rise Time
(10% to 90%) (Figure 12 and 13) 5.8 ns
tF
Output Fall Time
(90% to 10%) (Figure 12 and 13) 5.3 ns
| CMH |Common Mode Transient
Immunity at Output High
IF = 0 mA, VO > 0.8 VDD,
VCM = 1000 V, TA = 25ºC,
(Figure14)(8) 20 40 kV/µs
| CML |Common Mode Transient
Immunity at Output Low
IF = 5 mA, VO < 0.8 V,
VCM = 1000 V, TA = 25ºC,
(Figure14)(8) 20 40 kV/µs
CPDO
Output Dynamic Power
Dissipation
Capacitance(9) 4pF
Symbol Parameter Conditions Min. Typ. Max. Unit
VISO Input-Output Isolation
Voltage
f = 60 Hz, t = 1.0 minute,
II-O ≤ 10 µA(10)(11) 3750 VacRMS
RISO Isolation Resistance VI-O = 500 V(10) 1011 Ω
CISO Isolation Capacitance VI-O = 0 V, f = 1.0 MHz(10) 0.2 pF
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.5 6
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Typical Performance Curves
0.01
0.1
1
10
100
0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6
VF – FORWARD VOLTAGE (V)
IF – INPUT FORWARD CURRENT (mA)
IFHL – INPUT THRESHOLD CURRENT (mA)
IDDH – LOGIC HIGH OUTPUT SUPPLY CURRENT (mA)
TA – AMBIENT TEMPERATURE (°C)
TA – AMBIENT TEMPERATURE (°C)
TA
= 110°C TA
= 25°C TA
= -40°C
4.0
3.5
3.0
2.5
2.0
-40 -20 0 20 40 60 80 100
Figure 3. Input Threshold Current
vs. Ambient Temperature
VDD
VDD = 3.3 V
2.0
2.5
3.0
3.5
4.0
4.5
5.0
-40 -20 0 20 40 60 80 100
Figure 5. Logic High Output Supply Current
vs. Ambient Temperature
IDDL – LOGIC LOW OUTPUT SUPPLY CURRENT (mA)
TA – AMBIENT TEMPERATURE (°C)
Figure 4. Logic Low Output Supply Current
vs. Ambient Temperature
VDD = 3.3 V
VDD
= 5.0 V
IF = 0mA
2.0
2.5
3.0
3.5
4.0
4.5
-40 -20 0 20 40 60 80 100
VDD = 3.3 V
VDD
= 5.0 V
IF = 10 mA
5.0
Figure 2. Input Forward Current
vs. Forward Voltage
= 5.0 V
5.5
5.0
4.5
4.0
3.5
3.0
5.0
4.5
4.0
3.5
3.0
2.5
0 2000 4000 6000 8000 10000
Figure 6. Dynamic Logic Low Output Supply Current
vs. Input Frequency (VDD = 3.3V)
Figure 7. Dynamic Logic Low Output Supply Current
vs. Input Frequency (VDD = 5.0V)
f – INPUT FREQUENCY (kHz)
TA
= -40°C
Frequency = 10M Hz
Duty Cycle = 50%
IF
= 10 mA
VDD = 3.3 V
TA
= 25°C
TA
= 110°C
0 2000 4000 6000 8000 10000
Frequency = 10 MHz
Duty Cycle = 50%
IF
= 10 mA
VDD = 5.0 V
TA
= 110°C
TA
= -40°C
TA
= 25°C
IDDL – DYNAMIC LOGIC LOW OUTPUT
SUPPLY CURRENT (mA)
f – INPUT FREQUENCY (kHz)
IDDL – DYNAMIC LOGIC LOW OUTPUT
SUPPLY CURRENT (mA)
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.5 7
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Typical Performance Curves (Continued)
tP – PROPAGATION DELAY (ns)
IF – PULSE INPUT CURRENT (mA)
15
12
9
6
3
0
4 6 8 10121416
Figure 11. Pulse Width Distortion
vs Pulse Input Current
VDD = 5.0 V
VDD = 3.3 V
Frequency = 10MHz
Duty Cycle = 50%
TA
= 25°C
10
15
20
25
30
35
40
45
50
-40 -20 0 20 40 60 80 100
Figure 8. Propagation Delay
vs. Ambient Temperature
VDD = 3.3 V
VDD = 5.0 V
Frequency = 10 MHz
Duty Cycle = 50%
F
= 5 mA
PHL
t
t
PHL
t
PLH
tPLH
I
10
9
8
7
6
5
4
3
-40 -20 0 20 40 60 80 100
Figure 12. Rise and Fall Time vs. Ambient Temperature
VDD = 3.3 V
VDD = 5.0 V
tR
tFtR
tF
Frequency = 10 MHz
Duty Cycle = 50%
IF
= 5 mA
20
15
10
5
0
-5
-40 -20 0 20 40 60 80 100
Figure 10. Pulse Width Distortion
vs. Ambient Temperature
VDD = 3.3V
Frequency = 10MHz
Duty Cycle = 50%
IF
= 5mA
VDD = 5.0V
TA – AMBIENT TEMPERATURE (°C)
(| tPHL – tPLH |) – PULSE WIDTH DISTORTION (ns)
(| tPHL – tPLH |) – PULSE WIDTH DISTORTION (ns)
tR, tF – RISE, FALL TIME (ns)
TA – AMBIENT TEMPERATURE (°C)
TA – AMBIENT TEMPERATURE (°C)
tP – PROPAGATION DELAY (ns)
IF – PULSE INPUT CURRENT (mA)
10
15
20
25
30
35
40
4 6 8 10121416
Figure 9. Propagation Delay
vs. Pulse Input Current
VDD = 3.3 V
VDD = 5.0 V
tPLH
tPHL
tPLH
tPHL
Frequency = 10 MHz
Duty Cycle = 50%
TA
= 25°C
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.5 8
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Schematics
Figure 13. Test Circuit for Propagation Delay Time, Rise Time and Fall Time
Figure 14. Test Circuit for Instantaneous Common Mode Rejection Voltage
Output
V
O
Monitoring
Node
t
PHL
C
L
= 15 pF
R
IN
V
CC
0.1 μF
Pulse Gen.
t
f
= tr = 5 ns
Z
O
= 50 Ω
Input
Monitoring
Node
t
f
t
r
t
PLH
I
F
= 5 mA
50%
V
OL
90%
50%
10%
90%
10%
Input
V
OL
Pulse Gen
V
CM
V
CM
CM
H
CM
L
V
FF
V
DD
A
B
I
F
0.1 μF
Bypass Output
(Vo)
V
OH
GND
0.8 x V
DD
Switching Pos. (A), IF = 0
Switching Pos. (B), IF = 5 mA
0.8V
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.5 9
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Reflow Profile
Figure 15. Reflow Profile
Profile Feature Pb-Free Assembly Profile
Temperature Min. (Tsmin) 150°C
Temperature Max. (Tsmax) 200°C
Time (tS) from (Tsmin to Tsmax) 60–120 seconds
Ramp-up Rate (tL to tP) 3°C/second maximum
Liquidous Temperature (TL) 217°C
Time (tL) Maintained Above (TL) 60–150 seconds
Peak Body Package Temperature 260°C +0°C / –5°C
Time (tP) within 5°C of 260°C 30 seconds
Ramp-down Rate (TP to TL) 6°C/second maximum
Time 25°C to Peak Temperature 8 minutes maximum
Time (seconds)
Temperature (°C)
Time 25°C to Peak
260
240
220
200
180
160
140
120
100
80
60
40
20
0
TL
ts
tL
tP
TP
Tsmax
Tsmin
120
Preheat Area
Max. Ramp-up Rate = 3°C/S
Max. Ramp-down Rate = 6°C/S
240 360
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.5 10
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Ordering Information
All packages are lead free per JEDEC: J-STD-020B standard.
Marking Information
Figure 16. Top Mark
Table 1. Top Mark Definitions
Part Number Package Packing Method
FODM8071 Mini-Flat 5-Pin Tube (100 Units)
FODM8071R2 Mini-Flat 5-Pin Tape and Reel (2500 Units)
FODM8071V Mini-Flat 5-Pin, DIN EN/IEC60747-5-5 Option Tube (100 Units)
FODM8071R2V Mini-Flat 5-Pin, DIN EN/IEC60747-5-5 Option Tape and Reel (2500 Units)
1 Fairchild Logo
2 Device Number
3 DIN EN/IEC60747-5-5 Option (only appears on component ordered with this option)
4 One-Digit Year Code, e.g., “4”
5 Digit Work Week, Ranging from “01” to “53”
6 Assembly Package Code
1
2
6
43 5
M8071
MYYX
V
V
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.5 11
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Package Dimensions
Figure 17. MLP 5L Package
© Fairchild Semiconductor Corporation www.fairchildsemi.com
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intended to be an exhaustiv e list of all such trademarks.
AccuPower
AttitudeEngine™
Awinda
®
AX-CAP
®
*
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Build it Now
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CROSSVOLT
CTL
Current Transfer Logic
DEUXPEED
®
Dual Cool™
EcoSPARK
®
EfficientMax
ESBC
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®
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®
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®
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®
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SM
GreenBridge
Green FPS
Green FPS e-Serie s
Gmax
GTO
IntelliMAX
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Making Small Speakers Sound Louder
and Better™
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MicroFET
MicroPak
MicroPak2
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SMART START
Solutions for Your Success
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Sync-Lock™
®*
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™
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
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ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT C ONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF
OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE
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AUTHORIZED USE
Unless otherw ise speci fied in this da ta sh eet, this pr oduct is a stand ard commercial produ ct and is not intended for use in appl ication s that require extraordi nary
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Counterfeiting of semiconductor parts is a growing pro blem in the indu stry. All m anufactur ers of sem iconductor products a re ex periencing cou nterfeiting o f their
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specific ations may change
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Preliminary First Production
Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild
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No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make
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Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor.
The datasheet is for reference information only.
Rev. I76
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