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FODM8071 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity Features Description High-noise Immunity Characterized by Common The FODM8071 is a 3.3V/5V high-speed logic gate output optocoupler, which supports isolated communications allowing digital signals to communicate between systems without conducting ground loops or hazardous voltages. It utilizes Fairchild's patented coplanar packaging technology, Optoplanar(R), and optimized IC design to achieve high-immunity, characterized by high common mode rejection specifications. Mode Rejection - 20 kV/s Minimum Common Mode Rejection High Speed - 20 Mbit/s Date Rate (NRZ) - 55 ns Maximum Propagation Delay - 20 ns Maximum Pulse Width Distortion - 30 ns Maximum Propagation Delay Skew 3.3 V and 5 V CMOS Compatibility Specifications Guaranteed Over 3 V to 5.5 V Supply Voltage and -40C to +110C Temperature Range Safety and Regulatory Approvals: - UL1577, 3750 VACRMS for 1 Minute - DIN EN/IEC60747-5-5 Applications Microprocessor System Interface: - SPI, I2C Industrial Fieldbus Communications: - DeviceNet, CAN, RS485 Programmable Logic Control Isolated Data Acquisition System Voltage Level Translator This high-speed logic gate output optocoupler, housed in a compact 5-pin Mini-Flat package, consists of a highspeed AlGaAs LED at the input coupled to a CMOS detector IC at the output. The detector IC comprises an integrated photodiode, a high-speed transimpedance amplifier and a voltage comparator with an output driver. The CMOS technology coupled with a high-efficiency LED achieves low power consumption as well as very high speed (55 ns propagation delay, 20 ns pulse width distortion). Related Resources FOD8001 Product Folder FOD0721 Product Folder Schematic and Package Outline Truth Table 6 VDD ANODE 1 5 VO LED Output Off High On Low 4 GND CATHODE 3 Figure 1. Schematic and Package Outline (c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.5 www.fairchildsemi.com FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity December 2014 As per DIN EN/IEC 60747-5-5, this optocoupler is suitable for "safe electrical insulation" only within the safety limit data. Compliance with the safety ratings shall be ensured by means of protective circuits. Parameter Installation Classifications per DIN VDE 0110/1.89 Table 1, For Rated Mains Voltage Characteristics < 150 VRMS I-IV < 300 VRMS I-III Climatic Classification 40/110/21 Pollution Degree (DIN VDE 0110/1.89) 2 Comparative Tracking Index Symbol 175 Value Unit Input-to-Output Test Voltage, Method A, VIORM x 1.6 = VPR, Type and Sample Test with tm = 10 s, Partial Discharge < 5 pC 904 Vpeak Input-to-Output Test Voltage, Method B, VIORM x 1.875 = VPR, 100% Production Test with tm = 1 s, Partial Discharge < 5 pC 1060 Vpeak VIORM Maximum Working Insulation Voltage 565 Vpeak VIOTM Highest Allowable Over-Voltage VPR Parameter 4000 Vpeak External Creepage 5 mm External Clearance 5 mm DTI Distance Through Insulation (Insulation Thickness) 0.4 mm TS Case Temperature(1) 150 C IS,INPUT Current(1) 200 mA 300 mW Input PS,OUTPUT Output RIO Power(1) Insulation Resistance at TS, VIO = 500 V(1) > 109 Note: 1. Safety limit values - maximum values allowed in the event of a failure. (c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.5 www.fairchildsemi.com 2 FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity Safety and Insulation Ratings Number Name Function Description 1 ANODE 3 CATHODE Anode 4 GND Cathode Output Ground 5 VO Output Voltage 6 VDD Output Supply Voltage Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA = 25C unless otherwise specified. Symbol Parameter Value Unit TSTG Storage Temperature -40 to +125 C TOPR Operating Temperature -40 to +110 C Junction Temperature -40 to +125 C 260 for 10 seconds C TJ TSOL Lead Solder Temperature (Refer to Reflow Temperature Profile) IF Forward Current 20 mA VR Reverse Voltage 5 V VDD Supply Voltage 0 to 6.0 V VO Output Voltage -0.5 to VDD + 0.5 V Average Output Current 10 mA PDI Input Power Dissipation(2)(4) 40 mW PDO Output Power Dissipation(3)(4) 70 mW IO Notes: 2. Derate linearly from 95C at a rate of -1.4 mW/C 3. Derate linearly from 100C at a rate of -3.47 mW/C. 4. Functional operation under these conditions is not implied. Permanent damage may occur if the device is subjected to conditions outside these ratings. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol TA Parameter Min. Max. Unit Ambient Operating Temperature -40 +110 C VDD Supply Voltages(5) 3.0 5.5 V VFL Logic Low Input Voltage 0 0.8 V IFH Logic High Input Current 5 16 mA IOL Logic Low Output Current 0 7 mA Note: 5. 0.1F bypass capacitor must be connected between 4 and 6. (c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.5 www.fairchildsemi.com 3 FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity Pin Definitions Apply over all recommended conditions.TA = -40C to +110C, 3.0 V VDD 5.5 V, unless otherwise specified. Typical value is measured at TA = 25C and VDD = 3.3 V. Symbol Parameter Test Conditions Min. Typ. Max. Unit 1.05 1.35 1.8 V 5 15 INPUT CHARACTERISTICS VF Forward Voltage IF = 10 mA (Figure 2) BVR Input Reverse Breakdown Voltage IR = 10 A IFHL Threshold Input Current (Figure 3) 2.8 5.0 mA VDD = 3.3 V, IF = 10 mA (Figures 4 and 6) 3.3 4.8 mA VDD = 5.0 V, IF = 10 mA (Figures 4 and 7) 4.0 5.0 mA VDD = 3.3 V, IF = 0 mA (Figure 5) 3.3 4.8 mA VDD = 5.0 V, IF = 0 mA (Figure 5) 4.0 5.0 mA V OUTPUT CHARACTERISTICS IDDL IDDH VOH VOL Logic Low Output Supply Current Logic High Output Supply Current Logic High Output Voltage Logic Low Output Voltage (c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.5 VDD = 3.3 V, IO = -20 A, IF = 0 mA VDD - 0.1 V 3.3 V VDD = 3.3 V, IO = -4 mA, IF = 0 mA VDD - 0.5 V 3.1 V VDD = 5.0 V, IO = -20 A, IF = 0 mA VDD - 0.1 V 5.0 V VDD = 5.0 V, IO = -4 mA, IF = 0 mA VDD - 0.5 V 4.9 V IO = 20 A, IF = 10 mA 0.0027 0.01 V IO = 4 mA, IF = 10 mA 0.27 0.80 V www.fairchildsemi.com 4 FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity Electrical Characteristics Apply over all recommended conditions.TA = -40C to +110C, 3.0 V VDD 5.5 V, unless otherwise specified. Typical value is measured at TA = 25C and VDD = 3.3 V. Switching Characteristics Symbol Date Parameter Test Conditions Min. Typ. Rate(6) Max. Unit 20 Mbps tPW Pulse Width 50 ns tPHL Propagation Delay Time to Logic Low Output CL = 15 pF (Figures 8, 9, and 13) 31 55 ns tPLH Propagation Delay Time to Logic High Output CL = 15 pF (Figures 8, 9, and 13) 25 55 ns PWD Pulse Width Distortion, | tPHL - tPLH| CL = 15 pF (Figures 10 and 11) 5.5 20 ns tPSK Propagation Delay Skew CL = 15 pF(7) 30 ns tR Output Rise Time (10% to 90%) (Figure 12 and 13) 5.8 ns tF Output Fall Time (90% to 10%) (Figure 12 and 13) 5.3 ns | CMH | Common Mode Transient Immunity at Output High IF = 0 mA, VO > 0.8 VDD, VCM = 1000 V, TA = 25C, (Figure14)(8) 20 40 kV/s | CML | Common Mode Transient Immunity at Output Low IF = 5 mA, VO < 0.8 V, VCM = 1000 V, TA = 25C, (Figure14)(8) 20 40 kV/s CPDO Output Dynamic Power Dissipation Capacitance(9) 4 pF Notes: 6. Data rate is based on 10 MHz, 50% NRZ pattern with a 50 nsec minimum bit time. 7. tPSK is equal to the magnitude of the worst case difference in tPHL and/or tPLH that will be seen between any two units from the same manufacturing date code that are operated at same case temperature (5C), at the same operating conditions, with equal loads (RL = 350 and CL = 15 pF), and with an input rise time less than 5 ns. 8. Common mode transient immunity at output high is the maximum tolerable positive dVcm/dt on the leading edge of the common mode impulse signal, Vcm, to assure that the output will remain high. Common mode transient immunity at output low is the maximum tolerable negative dVcm/dt on the trailing edge of the common pulse signal, Vcm, to assure that the output will remain low. 9. Unloaded dynamic power dissipation is calculated as follows: CPD x VDD x f + IDD + VPD where f is switched time in MHz. Isolation Characteristics Symbol Parameter Conditions Min. Typ. Max. Unit VISO Input-Output Isolation Voltage f = 60 Hz, t = 1.0 minute, II-O 10 A(10)(11) 3750 VacRMS RISO Isolation Resistance VI-O = 500 V(10) 1011 CISO Isolation Capacitance VI-O = 0 V, f = 1.0 MHz(10) 0.2 pF Notes: 10.Device is considered a two terminal device: pins 1, and 3 are shorted together and pins 4, 5, and 6 are shorted together. 11.3,750 VACRMS for 1 minute duration is equivalent to 4,500 VACRMS for 1 second duration. (c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.5 www.fairchildsemi.com 5 FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity Electrical Characteristics (Continued) 4.0 IFHL - INPUT THRESHOLD CURRENT (mA) IF - INPUT FORWARD CURRENT (mA) 100 10 1 0.1 TA = 110C 0.01 0.8 0.9 TA = 25C TA = -40C 1.0 1.1 1.2 1.3 1.4 VF - FORWARD VOLTAGE (V) 1.5 3.5 VDD = 5.0 V 3.0 VDD = 3.3 V 2.5 2.0 -40 1.6 IDDH - LOGIC HIGH OUTPUT SUPPLY CURRENT (mA) IDDL - LOGIC LOW OUTPUT SUPPLY CURRENT (mA) IF = 10 mA 4.5 V DD = 5.0 V 4.0 VDD = 3.3 V 3.5 3.0 2.5 2.0 0 20 40 60 80 TA - AMBIENT TEMPERATURE (C) 100 Figure 4. Logic Low Output Supply Current vs. Ambient Temperature 4.0 TA = 25C 3.5 TA = 110C 60 80 100 5.0 IF = 0mA 4.5 V DD = 5.0 V 4.0 V 3.5 DD = 3.3 V 3.0 2.5 2.0 -40 5.5 Frequency = 10M Hz Duty Cycle = 50% IF = 10 mA VDD = 3.3 V 4.5 40 -20 0 20 40 60 80 TA - AMBIENT TEMPERATURE (C) 100 Figure 5. Logic High Output Supply Current vs. Ambient Temperature IDDL - DYNAMIC LOGIC LOW OUTPUT SUPPLY CURRENT (mA) IDDL - DYNAMIC LOGIC LOW OUTPUT SUPPLY CURRENT (mA) 5.0 20 Figure 3. Input Threshold Current vs. Ambient Temperature 5.0 -20 0 TA - AMBIENT TEMPERATURE (C) Figure 2. Input Forward Current vs. Forward Voltage -40 -20 TA = -40C 3.0 2.5 Frequency = 10 MHz Duty Cycle = 50% IF = 10 mA VDD = 5.0 V 5.0 T = 25C A 4.5 TA = -40C 4.0 TA = 110C 3.5 3.0 0 2000 4000 6000 8000 f - INPUT FREQUENCY (kHz) 0 10000 4000 6000 8000 10000 f - INPUT FREQUENCY (kHz) Figure 6. Dynamic Logic Low Output Supply Current vs. Input Frequency (VDD = 3.3V) (c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.5 2000 Figure 7. Dynamic Logic Low Output Supply Current vs. Input Frequency (VDD = 5.0V) www.fairchildsemi.com 6 FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity Typical Performance Curves 50 tP - PROPAGATION DELAY (ns) 45 tP - PROPAGATION DELAY (ns) 40 Frequency = 10 MHz Duty Cycle = 50% IF = 5 mA 40 35 tPHL 30 tPHL tPLH 25 tPLH 20 Frequency = 10 MHz Duty Cycle = 50% TA = 25C 35 tPLH 30 tPLH 25 tPHL 20 tPHL 15 VDD = 3.3 V V = 5.0 V DD VDD = 3.3 V VDD = 5.0 V 15 10 10 -40 -20 0 20 40 60 80 4 100 6 TA - AMBIENT TEMPERATURE (C) 20 Frequency = 10MHz Duty Cycle = 50% IF = 5mA 15 10 VDD = 3.3V 5 VDD = 5.0V 0 -5 -40 14 16 Figure 9. Propagation Delay vs. Pulse Input Current (| tPHL - tPLH |) - PULSE WIDTH DISTORTION (ns) (| tPHL - tPLH |) - PULSE WIDTH DISTORTION (ns) Figure 8. Propagation Delay vs. Ambient Temperature 8 10 12 IF - PULSE INPUT CURRENT (mA) 15 Frequency = 10MHz Duty Cycle = 50% TA = 25C 12 9 VDD = 3.3 V 6 3 VDD = 5.0 V 0 -20 0 20 40 60 80 TA - AMBIENT TEMPERATURE (C) 100 4 Figure 10. Pulse Width Distortion vs. Ambient Temperature 10 tR, tF - RISE, FALL TIME (ns) 9 6 8 10 12 14 IF - PULSE INPUT CURRENT (mA) 16 Figure 11. Pulse Width Distortion vs Pulse Input Current Frequency = 10 MHz Duty Cycle = 50% IF = 5 mA 8 7 tR 6 tF tR 5 tF 4 3 -40 -20 0 VDD = 3.3 V VDD = 5.0 V 20 40 60 80 100 TA - AMBIENT TEMPERATURE (C) Figure 12. Rise and Fall Time vs. Ambient Temperature (c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.5 www.fairchildsemi.com 7 FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity Typical Performance Curves (Continued) FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity Schematics VCC Pulse Gen. tf = tr = 5 ns ZO = 50 0.1 F Input Monitoring Node VO Monitoring Node CL = 15 pF RIN IF = 5 mA 50% Input tPHL tPLH tf Output tr 90% 90% 50% 10% VOL 10% Figure 13. Test Circuit for Propagation Delay Time, Rise Time and Fall Time IF VDD 0.1 F Bypass A Output (Vo) B VFF VCM Pulse Gen VCM GND VOH Switching Pos. (A), IF = 0 CMH 0.8 x VDD 0.8V VOL Switching Pos. (B), IF = 5 mA CML Figure 14. Test Circuit for Instantaneous Common Mode Rejection Voltage (c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.5 www.fairchildsemi.com 8 FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity Reflow Profile Temperature (C) TP 260 240 TL 220 200 180 160 140 120 100 80 60 40 20 0 Max. Ramp-up Rate = 3C/S Max. Ramp-down Rate = 6C/S tP Tsmax tL Preheat Area Tsmin ts 120 240 360 Time 25C to Peak Time (seconds) Figure 15. Reflow Profile Profile Feature Pb-Free Assembly Profile Temperature Min. (Tsmin) 150C Temperature Max. (Tsmax) 200C Time (tS) from (Tsmin to Tsmax) 60-120 seconds Ramp-up Rate (tL to tP) 3C/second maximum Liquidous Temperature (TL) 217C Time (tL) Maintained Above (TL) 60-150 seconds Peak Body Package Temperature 260C +0C / -5C Time (tP) within 5C of 260C 30 seconds Ramp-down Rate (TP to TL) 6C/second maximum Time 25C to Peak Temperature (c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.5 8 minutes maximum www.fairchildsemi.com 9 Part Number Package Packing Method FODM8071 Mini-Flat 5-Pin Tube (100 Units) FODM8071R2 Mini-Flat 5-Pin Tape and Reel (2500 Units) FODM8071V Mini-Flat 5-Pin, DIN EN/IEC60747-5-5 Option Tube (100 Units) FODM8071R2V Mini-Flat 5-Pin, DIN EN/IEC60747-5-5 Option Tape and Reel (2500 Units) All packages are lead free per JEDEC: J-STD-020B standard. Marking Information 1 V 3 M8071 2 X YY M 6 4 5 Figure 16. Top Mark Table 1. Top Mark Definitions 1 Fairchild Logo 2 Device Number 3 DIN EN/IEC60747-5-5 Option (only appears on component ordered with this option) 4 One-Digit Year Code, e.g., "4" 5 Digit Work Week, Ranging from "01" to "53" 6 Assembly Package Code (c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.5 www.fairchildsemi.com 10 FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity Ordering Information FODM8071 -- 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity Package Dimensions Figure 17. MLP 5L Package (c)2008 Fairchild Semiconductor Corporation FODM8071 Rev. 1.5 www.fairchildsemi.com 11 TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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