Document Number: MMA6260Q
Rev 3, 10/2006
Freescale Semiconductor
Technical Data
© Freescale Semiconductor, Inc., 2006. All rights reserved.
±1.5g Dual Axis
Micromachined Accelerometer
The MMA6200 series of low cost capacitive micromachined accelerometers
feature signal conditioning, a 1-pole low pass filter and temperature compensa-
tion. Zero-g offset full scale span and filter cut-off are factory set and require no
external devices. A full system self-test capability verifies system functionality.
Features
High Sensitivity
Low Noise
Low Power
2.7 V to 3.6 V Operation
6mm x 6mm x 1.98mm QFN
Integral Signal Conditioning with Low Pass Filter
Linear Output
Ratiometric Performance
•Self-Test
Robust Design, High Shocks Survivability
Typical Applications
Tilt Monitoring
Position & Motion Sensing
Freefall Detection
Impact Monitoring
Appliance Control
Vibration Monitoring and Recording
Smart Portable Electronics
ORDERING INFORMATION
Device Name Bandwidth
Response IDD Case No. Package
MMA6260Q 50 Hz 1.2 mA 1477-02 QFN-16, Tube
MMA6260QR2 50 Hz 1.2 mA 1477-02 QFN-16,Tape & Reel
MMA6261Q 300 Hz 1.2 mA 1477-02 QFN-16, Tube
MMA6261QR2 300 Hz 1.2 mA 1477-02 QFN-16,Tape & Reel
MMA6262Q 150 Hz 2.2 mA 1477-02 QFN-16,Tube
MMA6262QR2 150 Hz 2.2 mA 1477-02 QFN-16,Tape & Reel
MMA6263Q 900 Hz 2.2 mA 1477-02 QFN-16, Tube
MMA6263QR2 900 Hz 2.2 mA 1477-02 QFN-16,Tape & Reel
MMA6260Q
MMA6261Q
MMA6262Q
MMA6263Q
MMA6260Q Series: X-Y AXIS
SENSITIVITY MICROMACHINED
ACCELEROMETER
±1.5 g
16-LEAD
QFN
CASE 1477-02
Top View
Figure 1. Pin Connections
Bottom View
1516 14 13
12
11
10
1
2
3
4
5678
9N/C
N/C
N/C
N/C
N/CN/C
N/C
N/C
N/C
X
OUT
Y
OUT
ST
NC
NC
V
DD
V
SS
MMA6260Q
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2Freescale Semiconductor
ELECTRO STATIC DISCHARGE (ESD)
WARNING: This device is sensitive to electrostatic
discharge.
Although the Freescale accelerometers contain internal
2 kV ESD protection circuitry, extra precaution must be taken
by the user to protect the chip from ESD. A charge of over
2000 volts can accumulate on the human body or associated
test equipment. A charge of this magnitude can alter the
performance or cause failure of the chip. When handling the
accelerometer, proper ESD precautions should be followed
to avoid exposing the device to discharges which may be
detrimental to its performance.
X-FilterX-GainX-Integrator X-Temp
Comp
Clock Generator
Oscillator
Control Logic &
EEPROM Trim Circuits
Y-Temp
Comp
Y-FilterY-GainY-Integrator
G-Cell
Sensor
Self Test
ST
VDD
XOUT
YOUT
VSS
Figure 2. Simplified Accelerometer Functional Block Diagram
Table 1. Maximum Ratings
(Maximum ratings are the limits to which the device can be exposed without causing permanent damage.)
Rating Symbol Value Unit
Maximum Acceleration (all axis) gmax ±2000 g
Supply Voltage VDD –0.3 to +3.6 V
Drop Test(1)
1. Dropped onto concrete surface from any axis.
Ddrop 1.2 m
Storage Temperature Range Tstg 40 to +125 °C
MMA6260Q
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Freescale Semiconductor 3
Table 2. Operating Characteristics
Unless otherwise noted: –20°C < TA < 85°C, 3.0 V < VDD < 3.6 V, Acceleration = 0g, Loaded output (1)
1. For a loaded output, the measurements are observed after an RC filter consisting of a 1.0 k resistor and a 0.1 µF capacitor to ground.
Characteristic Symbol Min Typ Max Unit
Operating Range(2)
2. These limits define the range of operation for which the part will meet specification.
Supply Voltage(3)
3. Within the supply range of 2.7 and 3.6 V, the device operates as a fully calibrated linear accelerometer. Beyond these supply limits the device
may operate as a linear device but is not guaranteed to be in calibration.
VDD 2.7 3.3 3.6 V
Supply Current
MMA6260Q, MMA6261Q IDD —1.2 1.5 mA
MMA6262Q, MMA6263Q IDD —2.2 3.0 mA
Operating Temperature Range TA–20 +85 °C
Acceleration Range gFS —1.5 g
Output Signal
Zero g (TA = 25°C, VDD = 3.3 V)(4)
4. The device can measure both + and – acceleration. With no input acceleration the output is at midsupply. For positive acceleration the output
will increase above VDD/2. For negative acceleration, the output will decrease below VDD/2.
VOFF 1.485 1.65 1.815 V
Zero g VOFF, TA—2.0 mg/°C
Sensitivity (TA = 25°C, VDD = 3.3 V) S 740 800 860 mV/g
Sensitivity S, TA 0.015 %/°C
Bandwidth Response
MMA6260Q f_3dB —50 Hz
MMA6261Q f_3dB 300 Hz
MMA6262Q f_3dB 150 Hz
MMA6263Q f_3dB 900 Hz
Nonlinearity NLOUT –1.0 +1.0 % FSO
Noise
MMA6260Q RMS (0.1 Hz – 1 kHz) nRMS —1.8mVrms
MMA6261Q RMS (0.1 Hz – 1 kHz) nRMS —3.5
MMA6262Q RMS (0.1 Hz – 1 kHz) nRMS —1.3
MMA6263Q RMS (0.1 Hz – 1 kHz) nRMS —2.5
Power Spectral Density RMS (0.1 Hz – 1 kHz)
MMA6260Q, MMA6261Q nPSD 300 ug/Hz
MMA6262Q, MMA6263Q nPSD 200
Self-Test
Output Response VST 0.9 VDD —V
DD V
Input Low VIL 0.3 VDD V
Input High VIH 0.7 VDD —V
DD V
Pull-Down Resistance(5)
5. The digital input pin has an internal pull-down resistance to prevent inadvertent self-test initiation due to external board level leakages.
RPO 43 57 71 k
Response Time(6)
6. Time for the output to reach 90% of its final value after a self-test is initiated.
tST —2.0 ms
Output Stage Performance
Full-Scale Output Range (IOUT = 200 µA) VFSO VSS +0.25 VDD –0.25 V
Capacitive Load Drive(7)
7. Preserves phase margin (60°) to guarantee output amplifier stability.
CL 100 pF
Output Impedance ZO 50 300
Power-Up Response Time
MMA6260Q tRESPONSE —14 ms
MMA6261Q tRESPONSE —2.0 ms
MMA6262Q tRESPONSE —4.0 ms
MMA6263Q tRESPONSE —0.7 ms
Mechanical Characteristics
Transverse Sensitivity(8)
8. A measure of the device’s ability to reject an acceleration applied 90° from the true axis of sensitivity.
VZX, YX, ZY –5.0 +5.0 % FSO
MMA6260Q
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4Freescale Semiconductor
PRINCIPLE OF OPERATION
The Freescale accelerometer is a surface-micromachined
integrated-circuit accelerometer.
The device consists of a surface micromachined
capacitive sensing cell (g-cell) and a signal conditioning ASIC
contained in a single integrated circuit package. The sensing
element is sealed hermetically at the wafer level using a bulk
micromachined cap wafer.
The g-cell is a mechanical structure formed from
semiconductor materials (polysilicon) using semiconductor
processes (masking and etching). It can be modeled as a set
of beams attached to a movable central mass that moves
between fixed beams. The movable beams can be deflected
from their rest position by subjecting the system to an
acceleration (Figure 3).
As the beams attached to the central mass move, the
distance from them to the fixed beams on one side will
increase by the same amount that the distance to the fixed
beams on the other side decreases. The change in distance
is a measure of acceleration.
The g-cell plates form two back-to-back capacitors
(Figure 4). As the center plate moves with acceleration, the
distance between the plates changes and each capacitor's
value will change, (C = Aε/D). Where A is the area of the
plate, ε is the dielectric constant, and D is the distance
between the plates.
The ASIC uses switched capacitor techniques to measure
the g-cell capacitors and extract the acceleration data from
the difference between the two capacitors. The ASIC also
signal conditions and filters (switched capacitor) the signal,
providing a high level output voltage that is ratiometric and
proportional to acceleration.
SPECIAL FEATURES
Filtering
These Freescale accelerometers contain an onboard
single-pole switched capacitor filter. Because the filter is
realized using switched capacitor techniques, there is no
requirement for external passive components (resistors and
capacitors) to set the cut-off frequency.
Self-Test
The sensor provides a self-test feature allowing the
verification of the mechanical and electrical integrity of the
accelerometer at any time before or after installation. A fourth
plate is used in the g-cell as a self-test plate. When a logic
high input to the self-test pin is applied, a calibrated potential
is applied across the self-test plate and the moveable plate.
The resulting electrostatic force (Fe = 1/2AV2/d2) causes the
center plate to deflect. The resultant deflection is measured
by the accelerometer's ASIC and a proportional output
voltage results. This procedure assures both the mechanical
(g-cell) and electronic sections of the accelerometer are
functioning.
Freescale accelerometers include fault detection circuitry
and a fault latch. Parity of the EEPROM bits becomes odd in
number.
Self-test is disabled when EEPROM parity error occurs.
Ratiometricity
Ratiometricity simply means the output offset voltage and
sensitivity will scale linearly with applied supply voltage. That
is, as supply voltage is increased, the sensitivity and offset
increase linearly; as supply voltage decreases, offset and
sensitivity decrease linearly. This is a key feature when
interfacing to a microcontroller or an A/D converter because
it provides system level cancellation of supply induced errors
in the analog to digital conversion process.
Acceleration
Figure 3. Transducer
Physical Model
Figure 4. Equivalent
Circuit Model
MMA6260Q
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Freescale Semiconductor 5
BASIC CONNECTIONS
Pinout Description
Figure 4. Pinout Description
Figure 5. Accelerometer with Recommended
Connection Diagram
PCB Layout
Figure 6. Recommend PCB Layout for Interfacing
Accelerometer to Microcontroller
NOTES:
1. Use 0.1 µF capacitor on VDD to decouple the power
source.
2. Physical coupling distance of the accelerometer to the
microcontroller should be minimal.
3. Flag underneath package is connected to ground.
4. Place a ground plane beneath the accelerometer to
reduce noise, the ground plane should be attached to
all of the open ended terminals shown in Figure 6.
5. Use an RC filter with 1.0 k and 0.1 µF on the outputs
of the accelerometer to minimize clock noise (from the
switched capacitor filter circuit).
6. PCB layout of power and ground should not couple
power supply noise.
7. Accelerometer and microcontroller should not be a
high current path.
8. A/D sampling rate and any external power supply
switching frequency should be selected such that they
do not interfere with the internal accelerometer
sampling frequency (16 kHz for Low IDD and 52 kHz for
Standard IDD for the sampling frequency). This will
prevent aliasing errors.
9. PCB layout should not run traces or vias under the
QFN part. This could lead to ground shorting to the
accelerometer flag.
Pin No. Pin
Name Description
1, 5 – 7, 13, 16 N/C No internal connection.
Leave unconnected.
14 YOUT Output voltage of the accelerometer.
YDirection.
15 XOUT Output voltage of the accelerometer.
XDirection.
3V
DD Power supply input.
4V
SS The power supply ground.
2, 8 – 11 N/C Used for factory trim.
Leave unconnected.
12 ST Logic input pin used to initiate
self-test.
Top View
1516 14 13
12
11
10
1
2
3
4
5678
9N/C
N/C
N/C
N/C
N/CN/C
N/C
N/C
N/C
X
OUT
Y
OUT
ST
NC
NC
V
DD
V
SS
MMA6260Q
Series
ST
VDD
VSS
0.1 µF
3
4
VDD
0.1 µF
14
0.1 µF
15
12
Logic
Input
XOUT
YOUT
1 k
1 k
X Output
Signal
Y Output
Signal
P0
A/D IN
VRH
VSS
VDD
ST
YOUT
VSS
VDD
0.1 µF
1 k
0.1 µF
0.1 µF
Power Supply
0.1 µF
A/D IN
XOUT
0.1 µF
1 k
Microcontroller
Accelerometer
C
C
C
R
R
C
C
MMA6260Q
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6Freescale Semiconductor
+X
DYNAMIC ACCELERATION
+Y
–Y
–X
STATIC ACCELERATION
Direction of Earth’s gravity field(1)
X
OUT
@ 0g = 1.65V
Y
OUT
@ -1g = 0.85V
XOUT @ -1g = 0.85 V
YOUT @ 0g = 1.65 V
XOUT @ +1g = 2.45 V
YOUT @ 0g = 1.65 V
1. When positioned as shown, the Earth’s gravity will result in a positive 1g output.
1516 14 13
12
11
10
1
2
3
4
5678
9
Top View
16-Pin QFN Package
XOUT @ 0g = 1.65 V
YOUT @ +1g = 2.45 V
Top View
MMA6260Q
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Freescale Semiconductor 7
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the surface mount packages must be
the correct size to ensure proper solder connection interface
between the board and the package.
With the correct footprint, the packages will self-align when
subjected to a solder reflow process. It is always
recommended to design boards with a solder mask layer to
avoid bridging and shorting between solder pads.
13
8
16
5
0.50
6.0
Solder areas
Pin 1 ID (non metallic)
9
12
4.25
6.0
14
1.00
0.55
Flag
Non-Solder areas
MMA6260Q
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8Freescale Semiconductor
PACKAGE DIMENSIONS
CASE 1477-02
ISSUE B
16-LEAD QFN
PAGE 1 OF 3
MMA6260Q
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Freescale Semiconductor 9
PACKAGE DIMENSIONS
CASE 1477-02
ISSUE B
16-LEAD QFN
PAGE 2 OF 3
MMA6260Q
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10 Freescale Semiconductor
PACKAGE DIMENSIONS
CASE 1477-02
ISSUE B
16-LEAD QFN
PAGE 3 OF 3
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MMA6260Q
Rev. 3
10/2006
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