SL74HC138 1-of-8 Decoder/Demultiplexer High-Performance Silicon-Gate CMOS The SL74HC138 is identical in pinout to the LS/ALS138. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. The SL74HC138 decodes a three-bit Address to one-of-eight activelow outputs. This device features three Chip Select inputs, two activelow and one active-high to facilitate the demultiplexing, cascading, and chip-selecting functions. The demultiplexing function is accomplished by using the Address inputs to select the desired device output; one of the Chip Selects is used as a data input while the other Chip Selects are held in their active states. * Outputs Directly Interface to CMOS, NMOS, and TTL * Operating Voltage Range: 2.0 to 6.0 V * Low Input Current: 1.0 A * High Noise Immunity Characteristic of CMOS Devices ORDERING INFORMATION SL74HC138N Plastic SL74HC138D SOIC TA = -55 to 125 C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs PIN 16 =VCC PIN 8 = GND Outputs CS1 CS2 CS3 A2 A1 A0 X X H X H X L X X X X X X X X X X X H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L L L L L L L LL L L L H L H L L H H L H H H H L H H H H L H H H H L H H H H H H H H L L L L L L L L H L L H L H H H L H H H H H H H H H H H H H H H H H H H L H H H H L H H H H L H H H H L H = high level (steady state) L = low level (steady state) X = don't care SLS System Logic Semiconductor Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 H H H H H H H H H H H H SL74HC138 MAXIMUM RATINGS * Symbol Parameter Value Unit -0.5 to +7.0 V VCC DC Supply Voltage (Referenced to GND) VIN DC Input Voltage (Referenced to GND) -1.5 to VCC +1.5 V DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V DC Input Current, per Pin 20 mA DC Output Current, per Pin 25 mA ICC DC Supply Current, VCC and GND Pins 50 mA PD Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ 750 500 mW -65 to +150 C 260 C VOUT IIN IOUT Tstg TL Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/C from 65 to 125C SOIC Package: : - 7 mW/C from 65 to 125C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) TA Operating Temperature, All Package Types tr, t f Input Rise and Fall Time (Figure 2) VCC =2.0 V VCC =4.5 V VCC =6.0 V Min Max Unit 2.0 6.0 V 0 VCC V -55 +125 C 0 0 0 1000 500 400 ns This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. SLS System Logic Semiconductor SL74HC138 DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) VCC Guaranteed Limit Test Conditions V 25 C to -55C 85 C 125 C Unit Minimum High-Level Input Voltage VOUT=0.1 V or VCC-0.1 V IOUT 20 A 2.0 4.5 6.0 1.5 3.15 4.2 1.5 3.15 4.2 1.5 3.15 4.2 V VIL Maximum Low -Level Input Voltage VOUT=0.1 V or VCC-0.1 V IOUT 20 A 2.0 4.5 6.0 0.5 1.35 1.8 0.5 1.35 1.8 0.5 1.35 1.8 V VOH Minimum High-Level Output Voltage VIN=VIH or VIL IOUT 20 A 2.0 4.5 6.0 1.9 4.4 5.9 1.9 4.4 5.9 1.9 4.4 5.9 V 4.5 6.0 3.98 5.48 3.84 5.34 3.7 5.2 2.0 4.5 6.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 VIN=VIH or VIL IOUT 4.0 mA IOUT 5.2 mA 4.5 6.0 0.26 0.26 0.33 0.33 0.4 0.4 Symbol Parameter VIH VIN=VIH or VIL IOUT 4.0 mA IOUT 5.2 mA VOL Maximum Low-Level Output Voltage VIN=VIH or VIL IOUT 20 A V IIN Maximum Input Leakage Current VIN=VCC or GND 6.0 0.1 1.0 1.0 A ICC Maximum Quiescent Supply Current (per Package) VIN=VCC or GND IOUT=0A 6.0 4.0 40 160 A SLS System Logic Semiconductor SL74HC138 AC ELECTRICAL CHARACTERISTICS (CL=50pF,Input t r=t f=6.0 ns) VCC Symbol Parameter Guaranteed Limit V 25 C to -55C 85C 125C Unit tPLH, t PHL Maximum Propagation Delay, Input A to Output Y (Figures 1 and 4) 2.0 4.5 6.0 135 27 23 170 34 29 205 41 35 ns tPLH, t PHL Maximum Propagation Delay , CS1 to Output Y (Figures 2 and 4) 2.0 4.5 6.0 110 22 19 140 28 24 165 33 28 ns tPLH, t PHL Maximum Propagation Delay , CS2 or CS3 to Output Y (Figures 3 and 4) 2.0 4.5 6.0 120 24 20 150 30 26 180 36 31 ns tTLH, t THL Maximum Output Transition Time, Any Output (Figures 2 and 4) 2.0 4.5 6.0 75 15 13 95 19 16 110 22 19 ns - 10 10 10 pF CIN CPD Maximum Input Capacitance Power Dissipation Capacitance (Per Package) Typical @25C,VCC=5.0 V Used to determine the no-load dynamic power consumption: PD=CPDVCC2f+ICCVCC 55 Figure 1. Switching Waveforms pF Figure 2. Switching Waveforms SLS System Logic Semiconductor SL74HC138 Figure 3. Switching Waveforms Figure 4. Test Circuit EXPANDED LOGIC DIAGRAM SLS System Logic Semiconductor