AUIRFZ44VZS
VDSS 60V
RDS(on) typ. 9.6m
ID 57A
max. 12m
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and
power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Features
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to achieve
extremely low on-resistance per silicon area. Additional features of
this design are a 175°C junction operating temperature, fast
switching speed and improved repetitive avalanche rating . These
features combine to make this design an extremely efficient and
reliable device for use in Automotive applications and a wide variety
of other applications
1 2015-10-27
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at www.infineon.com
AUTOMOTIVE GRADE
Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 57
A
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 40
IDM Pulsed Drain Current 230
PD @TC = 25°C Maximum Power Dissipation 92 W
Linear Derating Factor 0.61 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS (Thermally Limited) Single Pulse Avalanche Energy (Thermally Limited) 73
mJ
EAS (Tested) Single Pulse Avalanche Energy (Tested Limited) 110
IAR Avalanche Current See Fig. 12a, 12b, 15, 16 A
EAR Repetitive Avalanche Energy mJ
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds (1.6mm from case) 300
Thermal Resistance
Symbol Parameter Typ. Max. Units
RJC Junction-to-Case ––– 1.64 °C/W
RJA Junction-to-Ambient (PCB Mount), D2 Pak ––– 40
D2Pak
AUIRFZ44VZS
S
D
G
Base part number Package Type Standard Pack Orderable Part Number
Form Quantity
AUIRFZ44VZS D2-Pak Tube 50 AUIRFZ44VZS
Tape and Reel Left 800 AUIRFZ44VZSTRL
G D S
Gate Drain Source
HEXFET® Power MOSFET
AUIRFZ44VZS
2 2015-10-27
Notes:
Repetitive rating; pulse width limited by max. junction temperature. (See fig.11)
Limited by TJmax, starting TJ = 25°C, L = 0.12mH, RG = 25, IAS = 34A, VGS =10V. Part not recommended for use above this value.
Pulse width 400µs; duty cycle 2%.
C
oss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS .
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.
This value determined from sample failure population. 100% tested to this value in production, starting TJ = 25°C, L = 0.12mH,
R
G = 25, IAS = 34A, VGS =10V. .
This is applied to D2Pak, when mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering
techniques refer to application note #AN-994..
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 60 ––– ––– V VGS = 0V, ID = 250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.061 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 9.6 12 m VGS = 10V, ID = 34A 
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Trans conductance 25 ––– ––– S VDS = 25V, ID = 34A
IDSS Drain-to-Source Leakage Current ––– ––– 20 µA VDS = 60V, VGS = 0V
––– ––– 250 VDS = 60V,VGS = 0V,TJ =125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 200 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -200 VGS = -20V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Qg Total Gate Charge ––– 43 65
nC
ID = 34A
Qgs Gate-to-Source Charge ––– 11 ––– VDS = 48V
Qgd Gate-to-Drain Charge ––– 18 ––– VGS = 10V
td(on) Turn-On Delay Time ––– 14 –––
ns
VDD = 30V
tr Rise Time ––– 62 ––– ID = 34A
td(off) Turn-Off Delay Time ––– 35 ––– RG= 12
tf Fall Time ––– 38 ––– VGS = 10V
LD Internal Drain Inductance ––– 4.5 –––
nH
Between lead,
6mm (0.25in.)
LS Internal Source Inductance ––– 7.5 ––– from package
and center of die contact
Ciss Input Capacitance ––– 1690 ––– VGS = 0V
Coss Output Capacitance ––– 270 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 130 ––– ƒ = 1.0MHz
Coss Output Capacitance ––– 1870 ––– VGS = 0V, VDS = 1.0V,ƒ = 1.0MHz
Coss Output Capacitance ––– 260 ––– VGS = 0V, VDS = 48V,ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 510 ––– VGS = 0V, VDS = 0V to 48V
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 57
A
MOSFET symbol
(Body Diode) showing the
ISM Pulsed Source Current ––– ––– 230 integral reverse
(Body Diode) p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C,IS = 34A,VGS = 0V 
trr Reverse Recovery Time ––– 23 35 ns TJ = 25°C ,IF = 34A, VDD = 30V
Qrr Reverse Recovery Charge ––– 17 26 nC di/dt = 100A/µs 
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
pF
AUIRFZ44VZS
3 2015-10-27
Fig. 2 Typical Output Characteristics
Fig. 3 Typical Transfer Characteristics
Fig. 1 Typical Output Characteristics
Fig. 4 Typical Forward Trans conductance
Vs. Drain Current
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
60µs PULSE WIDTH
Tj = 25°C4.5V
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
60µs PULSE WIDTH
Tj = 175°C
4.5V
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
4.0 5.0 6.0 7.0 8.0 9.0
VGS, Gate-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current )
VDS = 25V
60µs PULSE WIDTH
TJ = 25°C
TJ = 175°C
0 102030405060
ID, Drain-to-Source Current (A)
0
10
20
30
40
50
60
Gfs, Forward Transconductance (S)
TJ = 25°C
TJ = 175°C
VDS = 15V
380µs PULSE WIDTH
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4 2015-10-27
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 7 Typical Source-to-Drain Diode
Forward Voltage
110 100
VDS, Drain-to-Source Voltage (V)
0
500
1000
1500
2000
2500
3000
C, Capacitance (pF)
Coss
Crss
Ciss
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
0 102030405060
QG Total Gate Charge (nC)
0
4
8
12
16
20
VGS, Gate-to-Source Voltage (V)
VDS= 48V
VDS= 30V
VDS= 12V
ID= 34A
FOR TEST CIRCUIT
SEE FIGURE 13
0.20.61.01.41.8
VSD, Source-toDrain Voltage (V)
0.1
1.0
10.0
100.0
1000.0
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 175°C
VGS = 0V
1 10 100 1000
VDS , Drain-toSource Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100µsec
AUIRFZ44VZS
5 2015-10-27
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10. Normalized On-Resistance
Vs. Temperature
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
25 50 75 100 125 150 175
TJ , Junction Temperature (°C)
0
10
20
30
40
50
60
ID , Drain Current (A)
-60 -40 -20 020 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 34A
VGS = 10V
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
Thermal Response ( Z thJC )
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
J
J
1
1
2
2
R
1
R
1
R
2
R
2
C
C
Ci= iRi
Ci= iRi
Ri (°C/W) i (sec)
0.960 0.00044
0.680 0.00585
AUIRFZ44VZS
6 2015-10-27
Fig 12c. Maximum Avalanche Energy vs. Drain Current
R
G
I
AS
0.01
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
Fig 12b. Unclamped Inductive Waveforms
Fig 13b. Gate Charge Test Circuit
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
Fig 13a. Gate Charge Waveform
Fig 14. Threshold Voltage Vs. Temperature
25 50 75 100 125 150 175
Starting TJ, Junction Temperature (°C)
0
50
100
150
200
250
300
EAS, Single Pulse Avalanche Energy (mJ)
I
D
TOP
3.8A
5.0A
BOTTOM
34A
-75 -50 -25 025 50 75 100 125 150 175
TJ , Temperature ( °C )
1.0
2.0
3.0
4.0
VGS(th) Gate threshold Voltage (V)
ID = 250µA
AUIRFZ44VZS
7 2015-10-27
Fig 15. Typical Avalanche Current Vs. Pulse width
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.infineon.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
t
av = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
Z
thJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 16. Maximum Avalanche Energy vs. Temperature
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
0.1
1
10
100
1000
Avalanche Current (A)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
20
40
60
80
EAR , Avalanche Energy (mJ)
TOP Single Pulse
BOTTOM 1% Duty Cycle
ID = 34A
AUIRFZ44VZS
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Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
Fig 18a. Switching Time Test Circuit
Fig 18b. Switching Time Waveforms
AUIRFZ44VZS
9 2015-10-27
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
D2Pak (TO-263AB) Part Marking Information
YWWA
XX XX
Date Code
Y= Year
WW= Work Week
AUFZ44VZS
Lot Code
Part Number
IR Logo
D2Pak (TO-263AB) Package Outline (Dimensions are shown in millimeters (inches))
AUIRFZ44VZS
10 2015-10-27
D2Pak (TO-263AB) Tape & Reel Information (Dimensions are shown in millimeters (inches))
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
3
4
4
TRR
FEED DIRECTION
1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
TRL
FEED DIRECTION
10.90 (.429)
10.70 (.421)
16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.609)
15.22 (.601)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0145)
0.342 (.0135)
1.60 (.063)
1.50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
27.40 (1.079)
23.90 (.941)
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
AUIRFZ44VZS
11 2015-10-27
† Highest passing voltage.
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
Qualification Information
Qualification Level
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. Infineon’s
Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
Moisture Sensitivity Level D2-Pak MSL1
ESD
Machine Model Class M4 (+/- 425V)
AEC-Q101-002
Human Body Model Class H1B (+/- 1000V)
AEC-Q101-001
Charged Device Model Class C5 (+/- 1125V)
AEC-Q101-005
RoHS Compliant Yes
Revision History
Date Comments
10/27/2015  Updated datasheet with corporate template
 Corrected ordering table on page 1.