MAS1016BUA1-T - Micro Analog Systems

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MAS1016B

AM Receiver IC

• High Sensitivity

• Very Low Power Consumption

• Wide Supply Voltage Range

• Power Down Control

• Control for AGC On

• High Selectivity by Crystal Filter

DESCRIPTION

The MAS1016B AM Receiver chip is a highly

sensitive, simple to use AM receiver specially

intended to receive time signals in the frequency

range from 40 kHz to 100 kHz. Only a few external

components are required for time signal receiver.

The circuit has preamplifier, wide range automatic

gain control, demodulator and output comparator

built in. The output signal can be processed directly

by an additional digital circuitry to extract the data

from the received signal. The control for AGC

(automatic gain control) can be used to switch AGC

on or off if necessary. WWVB in USA and JJY in

Japan require use of AGC control procedure, which

is simplified in MAS1016B.

FEATURES APPLICATIONS

• Highly Sensitive AM Receiver, 0.5 µVRMS typ.

• Wide Supply Voltage Range from 1.1 V to 3.6 V

• Very Low Power Consumption 50 µA typ.

• Power Down Control

• Only a Few External Components Necessary

• Control for AGC On

• Wide Frequency Range from 40 kHz to 100 kHz

• High Selectivity by Quartz Crystal Filter

• Die and TSSOP-16 Package

• Time Signal Receiver Designed for MSF (UK),

WWVB (USA), JJY (Japan) and DCF77

(Germany)

• Receiver for ASK Modulated Data Signals

BLOCK DIAGRAM

AGC Amplifier Demodulator

Comparator

Power Supply/Biasing

RFI OUT

PDN

VDD

SS AGC DEC

AON (=AGC on)

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PAD LAYOUT

DIE size = 1.79 x 1.79 mm; PAD size = 100 x 100 µm

Note: Because the substrate of the die is internally connected to VDD, the die has to be connected to VDD or

left floating. Please make sure that VDD is the first pad to be bonded. Pick-and-place and all component

assembly are recommended to be performed in ESD protected area.

Note: Coordinates are pad center points where origin has been located in the center of VDD pad

Pad Identification Name X-coordinate Y-coordinate Note

Power Supply Voltage VDD 0 µm 0 µm

Quarz Filter Output QO 306 µm 19 µm

Quarz Filter Input QI 587 µm 19 µm

AGC Capacitor AGC 866 µm 19 µm

Receiver Output OUT 1143 µm 19 µm 1

Demodulator Capacitor DEC 1111 µm 1436 µm

AGC On Control AON 868 µm 1436 µm 2

Power Down Input PDN 551 µm 1436 µm 3

Receiver Input RFI 309 µm 1436 µm

Power Supply Ground VSS 16 µm 1415 µm

Notes:

1) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced

(modulated)

- the output is a current source/sink with |IOUT| > 5 µA

- at power down the output is high impedance

2) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working)

- Internal pull-up with current < 1 µA which is switched off at power down

3) PDN = VSS means receiver on; PDN = VDD means receiver off

MAS1016B

VDD QO QI AGC OUT

VSS RFI PDN AON DEC

1788 µm

1786 µm

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ABSOLUTE MAXIMUM RATINGS

Parameter Symbol Conditions Min Max Unit

Supply Voltage VDD-VSS -0.3 5.0 V

Input Voltage VIN V

SS-0.3 VDD+0.3 V

Power Dissipation PMAX 100 mW

Operating Temperature TOP -20 70

Storage Temperature TST -40 120

ELECTRICAL CHARACTERISTICS

Operating Conditions: VDD = 1.4V, Temperature = 25°C

Parameter Symbol Conditions Min Typ Max Unit

Operating Voltage VDD 1.10 3.60 V

Current Consumption IDD 50 100

µA

Stand-By Current IDDoff 0.1

µA

Input Frequency Range fIN 40 100 kHz

Minimum Input Voltage VIN min 0.5 1

µVrms

Maximum Input Voltage VIN max 20 mVrms

Input Levels |lIN|<0.5 µA VIL

VIH

0.8 VDD

0.2 VDD V

Output Current

VOL<0.2 VDD;VOH >0.8 VDD

|IOUT| 5

µA

Output Pulse T0 1 µVrms ≤ VIN ≤

20 mVrms

50 140 ms

1 1 µVrms ≤ VIN ≤

20 mVrms

150 230 ms

Startup Time TStart 8 s

Output Delay Time TDelay 50 100 ms

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TYPICAL APPLICATION

Note 1: Crystal

The crystal as well as ferrite antenna frequencies are chosen according to the time signal system. Ferrite

antenna frequencies and recommended crystal frequencies are presented in table 1. For more details about

crystal selection see DAEV1016B.

Table 1 Time-Signal System Frequencies

Time-Signal System Location Frequency Recommended Crystal Frequency Unit

DCF77 Germany 77.5 77.503 kHz

MSF United Kingdom 60 60.003 kHz

WWVB USA 60 60.003 kHz

JJY Japan 40 and 60 40.003 and 60.003 kHz

Note 2: AGC Capacitor

The AGC capacitor value is also chosen according to time-signal system. Recommended capacitor values are

presented in table 2. WWVB and JJY systems require external control of AON (=AGC on) pin to receive pulses

correctly. For more details about required control of AON in WWVB and JJY systems see DAEV1016B.

The AGC and DEC capacitors should have low leakage currents due to very small 40 nA signal currents

through the capacitors. The insulation resistance of these capacitors should be higher than 70 MΩ. Also probes

with at least 100 MΩ impedance should be used for voltage probing of AGC and DEC pins.

Table 2 Recommended AGC Capacitor Value

Time-Signal System Recommended AGC Capacitor Value

DCF77 470nF

MSF 1uF

WWVB 220nF + Special AGC Control

JJY 220nF + Special AGC Control

AGC Amplifier Demodulator

Comparator

Power Supply/Biasing

RFI OUT

VSS AGC DEC

Receiver

output

Ferrite-

Antenna

Note 1

AON (=AGC on)

VDD

1.4 V

PDN

Note 2

CAGC

0.47…1 uF

CDEM

47 nF

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SAMPLES IN SBDIL 20 PACKAGE

PIN DESCRIPTION

Pin Name Pin Type Function Note

NC 1

VDD 2 P Positive Power Supply

NC 3

QO 4 AO Quartz Filter Output

NC 5 1

QI 6 AI Quartz Filter Input

AGC 7 AO AGC Capacitor

OUT 8 DO Receiver Output 2

NC 9

NC 10

NC 11

NC 12

NC 13

NC 14

DEC 15 AO Demodulator Capacitor

AON 16 DI AGC On Control 3

PDN 17 AI Power Down Input 4

RFI 18 AI Receiver Input

NC 19

VSS 20 G Power Supply Ground

Notes:

1) Pin 5 between quartz crystal filter pins must be connected to VSS to eliminate package leadframe parasitic

capacitances disturbing the crystal filter performance. All other NC (Not Connected) pins are also

recommended to be connected to VSS to minimize noise coupling.

2) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced

(modulated)

- the output is a current source/sink with |IOUT| > 5 µA

- at power down the output is high impedance

3) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working)

- Internal pull-up (to AGC on) with current < 1 µA which is switched off at power down

4) PDN = VSS means receiver on; PDN = VDD means receiver off

NC 1

VDD 2

NC 3

QO 4

NC 5

QI 6

AGC 7

OUT 8

NC 9

NC 10

20 VSS

19 NC

18 RFI

17 PDN

16 AON

15 DEC

14 NC

13 NC

12 NC

11 NC

Top Marking Definitions:

YYWW = Year Week

XXXXX.X = Lot Number

MAS1016B

YYWW

XXXXX.X

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PIN CONFIGURATION & TOP MARKING FOR PLASTIC TSSOP-16 PACKAGE

PIN DESCRIPTION

Pin Name Pin Type Function Note

VDD 1 P Positive Power Supply

NC 2

QO 3 AO Quartz Filter Output

NC 4 1

QI 5 AI Quartz Filter Input

AGC 6 AO AGC Capacitor

NC 7

OUT 8 DO Receiver Output 2

DEC 9 AO Demodulator Capacitor

NC 10

AON 11 DI AGC On Control 3

PDN 12 AI Power Down Input 4

NC 13

RFI 14 AI Receiver Input

NC 15

VSS 16 G Power Supply Ground

Notes:

1) Pin 4 between quartz crystal filter pins must be connected to VSS to eliminate package leadframe parasitic

capacitances disturbing the crystal filter performance. All other NC (Not Connected) pins are also

recommended to be connected to VSS to minimize noise coupling.

2) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced

(modulated)

- the output is a current source/sink with |IOUT| > 5 µA

- at power down the output is high impedance

3) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working)

- Internal pull-up (to AGC on) with current < 1 µA which is switched off at power down

4) PDN = VSS means receiver on; PDN = VDD means receiver off

VDD

OUT

RFI

VSS

PDN

AON

DEC

1016B

YYWW

Top Marking Definitions:

YYWW = Year Week

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PACKAGE (TSSOP16) OUTLINES

Dimension Min Max Unit

A 6.40 BSC mm

B 4.30 4.50 mm

C 5.00 BSC mm

D 0.05 0.15 mm

E 1.10 mm

F 0.19 0.30 mm

G 0.65 BSC mm

H 0.18 0.28 mm

I 0.09 0.20 mm

I1 0.09 0.16 mm

J 0.19 0.30 mm

J1 0.19 0.25 mm

K 0° 8°

L 0.24 0.26 mm

(The length of a terminal for

soldering to a substrate)

0.50 0.75 mm

N 1.00 REF mm

O 12°

P 12°

Dimensions do not include mold flash, protrusions, or gate burrs.

All dimensions are in accordance with JEDEC standard MO-153.

Pin 1

Seating Plane

HGF

BDetail A

Detail A

II1

Section B-B

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SOLDERING INFORMATION

Resistance to Soldering Heat According to RSH test IEC 68-2-58/20 2*220°C

Maximum Temperature 240°C

Maximum Number of Reflow Cycles 2

Reflow profile Thermal profile parameters stated in JESD22-A113 should not

be exceeded. http://www.jedec.org

Seating Plane Co-planarity max 0.08 mm

Lead Finish Solder plate 7.62 - 25.4 µm, material Sn 85% Pb 15%

EMBOSSED TAPE SPECIFICATIONS

Dimension Min Max Unit

A0 6.50 6.70 mm

B0 5.20 5.40 mm

D0 1.50 +0.10 / -0.00 mm

D1 1.50 mm

E1 1.65 1.85 mm

F1 7.20 7.30 mm

K0 1.20 1.40 mm

P 11.90 12.10 mm

P0 4.0 mm

P2 1.95 2.05 mm

S1 0.6 mm

T 0.25 0.35 mm

W 11.70 12.30 mm

Section A - A

Tape Feed Direction

Pin 1 Designator

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REEL SPECIFICATIONS

Dimension Min Max Unit

A 330 mm

B 1.5 mm

C 12.80 13.50 mm

D 20.2 mm

N 50 mm

(measured at hub)

12.4 14.4 mm

(measured at hub)

18.4 mm

Trailer 160 mm

Leader 390,

of which minimum

160mm of empty carrier

tape sealed with cover

tape

Weight 1500 g

Tape Slot for Tape Start

Components

Trailer Leader

Carrier Tape

Cover Tape

Start

End

2000 Components on Each Reel

Reel Material: Conductive, Plastic Antistatic or Static Dissipative

Carrier Tape Material: Conductive

Cover Ta

e Material: Static Dissi

ative

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ORDERING INFORMATION

Product Code Product Package Comments

MAS1016BTB1 MAS1016B AM Receiver IC Wafer, EWS tested Thickness 480 µm

MAS1016BTC1 MAS1016B AM Receiver IC Wafer, EWS tested Thickness 400 µm

MAS1016BUA1-T MAS1016B AM Receiver IC TSSOP-16 Tape & Reel

Please contact Micro Analog Systems Oy for other wafer thickness options.

LOCAL DISTRIBUTOR

MICRO ANALOG SYSTEMS OY CONTACTS

Micro Analog Systems Oy

Kamreerintie 2, P.O.Box 51

FIN-02771 Espoo, FINLAND

Tel. +358 9 80 521

Fax +358 9 805 3213

http://www.mas-oy.com

NOTICE

Micro Analog Systems Oy reserves the right to make changes to the products contained in this data sheet in order to improve the design or

performance and to supply the best possible products. Micro Analog Systems Oy assumes no responsibility for the use of any circuits shown

in this data sheet, conveys no license under any patent or other rights unless otherwise specified in this data sheet, and makes no claim that

the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Micro Analog

Systems Oy makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification.