SLUS241D − MARCH 1994 - REVISED NOVEMBER 2003
1
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DIntegrated 0.15-Ω Power MOSFET
D3-V to 8-V Operation
DDigital Programmable Current Limit
from 0 A to 3 A
DElectronic Circuit Breaker Function
D1µA ICC When Disabled
DProgrammable On-Time
DProgrammable Start Delay
DFixed 3% Duty Cycle
DUnidirectional Switch
DThermal Shutdown
DFault-Output Indicator
DMaximum-Output Current Can Be Set to 1 A
Above the Programmed Fault Level or to a
Full 4 A
DPower SOIC, Low-Thermal Resistance
Packaging
description
The UCC3912 family of hot swap power managers provides complete power management, hot swap capability,
and circuit breaker functions. The only component required to operate the device, other than supply bypassing,
is the fault timing capacitor, CT. All control and housekeeping functions are integrated, and externally
programmable. These include the fault current level, maximum output-sourcing current, maximum fault time,
and startup delay. In the event of a constant fault, the internal fixed 3% duty cycle ratio limits average output
power.
The internal 4-bit DAC allows programming of the fault level current from 0 A to 3 A with 0.25-A resolution. The
IMAX control pin sets the maximum sourcing current to 1 A above the fault level when driven low, and to a full
4 A when driven high for applications which require fast output capacitor charging.
When the output current is below the fault level, the output MOSFET is switched on with a nominal on resistance
of 0.15 Ω. When the output current exceeds the fault level, but is less than the maximum sourcing level, the
output remains switched on, but the fault timer starts charging CT. Once CT charges to a preset threshold, the
switch is turned off, and remains o ff for 30 times the programmed fault time. When the output current reaches
the maximum sourcing level, the MOSFET transitions from a switch to a constant current source. (continued)
block diagram
UDG-99146
B1 B0
6 7 8
2
3
911 16
0 A−3 A
0.25
RES
B3 B2
5 4 13 12
CT
ON TIME
CONTROL
3% DUTY
CYCLE
+
−THERMAL
SHUTDOWN
INTERNAL
BIAS +
−1SHTDWN
14
15
1.5 V
H = OPEN
FAULT
CURRENT SENSE
+
−
+
CHARGE
PUMP
30 mV
VOUT
REVERSE VOLTAGE
COMPARATOR
+
−LINEAR CURRENT AMPLIFIER
1 A
ABOVE
FAULT
10IMAX
GND HEATSINK
GND PINS
CURRENT FAULT
LEVEL 0A TO 3 A
OVERCURRENT
COMPARATOR
MAX CURRENT
LEVEL
4 A
H = 4 A VIN
VIN
VOUT
VOUT
POWER
FET
4 BIT DAC
Copyright 2003, Texas Instruments Incorporated
! "#$ ! %#&'" ($)
(#"! " !%$""! %$ *$ $! $+! !#$!
!(( ,-) (#" %"$!!. ($! $"$!!'- "'#($
$!. '' %$$!)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SLUS241D − MARCH 1994 - REVISED NOVEMBER 2003
2www.ti.com
description (continued)
The UCC3912 family is designed for unidirectional current flow , emulating an ideal diode in series with the power
switch. This feature is particularly attractive in applications where many devices are powering a common bus,
such as with SCSI Termpwr.
The UCC3912 family can be put into sleep mode drawing only 1-µA of supply current. The SHTDWN pin has
a preset threshold hysteresis which allows the user the ability to set a time delay upon startup to achieve
sequencing of power. Other features include an open drain FAULT output indicator, thermal shutdown, under
voltage lockout, and a low thermal resistance small outline package.
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†}
VIN 8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
FAULT sink current 50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
FAULT voltage -0.3 to VIN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current Self Limiting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage
(B0, B1, B2, B3, IMAX, SHTDWN) -0.3 to VIN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg -65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating junction temperature range, TJ-55°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature (soldering, 10 sec.) 300°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡Currents are positive into, negative out of the specified terminal. Consult Packaging Section of the Interface Products Data book (TI Literature
Number SLUD002) for thermal limitations and considerations of packages.
package information
DIL-16, SOIC-16
N, DP Package
(TOP VIEW)
TSSOP-24,
PWP Package
(TOP VIEW)
*Pin 5 serves as lowest impedance to the electrical
ground; Pins 4, 12, and 13 serve as heat sink/ground.
These pins should be connected to large etch areas t o
help dissipate heat. For N package, pins 4, 12, and 13
are N/C.
*Pin 9 serves as lowest impedance to the electrical ground;
other GND pins serve as heat sink/ground. These pins should
be connected to large etch areas to help dissipate heat.
B3
VOUT
GND*
GND*
FAULT
N/C
EGND*
GND*
GND*
VIN
VIN
GND*
SHTDWN
GND*
B2
GND*
GND*
CT
12
11
10
9
8
7
6
5
4
3
2
1
13
14
15
16
17
18
19
20
21
22
23
24
IMAX
N/C
VOUT
B1 B0
GND*
SLUS241D − MARCH 1994 - REVISED NOVEMBER 2003
3
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electrical characteristics, these specifications apply for TA = −40°C to 85°C for the UCC2912;
TA = 0°C to 70°C for the UCC3912, VIN = 5 V, IMAX = 0.4 V, SHTDWN = 2.4 V
(unless otherwise stated)
supply section
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Voltage input range 3.0 8.0 V
Supply current 1.0 2.0 mA
Sleep mode current SHTDWN = 0.2 V 0.5 5.0 µA
NOTE 1: All voltages are with respect to ground. Current is positive into and negative out of the specified terminal.
output section
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
IOUT = 1 A 0.15 0.22 V
IOUT = 2 A 0.3 0.45 V
Voltage drop
IOUT = 3 A 0.45 0.68 V
Voltage drop IOUT = 1A, VIN = 3 V 0.17 0.27 V
IOUT = 2 A, VIN = 3 V 0.35 0.56 V
IOUT = 3 A, VIN = 3 V 0.5 0.8 V
Reverse leakage current VIN < VOUT , SHTDWN = 0.2 V, VOUT = 5 V 5 20 µA
Initial startup time See Note 2 100 µs
Short circuit response See Note 2 100 ns
Thermal shutdown See Note 2 170 °C
Thermal hysteresis See Note 2 10 °C
NOTE 1: All voltages are with respect to ground. Current is positive into and negative out of the specified terminal.
NOTE 2: Ensured by design. Not production tested.
DAC section
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Output leakage Code = 0000−0011 0 20 µA
Code = 0100 0.1 0.25 0.45 A
Code = 0101 0.25 0.50 0.75 A
Code = 0110 0.5 0.75 1.0 A
Code = 0111 0.75 1.00 1.25 A
Code = 1000 1.0 1.25 1.5 A
Trip current
Code = 1001 1.25 1.50 1.75 A
Trip current Code = 1010 1.5 1.75 2.0 A
Code = 1011 1.7 2.00 2.3 A
Code = 1100 1.9 2.25 2.58 A
Code = 1101 2.1 2.50 2.9 A
Code = 1110 2.3 2.75 3.2 A
Code = 1111 2.5 3.0 3.5 A
Maximum output current Code = 0000 to 0011 0.02 mA
Maximum output current over trip
UCC2912 Code = 0100 to 1111, IMAX = 0 V 0.5 1.0 2.0 A
Maximum output current over trip
(current source mode) UCC3912 Code = 0100 to 1111, IMAX = 0 V 0.5 1.0 1.8 A
Maximum output current (current source mode) Code = 0100 to 1111, IMAX = 2.4 V 3.0 4.0 5.2 A
NOTE 1: All voltages are with respect to ground. Current is positive into and negative out of the specified terminal.
SLUS241D − MARCH 1994 - REVISED NOVEMBER 2003
4www.ti.com
electrical characteristics, these specifications apply for TA = −40°C to 85°C for the UCC2912;
TA = 0°C to 70°C for the UCC3912, VIN = 5 V, IMAX = 0.4 V, SHTDWN = 2.4 V
(unless otherwise stated)
timer section
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
CT charge current VCT = 1.0 V −45.0 -36.0 −22.0 µA
CT discharge current
UCC2912 VCT = 1.0 V 0.72 1.20 1.57 µA
CT discharge current UCC3912 VCT = 1.0 V 0.72 1.20 1.50 µA
Output duty cycle VOUT = 0 V 2.0 3.0 6.0 %
CT fault threshold 1.3 1.5 1.7 V
CT reset threshold 0.4 0.5 0.6 V
NOTE 1: All voltages are with respect to ground. Current is positive into and negative out of the specified terminal.
shutdown section
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Shutdown threshold 1.1 1.5 1.9 V
Shutdown hysteresis 100 mV
Input current SHTDWN = 1 V 100 500 nA
fault output section
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Output leakage current 500 nA
Low level output voltage IOUT = 10 mA 0.4 0.8 V
TTL input dc characteristics section
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
TTL input voltage high (can be connected to VIN) 2.0 V
TTL input voltage low 0.8 V
TTL input high current VIH = 2.4 V 3 10 µA
TTL input low current VIL = 0.4 V 1µA
NOTE 1: All voltages are with respect to ground. Current is positive into and negative out of the specified terminal.
pin description
B0−B3: These pins provide digital input to the DAC which sets the fault current threshold. They can be used
to provide a digital soft-start, adaptive current limiting.
CT: A capacitor connected to ground sets the maximum fault time. The maximum fault time must be more than
the time to charge the external capacitance in one cycle. The maximum fault time is defined as
FAULT = 27.8 ×103 × CT. Once the fault time is reached the output will shutdown for a time given by:
TSD = 833 ×103 × CT, this equates to a 3% duty cycle.
FAULT: Open drain output which pulls low upon any condition which causes the output to open: fault, thermal
shutdown, or shutdown.
IMAX: When this pin is set to logic low the maximum sourcing current will always be 1 A above the programmed
fault level. When set to logic high, the maximum sourcing current will be a constant 4 A for applications which
require fast charging of load capacitance.
SLUS241D − MARCH 1994 - REVISED NOVEMBER 2003
5
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pin description (continued)
SHTDWN: When this pin is brought to a logic low, the IC is put into a sleep mode drawing typically less than
1 µA of ICC. The input threshold is hysteretic, allowing the user to program a startup delay with an external RC
circuit.
VIN: Input voltage to the UCC3912. The recommended voltage range is 3 V to 8 V. Both VIN pins should be
connected together and to the power source.
VOUT: Output voltage from the UCC3912. When switched the output voltage will be approximately
VIN − (0.15 Ω × IOUT). Both VOUT pins should be connected together and to the load.
APPLICATION INFORMATION
UDG-99171
NOTE: For demonstration board schematic see Design Note DN-58 (TI Literature Number SLUA187).
6 7 8 9
11
10
B0B1B2B3 IMAX
16
3
2
4 12 13 5
14
15
1SHTDWN
VOUTVIN
FAULT
CT
GND
HEAT SINK
GND PINS
RLCOUT
VOUT
CSD
RSD VIN
CIN
R1
LED
D1
CT
S1 S2 S3 S4 S5 DIP
SWITCH
S6
VIN
VIN
UCC2912
UCC3912
Figure 1. Evaluation Circuit
protecting the UCC3912 from voltage transients
The parasitic inductance associated with the power distribution can cause a voltage spike at VIN if the load
current is suddenly interrupted by the UCC3912. It is important to limit the peak of this spike to less than 8 V
to prevent damage to the UCC3912. This voltage spike can be minimized by:
DReducing the power distribution inductance (e.g., twist the positive and negative leads of the power supply
feeding VIN, locate the power supply close to the UCC3912, use a PCB ground plane,...etc.).
DDecoupling VIN with a capacitor, CIN (refer to Figure 1), located close to pins 2 and 3. This capacitor is
typically less than 1 µF to limit the inrush current.
DClamping the voltage at VIN below 8 V with a zener diode, D1 (refer to Figure 1), located close to pins 2
and 3.
SLUS241D − MARCH 1994 - REVISED NOVEMBER 2003
6www.ti.com
APPLICATION INFORMATION
UDG-93019-4
Figure 2. Load Current, Timing-Capacitor Voltage, and Output Voltage of the UCC3912 Under Fault
Conditions.
estimating maximum load capacitance
For hot-swap applications, the rate at which the total output capacitance can be charged depends on the
maximum output current available and the nature of the load. For a constant-current current-limited controller,
the output will come up if the load asks for less than the maximum available short-circuit current.
To ensure recovery of a duty-cycle from a short-circuited load condition, there is a maximum total output
capacitance which can be charged for a given unit ON time (fault time). The design value of ON or fault time
can be adjusted by changing the timing capacitor CT.
For worst-case constant-current load of value just less than the trip limit; COUT(max) can be estimated from:
COUT(max) [ǒIMAX *ILOADǓ ǒ28 103 CT
VOUT Ǔ
where VOUT is the output voltage.
SLUS241D − MARCH 1994 - REVISED NOVEMBER 2003
7
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APPLICATION INFORMATION
For a resistive load of value RL, the value of COUT(max) can be estimated from:
COUT(max) [
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28 103 CT
RL ȏn
ȧ
ȧ
ȧ
ȧ
ȡ
Ȣ
1
1*ǒVOUT
IMAX RLǓȧ
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The overcurrent comparator senses both the DAC output and a representation of the output current. When the
output current exceeds the programmed level the timing capacitor CT charges with 36 µA of current. If the fault
occurs for the time it takes for CT to charge up to 1.5 V, the fault latch is set and the output switch is opened.
The output remains opened until CT discharges to 0.5 V with a 1.2-µA current source. Once the 0.5 V is reached
the output is enabled and will either appear as a switch, if the fault is removed, or a current source if the fault
remains. If the over current condition is still present, then CT will begin charging, starting the cycle over, resulting
in approximately a 3% on time.
UDG-94019-1
Figure 3. UCC3912 On-Time Circuitry
SLUS241D − MARCH 1994 - REVISED NOVEMBER 2003
8www.ti.com
APPLICATION INFORMATION
UDG-94019-1
Figure 4. RDS(on) vs. Temperature at 2-A Load Current.
safety recommendations
Although the UCC3912 family is designed to provide system protection for all fault conditions, all integrated
circuits can ultimately fail short. For this reason, if the UCC3912 is intended for use in safety critical applications
where UL or some other safety rating is required, a redundant safety device such as a fuse should be placed
in series with the device. The UCC3912 will prevent the fuse from blowing virtually for all fault conditions,
increasing system reliability and reducing maintenance cost, in addition to providing the hot swap benefits of
the device.
PACKAGE OPTION ADDENDUM
www.ti.com 28-Aug-2010
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
UCC2912DP ACTIVE SOIC D 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples
UCC2912DPG4 ACTIVE SOIC D 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples
UCC2912DPR ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples
UCC2912DPRG4 ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples
UCC2912PWP ACTIVE TSSOP PW 24 60 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples
UCC2912PWPG4 ACTIVE TSSOP PW 24 60 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples
UCC3912DP ACTIVE SOIC D 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples
UCC3912DPG4 ACTIVE SOIC D 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples
UCC3912DPTR ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples
UCC3912DPTRG4 ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples
UCC3912PWP ACTIVE TSSOP PW 24 60 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples
UCC3912PWPG4 ACTIVE TSSOP PW 24 60 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples
UCC3912PWPTR ACTIVE TSSOP PW 24 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples
UCC3912PWPTRG4 ACTIVE TSSOP PW 24 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
PACKAGE OPTION ADDENDUM
www.ti.com 28-Aug-2010
Addendum-Page 2
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
UCC2912DPR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
UCC3912DPTR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
UCC3912PWPTR TSSOP PW 24 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
UCC2912DPR SOIC D 16 2500 367.0 367.0 38.0
UCC3912DPTR SOIC D 16 2500 367.0 367.0 38.0
UCC3912PWPTR TSSOP PW 24 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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