VN920B5-E Single channel high-side solid state relay Features Type RDS(on) IOUT VCC VN920B5-E 16 m 30 A 36 V ECOPACK(R): lead free and RoHS compliant Automotive Grade: compliance with AEC Guidelines Very low standby current CMOS compatible input Proportional load current sense Current sense disable Thermal shutdown protection and diagnosis Undervoltage shutdown Overvoltage clamp Load current limitation P2PAK Description The VN920B5-E is a monolithic device designed in STMicroelectronicsTM VIPowerTM M0-3 technology. The VN920B5-E is intended for driving any type of load with one side connected to ground. The active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart protect the device against overload. The device integrates an analog current sense output which delivers a current proportional to the load current. The device automatically turns off in the case where the ground pin becomes disconnected. Table 1. Device summary Package P2PAK September 2013 Order codes Tube Tape and reel VN920B5-E VN920B5TR-E Doc ID 17608 Rev 2 1/26 www.st.com 1 Contents VN920B5-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.1 4 6 2/26 3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 16 3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 17 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.4 P2PAK maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . 18 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.1 5 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16 P2PAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.1 ECOPACK(R) packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.2 P2PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.3 P2PAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Doc ID 17608 Rev 2 VN920B5-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Switching (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Current sense (9 V VCC 16 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 VCC output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 P2PAK thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 P2PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Doc ID 17608 Rev 2 3/26 List of figures VN920B5-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. 4/26 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 IOUT/ISENSE versus IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 High-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input high-level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 P2PAK maximum turn-off current versus inductance(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 P2PAK PC board(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 P2PAK Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . 19 P2PAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 20 Thermal fitting model of a single channel HSD in P2PAK. . . . . . . . . . . . . . . . . . . . . . . . . . 20 P2PAK package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 P2PAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 P2PAK tape and reel (suffix "TR"). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Doc ID 17608 Rev 2 VN920B5-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram VCC OVERVOLTAGE DETECTION VCC CLAMP UNDERVOLTAGE DETECTION GND Power CLAMP DRIVER OUTPUT LOGIC INPUT CURRENT LIMITER VDS LIMITER IOUT CURRENT SENSE K OVERTEMPERATURE DETECTION Figure 2. Configuration diagram (top view) OUTPUT C.SENSE VCC INPUT GND 5 4 3 2 1 P2PAK Table 2. Suggested connections for unused and not connected pins Connection / pin Current Sense Floating To ground Through 1K resistor N.C. Output Input X X X X Doc ID 17608 Rev 2 Through 10K resistor 5/26 Electrical specifications 2 VN920B5-E Electrical specifications Figure 3. Current and voltage conventions IS VCC VF VCC IOUT OUTPUT IIN VOUT INPUT VIN ISENSE CURRENT SENSE VSENSE GND IGND 2.1 Absolute maximum ratings Stressing the device above the rating listed in the "Absolute maximum ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to Absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics sure program and other relevant quality document. Table 3. Absolute maximum ratings Symbol Value Unit 41 V VCC DC supply voltage - VCC Reverse DC supply voltage - 0.3 V - Ignd DC reverse ground pin current - 200 mA IOUT DC output current Internally limited A - 21 A +/- 10 mA -3 + 15 V V 4000 2000 5000 5000 V V V V 364 mJ - IOUT IIN VCSENSE 6/26 Parameter Reverse DC output current DC input current Current sense maximum voltage VESD Electrostatic discharge (human body model: R = 1.5 K; C = 100 pF) - INPUT - CURRENT SENSE - OUTPUT - VCC EMAX Maximum switching energy (L = 0.25 mH; RL = 0 ; Vbat = 13.5 V; Tjstart = 150 C; IL = 45 A) Doc ID 17608 Rev 2 VN920B5-E Electrical specifications Table 3. Absolute maximum ratings (continued) Symbol Ptot Unit 96.1 W Internally limited C Power dissipation TC 25 C Tj Junction operating temperature Tc Case operating temperature - 40 to 150 C Storage temperature - 55 to 150 C Tstg 2.2 Value Parameter Thermal data Table 4. Symbol Thermal data Parameter Rthj-case Thermal resistance junction-case Rthj-lead Thermal resistance junction-lead Rthj-amb Thermal resistance junction-ambient Max. value Unit 1.3 C/W C/W 51.3(1) C/W 37(2) C/W 1. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35m thick). 2. When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35m thick). Doc ID 17608 Rev 2 7/26 Electrical specifications 2.3 VN920B5-E Electrical characteristics Values specified in this section are for 8 V < VCC < 36 V; -40 C < Tj < 150 C, unless otherwise stated. Table 5. Power Symbol Parameter VCC Min. Typ. Operating supply voltage 5.5 13 36 V VUSD Undervoltage shutdown 3 4 5.5 V VOV Overvoltage shutdown 36 RON Test conditions On-state resistance VCLAMP Clamp voltage IS V IOUT = 10 A; Tj = 25 C 16 m IOUT = 10 A 32 m IOUT = 3 A; VCC = 6 V 55 m 48 55 V Off-state; VCC = 13 V; VIN = VOUT = 0 V 10 25 A Off-state; VCC = 13 V; VIN = VOUT = 0 V; Tj = 25 C 10 20 A 5 mA 0 50 A -75 0 A ICC = 20 mA Supply current Max. Unit 41 On-state; VCC = 13 V; VIN = 5 V; IOUT = 0 A; RSENSE = 3.9 k Note: IL(off1) Off-state output current VIN = VOUT = 0 V IL(off2) Off-state output current VIN = 0 V; VOUT = 3.5 V IL(off3) Off-state output current VIN = VOUT = 0V; VCC = 13 V; Tj = 125 C 5 A IL(off4) Off-state output current VIN = VOUT = 0 V; VCC = 13 V; Tj = 25 C 3 A VCLAMP and VOV are correlated. Typical difference is 5V. Table 6. Symbol 8/26 Switching (VCC = 13 V) Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time RL = 1.3 (see Figure 4) 50 s td(off) Turn-off delay time RL = 1.3 (see Figure 4) 50 s dVOUT/dt(on) Turn-on voltage slope RL = 1.3 (see Figure 4) See Figure 10 V/s dVOUT/dt(off) Turn-off voltage slope RL = 1.3 (see Figure 4) See Figure 12 V/s Doc ID 17608 Rev 2 VN920B5-E Electrical specifications Table 7. Symbol Logic inputs Parameter Test conditions VIL Input low level voltage IIL Low level input current VIH Input high-level voltage IIH High-level input current VI(hyst) Input hysteresis voltage VICL Table 8. Symbol VIN = 1.25 V Typ. Max. Unit 1.25 V 1 A 3.25 V VIN = 3.25 V 10 0.5 IIN = 1 mA Input clamp voltage Min. 6 IIN = - 1 mA A V 6.8 8 -0.7 V V Current sense (9 V VCC 16 V) Parameter Test conditions Min. Typ. Max. 4400 6000 Unit IOUT/ISENSE IOUT = 1 A; VSENSE = 0.5 V; Tj = -40 C...150 C 3300 Current sense ratio drift IOUT = 1 A; VSENSE = 0.5 V; Tj= - 40 C...150 C -10 IOUT/ISENSE IOUT = 10 A; VSENSE = 4 V; Tj = - 40 C Tj= 25 C...150 C Current sense ratio drift IOUT = 10 A; VSENSE = 4 V; Tj = -40 C...150 C IOUT/ISENSE IOUT = 30 A; VSENSE = 4 V; Tj = -40 C Tj = 25 C...150 C dK3/K3 Current sense ratio drift IOUT = 30 A; VSENSE = 4 V; Tj = -40 C...150 C -6 +6 % ISENSE0 Analog sense current VCC = 6...16 V; IOUT = 0 A; VSENSE = 0 V; Tj = -40 C...150 C 0 10 A VCC = 5.5 V; IOUT = 5 A; RSENSE = 10 k 2 V VCC > 8 V, IOUT = 10 A; RSENSE = 10 k 4 V K1 dK1/K1 K2 dK2/K2 K3 VSENSE VSENSEH Max analog sense output voltage Sense voltage in V = 13 V; RSENSE = 3.9 k overtemperature condition CC Analog sense output VCC = 13 V; Tj > TTSD; RVSENSEH impedance in overtemperature condition output open tDSENSE Current sense delay response To 90 % ISENSE(1) 4200 4400 +10 4900 4900 -8 4200 4400 6000 5750 +8 4900 4900 % % 5500 5250 5.5 V 400 500 s 1. Current sense signal delay after positive input slope. Doc ID 17608 Rev 2 9/26 Electrical specifications Table 9. VN920B5-E VCC output diode Symbol Parameter VF Forward on voltage Table 10. Protections(1) Symbol Parameter Test conditions -IOUT = 5 A; Tj = 150 C Typ. Max. Unit -- -- 0.6 V Min. Typ. Max. Unit Shutdown temperature 150 175 200 C TR Reset temperature 135 Thyst Thermal hysteresis 7 15 30 45 TTSD Ilim Vdemag VON Test conditions Min. VCC = 13 V Current limitation C 5 V < VCC < 36 V Turn-off output clamp voltage IOUT = 2 A; VIN = 0 V; L = 6 mH Output voltage drop limitation IOUT = 1 A; Tj = -40 C...150 C C 75 A 75 A VCC - 41 VCC - 48 VCC - 55 V 50 mV 1. To ensure long term reliability under heavy over-load or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device operates under abnormal conditions this software must limit the duration and number of activation cycles. Table 11. Truth table Conditions 10/26 Input Output Sense Normal operation L H L H 0 Nominal Overtemperature L H L L 0 VSENSEH Undervoltage L H L L 0 0 Overvoltage L H L L 0 0 Short circuit to GND L H H L L L Short circuit to VCC L H H H 0 < Nominal Negative output voltage clamp L L 0 Doc ID 17608 Rev 2 0 (Tj<TTSD) 0 (Tj>TTSD) VSENSEH VN920B5-E Electrical specifications Table 12. Electrical transient requirements ISO T/R Test level 7637/1 Test pulse I II III IV 1 - 25V(1) - 50V(1) - 75V(1) - 100V(1) 2 25V(1) (1) (1) (1) 0.2ms, 10 (1) 0.1s, 50 0.1s, 50 + + 50V (1) + 75V (1) Delays and impedance + 100V (1) 3a - 25V - 50V - 100V - 150V 3b + 25V(1) + 50V(1) + 75V(1) + 100V(1) 4 5 - 4V(1) (1) (1) - 5V (1) - 6V (2) - 7V (2) + 46.5V + 26.5V (1) (2) + 66.5V + 86.5V 2ms, 10 100ms, 0.01 400ms, 2 1. All functions of the device are performed as designed after exposure to disturbance. 2. One or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device. Figure 4. Switching characteristics VOUT 90% 80% dVOUT/dt(off) dVOUT/dt(on) tr 10% tf t ISENSE 90% INPUT t tDSENSE td(on) td(off) t Doc ID 17608 Rev 2 11/26 Electrical specifications Figure 5. VN920B5-E IOUT/ISENSE versus IOUT IOUT/ISENSE 6500 6500 6000 6000 max.Tj=-40C 5500 5500 max.Tj=25...150C 5000 5000 typical value min.Tj=25...150C 4500 4500 min.Tj=-40C 4000 4000 3500 3500 3000 3000 0 2 4 6 8 10 12 14 16 IOUT (A) 12/26 Doc ID 17608 Rev 2 18 20 22 24 26 28 30 32 VN920B5-E Electrical specifications Figure 6. Waveforms NORMAL OPERATION INPUT LOAD CURRENT SENSE UNDERVOLTAGE VCC VUSDhyst VUSD INPUT LOAD CURRENT SENSE OVERVOLTAGE VOV VCC VCC > VUSD INPUT LOAD CURRENT SENSE VOVhyst SHORT TO GROUND INPUT LOAD CURRENT LOAD VOLTAGE SENSE SHORT TO VCC INPUT LOAD VOLTAGE LOAD CURRENT SENSE <Nominal Tj TTSD TR <Nominal OVERTEMPERATURE INPUT LOAD CURRENT SENSE ISENSE= Doc ID 17608 Rev 2 VSENSEH RSENSE 13/26 Electrical specifications VN920B5-E 2.4 Electrical characteristics curves Figure 7. Off-state output current Figure 8. IL(off1) (uA) High-level input current Iih (uA) 9 5 8 4.5 7 4 Vin=3.25V 3.5 6 3 5 2.5 4 2 3 1.5 2 1 1 0.5 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (C) Figure 9. 100 125 150 175 150 175 150 175 Figure 10. Turn-on voltage slope Vicl (V) dVout/dt(on) (V/ms) 10 700 650 Iin=1mA 9 75 Tc (C) Input clamp voltage 9.5 50 8.5 600 8 550 7.5 Vcc=13V Rl=1.3Ohm 500 7 6.5 450 6 400 5.5 350 5 300 4.5 4 250 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (C) Figure 11. 50 75 100 125 Tc (C) Overvoltage shutdown Figure 12. Turn-off voltage slope Vov (V) dVout/dt(off) (V/ms) 50 550 48 500 46 450 44 400 Vcc=13V Rl=1.3Ohm 350 42 300 40 250 38 200 36 150 34 100 32 50 30 -50 -25 0 25 50 75 100 125 150 175 0 -50 Tc (C) 14/26 -25 0 25 50 75 Tc (C) Doc ID 17608 Rev 2 100 125 VN920B5-E Electrical specifications Figure 13. ILIM vs Tcase Figure 14. On-state resistance vs VCC Ilim (A) Ron (mOhm) 100 50 90 45 Vcc=13V 80 40 70 35 60 30 50 25 40 20 30 15 20 10 10 5 Tc= 150C Tc= 25C Tc= - 40C 0 0 -50 -25 0 25 50 75 100 125 150 175 5 10 15 20 Tc (C) 25 30 35 40 Vcc (V) Figure 15. Input high-level Figure 16. Input hysteresis voltage Vih (V) Vhyst (V) 3.6 1.5 1.4 3.4 1.3 3.2 1.2 3 1.1 2.8 1 0.9 2.6 0.8 2.4 0.7 2.2 0.6 0.5 2 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Figure 17. On-state resistance vs Tcase 75 100 125 150 175 Figure 18. Input low level Ron (mOhm) Vil (V) 50 2.6 45 2.4 Iout=10A Vcc=8V; 36V 40 50 Tc (C) Tc (C) 2.2 35 2 30 25 1.8 20 1.6 15 1.4 10 1.2 5 0 1 -50 -25 0 25 50 75 100 125 150 175 -50 Tc (C) -25 0 25 50 75 100 125 150 175 Tc (C) Doc ID 17608 Rev 2 15/26 Application information 3 VN920B5-E Application information Figure 19. Application schematic +5V VCC Rprot INPUT Dld C Rprot OUTPUT CURRENT SENSE RSENSE GND VGND RGND DGND 3.1 GND protection network against reverse battery 3.1.1 Solution 1: resistor in the ground line (RGND only) This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1. RGND 600 mV / (IS(on)max) 2. RGND (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power Dissipation in RGND (when VCC < 0: during reverse battery situations) is: PD = (-VCC)2/ RGND This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not shared by the device ground then the RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift varies depending on how many devices are ON in the case of several highside drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below). 16/26 Doc ID 17608 Rev 2 VN920B5-E 3.1.2 Application information Solution 2: diode (DGND) in the ground line A resistor (RGND = 1 k) should be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network produces a shift (600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift not varies if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected. 3.2 Load dump protection Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the VCC max DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2: 2004(E) table. 3.3 MCU I/Os protection If a ground protection network is used and negative transient are present on the VCC line, the control pins are pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the microcontroller I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of microcontroller I/Os. -VCCpeak/Ilatchup Rprot (VOHC - VIH - VGND) / IIHmax Calculation example: For VCCpeak= -100 V and Ilatchup 20 mA; VOHC 4.5 V 5 k Rprot 65 k. Recommended values: Rprot =10 k. Doc ID 17608 Rev 2 17/26 Application information 3.4 VN920B5-E P2PAK maximum demagnetization energy (VCC = 13.5V) Figure 20. P2PAK maximum turn-off current versus inductance(1) ILM AX (A) 100 A B C 10 1 0.01 0.1 1 10 100 L(mH) A: Tjstart = 150 C single pulse B: Tjstart = 100 C repetitive pulse C: Tjstart = 125 C repetitive pulse VIN, IL Demagnetization Demagnetization Demagnetization t 1. Values are generated with RL =0 . In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. 18/26 Doc ID 17608 Rev 2 VN920B5-E Package and PCB thermal data 4 Package and PCB thermal data 4.1 P2PAK thermal data Figure 21. P2PAK PC board(1) 1. Layout condition of Rth and Zth measurements (PCB FR4 area = 60 mm x 60 mm, PCB thickness = 2 mm, Cu thickness = 35 m , Copper areas: 0.97 cm2, 8 cm2). Figure 22. P2PAK Rthj-amb vs PCB copper area in open box free air condition RTHj_amb (C/W) 55 Tj-Tamb=50C 50 45 40 35 30 0 2 4 6 8 10 PCB Cu heatsink area (cm^2) Doc ID 17608 Rev 2 19/26 Package and PCB thermal data VN920B5-E Figure 23. P2PAK thermal impedance junction ambient single pulse ZT H (C/W) 1000 100 0.97 cm2 6 cm2 10 1 0.1 0.01 0.0001 0.001 0.01 0.1 1 T ime (s) 10 100 Equation 1: pulse calculation formula Z TH = R TH +Z THtp (1 - ) where = tP/T Figure 24. Thermal fitting model of a single channel HSD in P2PAK 20/26 Doc ID 17608 Rev 2 1000 VN920B5-E Package and PCB thermal data Table 13. P2PAK thermal parameter Area/island (cm2) 0.97 R1 (C/W) 0.02 R2 (C/W) 0.1 R3 (C/W) 0.22 R4 (C/W) 4 R5 (C/W) 9 R6 (C/W) 37 C1 (W*s/C) 0.0015 C2 (W*s/C) 0.007 C3 (W*s/C) 0.015 C4 (W*s/C) 0.4 C5 (W*s/C) 2 C6 (W*s/C) 3 Doc ID 17608 Rev 2 6 22 5 21/26 Package and packing information VN920B5-E 5 Package and packing information 5.1 ECOPACK(R) packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. 5.2 P2PAK mechanical data Figure 25. P2PAK package dimensions P010R 22/26 Doc ID 17608 Rev 2 VN920B5-E Package and packing information P2PAK mechanical data Table 14. mm Dim. Min. Typ. Max. A 4.30 4.80 A1 2.40 2.80 A2 0.03 0.23 b 0.80 1.05 c 0.45 0.60 c2 1.17 1.37 D 8.95 9.35 D2 E 8.00 10.00 E1 10.40 8.50 e 3.20 3.60 e1 6.60 7.00 L 13.70 14.50 L2 1.25 1.40 L3 0.90 1.70 L5 1.55 2.40 R V2 0.40 0 Package weight 8 1.40 Gr (typ) Doc ID 17608 Rev 2 23/26 Package and packing information 5.3 VN920B5-E P2PAK packing information Figure 26. P2PAK tube shipment (no suffix) Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) B C 50 1000 532 18 33.1 1 All dimensions are in mm. A Figure 27. P2PAK tape and reel (suffix "TR") REEL DIMENSIONS All dimensions are in mm. Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 24.4 60 30.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) All dimensions are in mm. 24 4 12 1.5 1.5 11.5 6.5 2 End Start Top cover tape No components Components 500mm min Empty components pockets saled with cover tape. User direction of feed 24/26 No components Doc ID 17608 Rev 2 500mm min VN920B5-E 6 Revision history Revision history Table 15. Document revision history Date Revision Changes 19-Jul-2010 1 Initial release. 19-Sep-2013 2 Updated Disclaimer Doc ID 17608 Rev 2 25/26 VN920B5-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B) AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT PURCHASER'S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR "AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL" INDUSTRY DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2013 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 26/26 Doc ID 17608 Rev 2