DATA SH EET
Product specification
Supersedes data of 2003 Jan 30 2003 Dec 08
INTEGRATED CIRCUITS
74LVC16244A; 74LVCH16244A
16-bit buffer/line driver; 5 V
input/output tolerant; 3-state
2003 Dec 08 2
Philips Semiconductors Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state 74LVC16244A;
74LVCH16244A
FEATURES
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 to 3.6 V
CMOS low power consumption
MULTIBYTETM flow-through standard pin-out
architecture
Low inductance multiple power and ground pins for
minimum noise and ground bounce
Direct interface with TTL levels
All data inputs have bushold (74LVCH16244A only).
Complies with JEDEC standard no. 8-1A
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
Specified from 40 to +85 °C and 40 to +125 °C.
DESCRIPTION
The 74LVC(H)16244A is a high-performance, low power,
low voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families. Inputs can be
driven from either 3.3 or 5 V devices. In 3-state operation,
outputs can handle 5 Volt. These features allow the use of
these devices as a mixed 3.3 and 5 V environment.
The 74LVC(H)16244A is a 16-bit non-inverting buffer/line
driver with 3-state outputs. The device can be used as four
4-bit buffers, two 8-bit buffers or one 16-bit buffer. The
device features four Output Enables (1OE, 2OE, 3OE and
4OE), each controlling four of the 3-state outputs. A HIGH
on nOE causes the outputs to assume a high-impedance
OFF-state.
The 74LVC(H)16244A is identical to the 74LVC16240A
but has non-inverting outputs.
The 74LVCH16244A bushold data inputs eliminates the
need for external pull-up resistors to hold unused inputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25°C; tr=t
f2.5 ns.
Notes
1. CPD is used to determine the dynamic power dissipation (PDin µW).
PD=C
PD ×VCC2×fi×N+Σ(CL×VCC2×fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
Σ(CL×VCC2×fo) = sum of the outputs.
2. The condition is VI= GND to VCC.
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
tPHL/tPLH propagation delay nAn to nYn CL= 50 pF; VCC = 3.3 V 3.0 ns
tPZH/tPZL 3-state output enable time nOE to nYn CL= 50 pF; VCC = 3.3 V 3.5 ns
tPHZ/tPLZ 3-state output disable time nOE to nYn CL= 50 pF; VCC = 3.3 V 3.7 ns
CIinput capacitance 5.0 pF
CPD power dissipation capacitance per gate VCC = 3.3 V; notes 1 and 2
outputs enabled 12 pF
outputs disabled 4.0 pF
2003 Dec 08 3
Philips Semiconductors Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state 74LVC16244A;
74LVCH16244A
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
ORDERING INFORMATION
INPUT OUTPUT
nOE nAn nYn
LLL
LHH
HXZ
TYPE NUMBER PACKAGE
TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE
74LVC16244ADL 40 to +125 °C 48 SSOP48 plastic SOT370-1
74LVCH16244ADL 40 to +125 °C 48 SSOP48 plastic SOT370-1
74LVC16244ADGG 40 to +125 °C 48 TSSOP48 plastic SOT362-1
74LVCH16244ADGG 40 to +125 °C 48 TSSOP48 plastic SOT362-1
74LVC16244AEV 40 to +125 °C 56 VFBGA56 plastic SOT702-1
74LVCH16244AEV 40 to +125 °C 56 VFBGA56 plastic SOT702-1
2003 Dec 08 4
Philips Semiconductors Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state 74LVC16244A;
74LVCH16244A
PINNING
SYMBOL PIN BALL DESCRIPTION
1OE 1 A1 output enable input (active LOW)
n.c. A2, A3, A4, A5, K2, K3, K4, K5 not connected
1Y0 2 B2 data output
1Y1 3 B1 data output
GND 4, 10, 15, 21, 28, 34, 39, 45 B3, B4, D3, D4, G3, G4, J3, J4 ground (0 V)
1Y2 5 C2 data output
1Y3 6 C1 data output
VCC 7, 18, 31, 42 C3, H3, C4, H4 supply voltage
2Y0 8 D2 data output
2Y1 9 D1 data output
2Y2 11 E2 data output
2Y3 12 E1 data output
3Y0 13 F1 data output
3Y1 14 F2 data output
3Y2 16 G1 data output
3Y3 17 G2 data output
4Y0 19 H1 data output
4Y1 20 H2 data output
4Y2 22 J1 data output
4Y3 23 J2 data output
4OE 24 K1 output enable input (active LOW)
3OE 25 K6 output enable input (active LOW)
4A3 26 J5 data input
4A2 27 J6 data input
4A1 29 H5 data input
4A0 30 H6 data input
3A3 32 G5 data input
3A2 33 G6 data input
3A1 35 F5 data input
3A0 36 F6 data input
2A3 37 E6 data input
2A2 38 E5 data input
2A1 40 D6 data input
2A0 41 D5 data input
1A3 43 C6 data input
1A2 44 C5 data input
1A1 46 B6 data input
1A0 47 B5 data input
2OE 48 A6 output enable input (active LOW)
2003 Dec 08 5
Philips Semiconductors Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state 74LVC16244A;
74LVCH16244A
16244
mna706
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE
1Y0
1Y1
GND
1Y2
1Y3
VCC
2Y0
2Y1
GND
2Y2
2Y3
3Y0
3Y1
GND
3Y2
3Y3
VCC
4Y0
4Y1
GND
4Y2
4Y3
4OE
2OE
1A0
1A1
GND
1A2
1A3
VCC
2A0
2A1
GND
2A2
2A3
3A0
3A1
GND
3A2
3A3
VCC
4A0
4A1
GND
4A2
4A3
3OE
Fig.1 Pin configuration SSOP48 and TSSOP48.
001aaa196
16244
A
B
C
D
E
F
H
J
K
G
246135
ball A1
index area
Fig.2 Pin configuration VFBGA56.
2003 Dec 08 6
Philips Semiconductors Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state 74LVC16244A;
74LVCH16244A
handbook, halfpage
43
44
46
47
1A0
1A1
1A2
1A3
1OE
2
3
1Y0
1Y1
1Y2
1Y3
5
6
1
32
33
35
36
3A0
3A1
3A2
3A3
3OE
13
14
3Y0
3Y1
3Y2
3Y3
16
17
25
MNA996
37
38
40
41
2A0
2A1
2A2
2A3
2OE
8
9
2Y0
2Y1
2Y2
2Y3
11
12
48
26
27
29
30
4A0
4A1
4A2
4A3
4OE
19
20
4Y0
4Y1
4Y2
4Y3
22
23
24
Fig.3 Logic symbol.
23
mna704
37 12
11
9
8
6
5
47
46
44
43
41
40
38
2A3
1A0
1A1
1A2
1A3
2A0
2A1
2A2
2
3
2Y3
2Y2
2Y1
2Y0
1Y3
1Y2
1Y0
1Y1
26
22
20
19
17
16
36
35
33
32
30
29
27
4A3
3A0
3A1
3A2
3A3
4A0
4A1
4A2
13
14
4Y3
4Y2
4Y1
4Y0
3Y3
3Y2
3Y0
3Y1
24
4OE 4EN
25
3OE 3EN
1OE 11EN
2OE 48 2EN
11
31
21
41
Fig.4 Logic symbol (IEEE/IEC).
handbook, halfpage
to internal circuit
MNA705
VCC
data input
Fig.5 Bushold circuit.
2003 Dec 08 7
Philips Semiconductors Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state 74LVC16244A;
74LVCH16244A
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Above 60 °C the value of Ptot derates linearly with 5.5 mW/K.
3. Above 70 °C the value of Ptot derates linearly with 1.8 mW/K.
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC supply voltage for maximum speed
performance 2.7 3.6 V
for low voltage applications 1.2 3.6 V
VIinput voltage 0 5.5 V
VOoutput voltage output HIGH or LOW state 0 VCC V
output 3-state 0 5.5 V
Tamb operating ambient
temperature in free air 40 +125 °C
tr,t
finput rise and fall times VCC = 1.2 to 2.7 V 0 20 ns/V
VCC = 2.7 to 3.6 V 0 10 ns/V
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC supply voltage 0.5 +6.5 V
IIK input diode current VI<0 −−50 mA
VIinput voltage note 1 0.5 +6.5 V
IOK output diode current VO>V
CC or VO<0 −±50 mA
VOoutput voltage output HIGH or LOW state;
note 1 0.5 VCC + 0.5 V
output 3-state; note 1 0.5 +6.5 V
IOoutput source or sink current VO=0toV
CC −±50 mA
ICC,I
GND VCC or GND current −±100 mA
Tstg storage temperature 65 +150 °C
Ptot power dissipation
SSOP and TSSOP package Tamb =40 to +125 °C; note 2 500 mW
VFBGA package Tamb =40 to +125 °C; note 3 1000 mW
2003 Dec 08 8
Philips Semiconductors Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state 74LVC16244A;
74LVCH16244A
DC CHARACTERISTICS
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
SYMBOL PARAMETER TEST CONDITIONS MIN. TYP. MAX. UNIT
OTHER VCC (V)
Tamb =40 to +85 °C; note 1
VIH HIGH-level input voltage 1.2 VCC −−V
2.7 to 3.6 2.0 −−V
VIL LOW-level input voltage 1.2 −−0V
2.7 to 3.6 −−0.8 V
VOH HIGH-level output voltage VI=V
IH or VIL
IO=100 µA 2.7 to 3.6 VCC 0.2 VCC V
IO=12 mA 2.7 VCC 0.5 −−V
IO=18 mA 3.0 VCC 0.6 −−V
IO=24 mA 3.0 VCC 0.8 −−V
VOL LOW-level output voltage VI=V
IH or VIL
IO= 100 µA 2.7 to 3.6 0 0.20 V
IO=12mA 2.7 −−0.40 V
IO=24mA 3.0 −−0.55 V
ILI input leakage current VI= 5.5 Vor GND;
note 2 3.6 −±0.1 ±5µA
IOZ 3-state output OFF-state
current VI=V
IH or VIL;
VO= 5.5 Vor GND;
note 2
3.6 0.1 ±5µA
Ioff power-off leakage supply
current VIor VO= 5.5 V 0.0 0.1 ±10 µA
ICC quiescent supply current VI=V
CC or GND;
IO=0 3.6 0.1 20 µA
ICC additionalquiescentsupply
current per input pin VI=V
CC 0.6 V;
IO=0 2.7 to 3.6 5 500 µA
IBH bushold LOW sustaining
current VI= 0.8 V;
notes 3 and 4 3.0 75 −−µA
IBHH bushold HIGH sustaining
current VI= 2.0 V;
notes 3 and 4 3.0 75 −−µA
IBHLO bushold LOW overdrive
current notes 3 and 5 3.6 500 −−µA
IBHHO bushold HIGH overdrive
current notes 3 and 5 3.6 500 −−µA
2003 Dec 08 9
Philips Semiconductors Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state 74LVC16244A;
74LVCH16244A
Notes
1. All typical values are measured at VCC = 3.3 V and Tamb =25°C.
2. For bushold parts, the bushold circuit is switched off when VI>V
CC allowing 5.5 V on the input pin.
3. Valid for data inputs of bushold parts (74LVCH16244A) only. For data inputs only, control inputs do not have a
bushold circuit.
4. The specified sustaining current at the data inputs holds the input below the specified VI level.
5. The specified overdrive current at the data input forces the data input to the opposite logic input state.
Tamb =40 to +125 °C
VIH HIGH-level input voltage 1.2 VCC −−V
2.7 to 3.6 2.0 −−V
VIL LOW-level input voltage 1.2 −−0V
2.7 to 3.6 −−0.8 V
VOH HIGH-level output voltage VI=V
IH or VIL
IO=100 µA 2.7 to 3.6 VCC 0.3 −−V
IO=12 mA 2.7 VCC 0.65 −−V
IO=18 mA 3.0 VCC 0.75 −−V
IO=24 mA 3.0 VCC 1−−V
VOL LOW-level output voltage VI=V
IH or VIL
IO= 100 µA 2.7 to 3.6 −−0.3 V
IO=12mA 2.7 −−0.6 V
IO=24mA 3.0 −−0.8 V
ILI input leakage current VI= 5.5 Vor GND;
note 2 3.6 −−±20 µA
IOZ 3-state output OFF-state
current VI=V
IH or VIL;
VO= 5.5 Vor GND;
note 2
3.6 −−±20 µA
Ioff power-off leakage supply
current VIor VO= 5.5 V 0.0 −−±20 µA
ICC quiescent supply current VI=V
CC or GND;
IO=0 3.6 −−80 µA
ICC additionalquiescentsupply
current per input pin VI=V
CC 0.6 V;
IO=0 2.7 to 3.6 −−5000 µA
IBH bushold LOW sustaining
current VI= 0.8 V;
notes 3 and 4 3.0 60 −−µA
IBHH bushold HIGH sustaining
current VI= 2.0 V;
notes 3 and 4 3.0 60 −−µA
IBHLO bushold LOW overdrive
current notes 3 and 5 3.6 500 −−µA
IBHHO bushold HIGH overdrive
current notes 3 and 5 3.6 500 −−µA
SYMBOL PARAMETER TEST CONDITIONS MIN. TYP. MAX. UNIT
OTHER VCC (V)
2003 Dec 08 10
Philips Semiconductors Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state 74LVC16244A;
74LVCH16244A
AC CHARACTERISTICS
GND = 0 V; tr=t
f2.5 ns; CL= 50 pF; RL= 500 .
Notes
1. All typical values are measured at Tamb =25°C.
2. These typical values are measured at VCC = 3.3 V and Tamb =25°C.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
WAVEFORMS VCC (V)
Tamb =40 to +85 °C; note1
tPHL/tPLH propagation delay nAn to nYn see Figs 6 and 8 1.2 11.0 ns
2.7 1.0 4.7 ns
3.0 to 3.6 1.1 3.0(2) 4.1 ns
tPZH/tPZL 3-state output enable time nOE to nYn see Figs 7 and 8 1.2 15.0 ns
2.7 1.0 5.8 ns
3.0 to 3.6 1.0 3.5(2) 4.6 ns
tPHZ/tPLZ 3-state output disable time nOE to nYn see Figs 7 and 8 1.2 10.0 ns
2.7 1.0 6.2 ns
3.0 to 3.6 1.8 3.7(2) 5.2 ns
Tamb =40 to +125 °C
tPHL/tPLH propagation delay nAn to nYn see Figs 6 and 8 1.2 −−−ns
2.7 1.0 6.0 ns
3.0 to 3.6 1.1 5.5 ns
tPZH/tPZL 3-state output enable time nOE to nYn see Figs 7 and 8 1.2 −−−ns
2.7 1.0 7.5 ns
3.0 to 3.6 1.0 6.0 ns
tPHZ/tPLZ 3-state output disable time nOE to nYn see Figs 7 and 8 1.2 −−−ns
2.7 1.0 8.0 ns
3.0 to 3.6 1.8 6.5 ns
2003 Dec 08 11
Philips Semiconductors Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state 74LVC16244A;
74LVCH16244A
AC WAVEFORMS
handbook, halfpage
MNA171
nAn input
nYn output
tPLH tPHL
GND
VI
VM
VM
VM
VM
VOH
VOL
Fig.6 The input nAn to output nYn propagation delays.
VOL and VOH are typical output voltage drop that occur with the output load.
VCC VMINPUT
VItr=t
f
1.2 V 0.5 ×VCC VCC 2.5 ns
2.7 V 1.5 V 2.7 V 2.5 ns
3.0 to 3.6 V 1.5 V 2.7 V 2.5 ns
2003 Dec 08 12
Philips Semiconductors Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state 74LVC16244A;
74LVCH16244A
handbook, full pagewidth
MNA362
tPLZ
tPHZ
outputs
disabled outputs
enabled
VY
VX
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
nOE input
VI
VOL
VOH
VCC
VM
GND
GND
tPZL
tPZH
VM
VM
Fig.7 3-state enable and disable times.
VOL and VOH are typical output voltage drop that occur with the output load.
VCC VMINPUT
VItr=t
f
1.2 V 0.5 ×VCC VCC 2.5 ns
2.7 V 1.5 V 2.7 V 2.5 ns
3.0 to 3.6 V 1.5 V 2.7 V 2.5 ns
VX=V
OL +0.3VatV
CC 2.7 V;
VX=V
OL +0.1VatV
CC < 2.7 V;
VY=V
OH 0.3VatV
CC 2.7 V;
VY=V
OH 0.1VatV
CC < 2.7 V.
2003 Dec 08 13
Philips Semiconductors Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state 74LVC16244A;
74LVCH16244A
handbook, full pagewidth
VEXT
VCC
VIVO
MNA616
D.U.T.
CL
RT
RL
RL
PULSE
GENERATOR
Fig.8 Load circuitry for switching times.
Definitions for test circuits:
RL= Load resistor.
CL= Load capacitance including jig and probe capacitance.
RT= Termination resistance should be equal to the output impedance Zo of the pulse generator.
Note
1. The circuit performs better when RL= 1000 .
VCC VICLRLVEXT
tPLH/tPHL tPZH/tPHZ tPZL/tPLZ
1.2 V VCC 50 pF 500 (1) open GND 2 ×VCC
2.7 V 2.7 V 50 pF 500 open GND 2 ×VCC
3.0 to 3.6 V 2.7 V 50 pF 500 open GND 2 ×VCC
2003 Dec 08 14
Philips Semiconductors Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state 74LVC16244A;
74LVCH16244A
PACKAGE OUTLINES
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(1)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.4
0.2 2.35
2.20 0.25 0.3
0.2 0.22
0.13 16.00
15.75 7.6
7.4 0.635 1.4 0.25
10.4
10.1 1.0
0.6 1.2
1.0 0.85
0.40 8
0
o
o
0.18 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT370-1 99-12-27
03-02-19
(1)
w
M
b
p
D
H
E
E
Z
e
c
v
M
A
X
A
y
48 25
MO-118
24
1
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
pin 1 index
0 5 10 mm
scale
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1
A
max.
2.8
2003 Dec 08 15
Philips Semiconductors Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state 74LVC16244A;
74LVCH16244A
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(2)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05 0.2
0.1 8
0
o
o
0.1
DIMENSIONS (mm are the original dimensions).
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
SOT362-1 99-12-27
03-02-19
w
M
θ
A
A
1
A
2
D
L
p
Q
detail X
E
Z
e
c
L
X
(A )
3
0.25
124
48 25
y
pin 1 index
b
H
1.05
0.85 0.28
0.17 0.2
0.1 12.6
12.4 6.2
6.0 0.5 1 0.25
8.3
7.9 0.50
0.35 0.8
0.4
0.08
0.8
0.4
p
Ev
M
A
A
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1
A
max.
1.2
0
2.5
5 mm
scale
MO-153
2003 Dec 08 16
Philips Semiconductors Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state 74LVC16244A;
74LVCH16244A
0.65
A
1
bA
2
UNIT D ye
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
02-08-08
03-07-01
IEC JEDEC JEITA
mm 10.3
0.2 0.7
0.6 4.6
4.4
y1
7.1
6.9
0.45
0.35 0.08 0.1
e1
3.25
e2
5.85
DIMENSIONS (mm are the original dimensions)
SOT702-1 MO-225
E
0.15
v
0.08
w0 2.5 5 mm
scale
SOT702-1
VFBGA56: plastic very thin fine-pitch ball grid array package; 56 balls; body 4.5 x 7 x 0.65 mm
A
max.
AA2
A
1
detail X
y
y1C
e
e
b
X
D
E
C
A
B
C
D
E
F
H
G
J
K
246135
ball A1
index area
BA
e2
e1
1/2
e
1/2
e
AC
CB
v
M
w
M
ball A1
index area
2003 Dec 08 17
Philips Semiconductors Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state 74LVC16244A;
74LVCH16244A
DATA SHEET STATUS
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
LEVEL DATA SHEET
STATUS(1) PRODUCT
STATUS(2)(3) DEFINITION
I Objective data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
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accordance with the Absolute Maximum Rating System
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values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseoratany other conditions above thosegiveninthe
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
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Printed in The Netherlands R20/07/pp18 Date of release: 2003 Dec 08 Document order number: 9397 750 12369
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The 74LVC(H)16244A is a high-performance, low power, low voltage, Si-gate CMOS device, superior to most advanced CMOS
compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 Volt. These features allow the use of these devices as a mixed 3.3
and 5 V environment.
The 74LVC(H)16244A is a 16-bit non-inverting buffer/line driver with 3-state outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The device features
four Output Enables (1OE, 2OE, 3OE and 4OE), each controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state.
The 74LVC(H)16244A is identical to the 74LVC16240A but has non-inverting outputs.
The 74LVCH16244A bushold data inputs eliminates the need for external pull-up resistors to hold unused inputs.
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 to 3.6 V
CMOS low power consumption
MULTIBYTETM flow-through standard pin-out architecture
Low inductance multiple power and ground pins for minimum noise and ground bounce
Direct interface with TTL levels
All data inputs have bushold (74LVCH16244A only).
Complies with JEDEC standard no. 8-1A
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
Specified from -40 to +85 Cel and -40 to +125 Cel.
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74LVC16244A;
74LVCH16244A
(Product Specification)
08-Dec-03, 18 Pages,
117kB
74LVC16244A; 74LVCH16244A - 16-bit buffer/line driver; 5 V
input/output tolerant; 3-state
All information hereunder is subject to the subsequent disclaimers
General description
Features
Products/packages
Quality/reliability/chemical
content
Pricing/ordering/availability
Samples
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The variants in the table below are discontinued. See the table Discontinued information for more information.
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Products/
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Type number Orderable part number Ordering code (12NC) Product status Package Packing Marking ECCN
74LVC16244ADGG 74LVC16244ADGG,112 9352 351 50112 Volume production SOT362-1
(TSSOP48) Tube Standard Marking
74LVC16244ADGG 74LVC16244ADGG,118 9352 351 50118 Volume production SOT362-1
(TSSOP48) Reel Pack, SMD, 13" Standard Marking
74LVC16244ADL 74LVC16244ADL,112 9352 351 40112 Volume production SOT370-1
(SSOP48) Tube Standard Marking
74LVC16244ADL 74LVC16244ADL,118 9352 351 40118 Volume production SOT370-1
(SSOP48) Tape reel smd Standard Marking
74LVC16244AEV 74LVC16244AEV,118 9352 719 37118 Volume production SOT702-1
(VFBGA56) Reel Pack, SMD, 13" Standard Marking
74LVC16244AEV 74LVC16244AEV,151 9352 719 37151 Volume production SOT702-1
(VFBGA56) Tray Pack, Bakeable, Single Standard Marking
74LVC16244AEV 74LVC16244AEV,157 9352 719 37157 Volume production SOT702-1
(VFBGA56) Tray Pack, Bakeable, Multiple Standard Marking
74LVCH16244ADGG 74LVCH16244ADGG:11 9352 384 50112 Volume production SOT362-1
(TSSOP48) Tube Standard Marking
74LVCH16244ADGG 74LVCH16244ADGG,11 9352 384 50118 Volume production SOT362-1
(TSSOP48) Reel Pack, SMD, 13" Standard Marking
74LVCH16244ADL 74LVCH16244ADL,112 9352 384 40112 Volume production SOT370-1
(SSOP48) Tube Standard Marking
74LVCH16244ADL 74LVCH16244ADL,118 9352 384 40118 Volume production SOT370-1
(SSOP48) Tape reel smd Standard Marking
74LVCH16244AEV 74LVCH16244AEV,118 9352 707 92118 Volume production SOT702-1
(VFBGA56) Reel Pack, SMD, 13" Standard Marking
74LVCH16244AEV 74LVCH16244AEV,151 9352 707 92151 Volume production SOT702-1
(VFBGA56) Tray Pack, Bakeable, Single Standard Marking
74LVCH16244AEV 74LVCH16244AEV,157 9352 707 92157 Volume production SOT702-1
(VFBGA56) Tray Pack, Bakeable, Multiple Standard Marking
Type number Orderable part number Ordering code (12NC) Product status Package Packing Marking ECCN
74LVC16244ADGG 74LVC16244ADGG,518 9352 351 50518 Discontinued
Replacement product
SOT362-1
(TSSOP48) Reel Dry Pack, SMD, 13" Standard Marking
74LVC16244ADGG 74LVC16244ADGG,512 9352 351 50512 Discontinued
Replacement product
SOT362-1
(TSSOP48) Tube Dry Pack Standard Marking
74LVCH16244ADGG 74LVCH16244ADGG:51 9352 384 50518 Discontinued
Replacement product
SOT362-1
(TSSOP48) Reel Dry Pack, SMD, 13" Standard Marking
74LVCH16244ADGG 74LVCH16244ADGG,51 9352 384 50512 Discontinued
Replacement product
SOT362-1
(TSSOP48) Tube Dry Pack Standard Marking
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The variants in the table below are discontinued. See the table Discontinued information for more information.
Quality and reliability disclaimer
Type number Orderable part number Chemical content RoHS Leadfree conversion date RHF IFR (FIT) MTBF (hours) MSL
74LVC16244ADGG 74LVC16244ADGG,112 74LVC16244ADGG Always Pb-free 3,87 2,58E+08 1
74LVC16244ADGG 74LVC16244ADGG,118 74LVC16244ADGG Always Pb-free 3,87 2,58E+08 1
74LVC16244ADL 74LVC16244ADL,112 74LVC16244ADL week 13, 2005 3,87 2,58E+08 1
74LVC16244ADL 74LVC16244ADL,118 74LVC16244ADL week 13, 2005 3,87 2,58E+08 1
74LVC16244AEV 74LVC16244AEV,118 74LVC16244AEV 3,87 2,58E+08 2
74LVC16244AEV 74LVC16244AEV,151 74LVC16244AEV 3,87 2,58E+08 2
74LVC16244AEV 74LVC16244AEV,157 74LVC16244AEV 3,87 2,58E+08 2
74LVCH16244ADGG 74LVCH16244ADGG:11 74LVCH16244ADGG Always Pb-free 3,87 2,58E+08 1
74LVCH16244ADGG 74LVCH16244ADGG,11 74LVCH16244ADGG Always Pb-free 3,87 2,58E+08 1
74LVCH16244ADL 74LVCH16244ADL,112 74LVCH16244ADL week 13, 2005 3,87 2,58E+08 1
74LVCH16244ADL 74LVCH16244ADL,118 74LVCH16244ADL week 13, 2005 3,87 2,58E+08 1
74LVCH16244AEV 74LVCH16244AEV,118 74LVCH16244AEV 3,87 2,58E+08 2
74LVCH16244AEV 74LVCH16244AEV,151 74LVCH16244AEV 3,87 2,58E+08 2
74LVCH16244AEV 74LVCH16244AEV,157 74LVCH16244AEV 3,87 2,58E+08 2
Type number Orderable part number Chemical content RoHS Leadfree conversion date RHF IFR (FIT) MTBF (hours) MSL
74LVC16244ADGG 74LVC16244ADGG,518 74LVC16244ADGG week 14, 2005 3,87 2,58E+08 1
74LVC16244ADGG 74LVC16244ADGG,512 74LVC16244ADGG week 14, 2005 3,87 2,58E+08 1
74LVCH16244ADGG 74LVCH16244ADGG:51 74LVCH16244ADGG week 14, 2005 3,87 2,58E+08 1
74LVCH16244ADGG 74LVCH16244ADGG,51 74LVCH16244ADGG week 14, 2005 3,87 2,58E+08 1
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(12NC)
Orderable part number Indicative
price/unit($)
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quantity
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date
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Samples
74LVC16244ADGG 9352 351 50112 74LVC16244ADGG,112 NA FUTURE
ELECTRONICS 3 11/12/2009 Buy
online
not
available
74LVC16244ADGG 9352 351 50118 74LVC16244ADGG,118 ASIA SACL - Hong
Kong/China yes 2000 11/12/2009 Buy
online
not
available
74LVC16244ADL 9352 351 40112 74LVC16244ADL,112 0.7500 not
available
74LVC16244ADL 9352 351 40118 74LVC16244ADL,118 0.7500 not
available
74LVC16244AEV 9352 719 37118 74LVC16244AEV,118 2.2300 Order
samples
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Related applications
Intelligent washing machine
Transceiver board
Main CPU board
74LVC16244AEV 9352 719 37151 74LVC16244AEV,151 2.2300 not
available
74LVC16244AEV 9352 719 37157 74LVC16244AEV,157 2.2300 not
available
74LVCH16244ADGG 9352 384 50112 74LVCH16244ADGG:11 not
available
74LVCH16244ADGG 9352 384 50118 74LVCH16244ADGG,11 not
available
74LVCH16244ADL 9352 384 40112 74LVCH16244ADL,112 0.8900 not
available
74LVCH16244ADL 9352 384 40118 74LVCH16244ADL,118 0.8900 NA MOUSER
ELECTRONICS 100 11/12/2009 Buy
online
Order
samples
74LVCH16244AEV 9352 707 92118 74LVCH16244AEV,118 2.1300 Order
samples
74LVCH16244AEV 9352 707 92151 74LVCH16244AEV,151 2.1300 not
available
74LVCH16244AEV 9352 707 92157 74LVCH16244AEV,157 2.1300 not
available
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Discontinued information Hide
Type number Ordering code (12NC) Last-time buy date Last-time delivery date Replacement product DN Notice Status Comments
74LVC16244ADGG 935235150518 DN
74LVC16244ADGG 935235150512 DN
74LVCH16244ADGG 935238450518 DN
74LVCH16244ADGG 935238450512 DN
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Application Notes
AN240;Interfacing 3 Volt and 5 Volt Applications (1995-09-15)
AN263_2;Power considerations when using CMOS and BiCMOS logic devices (2002-02-05)
AN263_2;Power considerations when using CMOS and BiCMOS logic devices (2002-02-05)
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roducts Hide
Type number Package Description Propagation
Delay(ns)
Voltage No. of
Pins
Power Dissipation
Considerations
Logic Switching
Levels
Output Drive
Capability
74LVC16244ADGG SOT362-1
(TSSOP48)
3.3V 16-Bit Buffer/Line Driver; Non-
Inverting (3-State) 3.0@3.3V 1.2-3.6 48 Low Power or Battery
Applications TTL +/- 24 mA
74LVC16244ADL SOT370-1
(SSOP48)
3.3V 16-Bit Buffer/Line Driver; Non-
Inverting (3-State) 3.0@3.3V 1.2-3.6 48 Low Power or Battery
Applications TTL +/- 24 mA
74LVC16244AEV SOT702-1
(VFBGA56)
3.3V 16-Bit Buffer/Line Driver; Non-
Inverting (3-State) 3.0@3.3V 1.2-3.6 Low Power or Battery
Applications TTL +/- 24 mA
74LVCH16244ADGG SOT362-1
(TSSOP48)
3.3V 16-Bit Buffer/Line Driver; Non-
Inverting with Bus Hold (3-State) 3.0@3.3V 1.2-3.6 48 Low Power or Battery
Applications TTL +/- 24 mA
SOT370-1 3.3V 16-Bit Buffer/Line Driver; Non- Low Power or Battery
Pa
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it buffer/line driver; 5 V in
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p
ut tolerant; 3-state from NXP Semiconductors
20-Nov-2009http://www.nxp.com
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74LVCH16244ADL (SSOP48) Inverting with Bus Hold (3-State) 3.0@3.3V 1.2-3.6 48 Applications TTL +/- 24 mA
74LVCH16244AEV SOT702-1
(VFBGA56)
3.3V 16-Bit Buffer/Line Driver; Non-
Inverting with Bus Hold (3-State) 3.0@3.3V 1.2-3.6 Low Power or Battery
Applications TTL +/- 24 mA
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©2006-2009 NXP Semiconductors. All rights reserved.
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ut/out
p
ut tolerant; 3-state from NXP Semiconductors
20-Nov-2009http://www.nxp.com