1
FEATURES
DESCRIPTION
APPLICATIONS
SET
1
2
3
4
10
9
8
5
IN
VCC
OUT
VSS
STAT1
STAT2 7
6
BAT
PG
ISET
bq24012DRC
+
BATTERY
PACK
PACK+
PACK
SYSTEM
SYSTEM
INTERFACE
CE
AC ADAPTER
bq24010, bq24012bq24013, bq24014, bq24018
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...................................................................................................................................... SLUS530J – SEPTEMBER 2002 – REVISED DECEMBER 2008
SINGLE-CHIP, LI-ION CHARGE MANAGEMENT IC FORHANDHELD APPLICATIONS ( bqTINY™)
2
•Small 3 mm × 3 mm MLP (QFN) Package•Ideal for Low-Dropout Designs for Single-Cell
The bqTINY™ series are highly integrated Li-Ion andLi-Pol linear charge management devices targeted atLi-Ion or Li-Pol Packs in Space Limited
space limited portable applications. The bqTINY™Applications
series offer integrated powerFET and current sensor,•Integrated Power FET and Current Sensor for
reverse blocking protection, high accuracy currentUp to 1-A Charge Applications
and voltage regulation, charge status, and charge•Reverse Leakage Protection Prevents Battery
termination, in a small package.Drainage
The bqTINY™ charges the battery in three phases:•Integrated Current and Voltage Regulation
conditioning, constant current, and constant voltage.Charge is terminated based on minimum current. An•± 0.5% Voltage Regulation Accuracy
internal charge timer provides a backup safety feature•Charge Termination by Minimum Current and
for charge termination. The bqTINY™ automaticallyTime
re-starts the charge if the battery voltage falls below•Precharge Conditioning With Safety Timer
an internal threshold. The bqTINY™ automaticallyenters sleep mode when V
CC
supply is removed.•Status Outputs for LED or System InterfaceIndicates Charge and Fault Conditions
In addition to the standard features, different versions•Battery Insertion and Removal Detection
of the bqTINY™ offer a multitude of additionalfeatures. These include temperature sensing input for•Works With Regulated and Unregulated
detecting hot or cold battery packs; power good ( PG)Supplies
output indicating the presence of valid input power; a•Short-Circuit Protection
TTL-level charge-enable input (CE) used to disable or•Charge Voltage Options: 4.2 V and 4.36 V
enable the charge process; and a TTL-level timer andtermination enable (TTE) input used to disable orenable the fast-charge timer and charge termination.•Cellular Phones•PDAs, MP3 Players•Digital Cameras•Internet Appliances
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2bqTINY is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2002 – 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
ABSOLUTE MAXIMUM RATINGS
(1)
DISSIPATION RATINGS
RECOMMENDED OPERATING CONDITIONS
bq24010, bq24012bq24013, bq24014, bq24018
SLUS530J – SEPTEMBER 2002 – REVISED DECEMBER 2008 ......................................................................................................................................
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
CHARGE REGULATION OPTIONALT
A
PART NUMBER
(2) (3)
MARKINGSVOLTAGE (V)
(1)
FUNCTIONS
(1)
4.2 PG and TS bq24010DRCR AZN4.2 PG and CE bq24012DRCR AZP4.2 CE and TTE bq24013DRCR AZQ– 40 ° C to 125 ° C bq24014DRCR4.2 CE and TS AZRbq24014DRCT
bq24018DRCR4.36 CE and TTE BZHbq24018DRCT
(1) Contact Texas Instruments for other options.(2) The DRC package is available only taped and reeled. Quantities are 3,000 devices per reel (e.g. bq24010DRCR) and 250 devices permini-reel (e.g. bq24014DRCT).(3) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIwebsite at www.ti.com .
VALUE UNIT
Supply voltage range, (V
CC
all with respect to V
SS
) – 0.3 to 18 VIN, STAT1, STAT2, TS, PG, CE, TTE – 0.3 to VCC VInput voltage range
(2)
BAT, OUT, ISET – 0.3 to 7 VDCVoltage difference between V
CC
and IN inputs V
CC
– V
IN
± 0.5 VOutput sink/source current STAT1, STAT2, PG 15Output current IN, OUT 1.5T
A
Operating free-air temperature range
– 40 to 125 ° CT
J
Junction temperature rangeT
stg
Storage temperature – 65 to 150 ° C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under recommended operatingconditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) All voltages are DC and with respect to VSS.
T
A
< 40 ° C DERATING FACTORPACKAGE θ
JA
POWER RATING ABOVE T
A
= 40 ° C
DRC
(1)
47 ° C/W 1.5 W 0.021 W/ ° C1
(1) This data is based on using the JEDEC High-K board and the exposed die pad is connected to a copper pad on the board. This isconnected to the ground plane by a 2x3 via matrix.
over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
V
CC
Supply voltage
(1) (2)
3 16.5 VV
IN
Input voltage
(1) (2)
3 16.5 VT
J
Operating junction temperature range – 40 125 ° C
(1) Pins V
CC
and IN must be tied together.(2) If Vin is between UVLO and 4.35V, and above the battery voltage, then the IC is active (can deliver some charge to the battery), but theIC will have limited or degraded performance (some functions may not meet data sheet specifications). The battery may beundercharged (V
O(reg)
less than in the specification), but will not be overcharged (V
O(reg)
will not exceed specification).
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Product Folder Link(s): bq24010, bq24012 bq24013, bq24014, bq24018
ELECTRICAL CHARACTERISTICS
(1)
( )
SET SET
SET
O(OUT)
K x V
( ) ( )
I = R( )
ISET
ISET
ISET
O(OUT)
V( )
I = K( ) x R + 10 A
( )
æ ö
ç ÷
ç ÷
m
è ø
(4)
( )
SET PRECHG
SET
O(PRECHG)
K x V
( ) ( )
I = R( )
bq24010, bq24012bq24013, bq24014, bq24018
www.ti.com
...................................................................................................................................... SLUS530J – SEPTEMBER 2002 – REVISED DECEMBER 2008
over 0 ° C ≤T
J
≤125 ° C and recommended supply voltage, (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT CURRENT
I
CC(VCC)
VCC current V
CC
> V
CC(min)
, STATx pins in OFF state 0 3.5 5 mA
I
CC(SLP)
Sleep current Sum of currents into OUT and BAT pins, V
CC
< V
(SLP)
5µA
I
IB(BAT)
Input bias current on BAT pin 500 nA
I
IB(TS)
Input current on TS pin V
I(TS)
≤10 V 1
I
IB(CE)
Input current on CE pin 1 µA
I
IB( TTE)
Input bias current on TTE pin 1
VOLTAGE REGULATION V
O(REG)
+ V
(DO – MAX)
≤V
CC
, I
(TERM)
< I
O(OUT)
≤1 A
bq24010, bq24012, bq24013, bq24014 4.2 VOutput voltage, V
O(REG)
bq24018 4.36
T
A
= 25 ° C – 0.5% 0.5%Voltage regulation accuracy
– 1% 1%
V
(DO)
Dropout voltage (V
(IN)
– V
(OUT)
) V
O(REG)
+ V
(DO – MAX)
)≤V
CC
, I
O(OUT)
= 1A 650 790 mV
CURRENT REGULATION
V
CC
≥4.5 V, V
IN
≥4.5 V, V
I(BAT)
> V
(LOWV)
,
100 1000V
IN
– V
I(BAT)
> V
(DO – MAX)I
O(OUT)
(1)
Output current range mASee note
(2)
25 100
bq24010,
bq24012,Voltage on ISET pin, V
CC
≥4.5 V,
2.45 2.50 2.55 Vbq24013,V
(SET)
Output current set voltage V
IN
≥4.5 V, V
I(BAT)
> V
(LOWV)
,
bq24014V
IN
– V
I(BAT)
> V
(DO – MAX)
, V
O(REG)
= 4.2 V
bq24018 2.548 2.6 2.652 V
50 mA ≤I
O(OUT)
≤1000 mA, V
(LOWV)
< V
(OUT)
< V
(RCH)
315 335 355
25 mA ≤I
O(OUT)
< 50 mA, V
(LOWV)
< V
(OUT)
< V
(RCH)
315 372 430
K
(SET)
Output current ISET factor 10 mA ≤I
O(OUT)
< 100 mA, V
(OUT)
< V
(LOWV)
350 1000
2.5 mA ≤I
O(OUT)
< 10 mA, V
(OUT)
< V
(LOWV)
450
2.5 mA ≤I
O(OUT)
< I
(PGM)
, V
(OUT)
< V
(RCH)
355
(3)
PRECHARGE AND SHORT-CIRCUIT CURRENT REGULATION
Precharge to fast-charge transitionV
(LOWV)
Voltage on BAT pin 2.80 2.95 3.10 Vthreshold
Precharge to short-charge transitionV
(SC)
Voltage on BAT pin 1 1.4 1.8 Vthreshold
I
O(PRECHG)
(4)
Precharge range V
(SC)
< V
I(BAT)
< V
(LOWV)
, t < t
(PRECHG)
10 100 mV
V
(PRECHG)
Precharge set voltage Voltage on ISET pin, V
(SC)
< V
I(BAT)
< V
(LOWV)
225 250 280 mV
I
SC
Short circuit current V
(SC)
> V
I(BAT)
660 900 1200 µA
(2) Specified by design. Not production tested.(3) The ISET pin may be used as a current monitor during voltage regulation by applying the following equation:
This equation is also used for calculating the termination point.
Copyright © 2002 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): bq24010, bq24012 bq24013, bq24014, bq24018
ELECTRICAL CHARACTERISTICS (Continued)
(1)
( )
SET TAPER
SET
O(TAPER)
K x V
( ) ( )
I = R( )
bq24010, bq24012bq24013, bq24014, bq24018
SLUS530J – SEPTEMBER 2002 – REVISED DECEMBER 2008 ......................................................................................................................................
www.ti.com
over 0 ° C ≤T
J
≤125 ° C and recommended supply voltage, (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
CHARGE TAPER AND TERMINATION DETECTION
I
(TAPER)
(1)
Charge taper detection range V
I(BAT)
> V
(RCH)
, t < t
(TAPER)
10 100 mA
Voltage on ISET pin, V
I(BAT)
> V
(RCH)
, t < t
(TAPER)
,V
(TAPER)
Charge taper detection set voltage 225 250 275 mVV
I(BAT)
= V
O(REG)
Charge termination detection set Voltage on ISET pin, V
I(BAT)
= V
O(REG)
,V
(TERM)
5 17.5 50 mVvoltage V
I(BAT)
> V
(RCH)
,I
(TERM)
= K
(SET)
נV
(TERM)
/R
(SET)
TEMPERATURE COMPARATOR
V
(TS1)
Lower threshold Voltage on TS pin 29 30 31
V
(TS2)
Upper threshold Voltage on TS pin 60 61 62 %VCC
Hysteresis 1
BATTERY RECHARGE THRESHOLD
V
O(REG)
V
O(REG)
V
O(REG)V
(RCH)
Recharge threshold V– 0.135 – 0.1 – 0.075
STAT1, STAT2, AND PG OUTPUTS
V
OL
Output (low) saturation voltage I
O
= 10 mA 0.5 V
CHARGE ENABLE ( CE) AND TIMER AND TERMINATION ENABLE ( TTE) INPUTS
V
IL
Low-level input voltage I
IL
= 1 µA 0 0.8
VV
IH
High-level input voltage I
IL
= 1 µA 2.0
TIMERS
t
{PRECHG)
Precharge time 1, 548 2,065 2,581
t
(TAPER)
Taper time 1, 548 2,065 2,581 s
t
(CHG)
Charge time 15, 480 20,650 25,810
SLEEP COMPARATOR
V
CC
≤
V
SLP
Sleep mode entry threshold voltage V
POR
≤V
(IBAT)
≤V
O(REG)
V
I(BAT)
+ 30 mV
VV
CC
≥
Sleep mode exit threshold voltage V
POR
≤V
(IBAT)
≤V
O(REG)
V
I(BAT)
+ 22 mV
VCC decreasing below threshold, 100 ns fall time, 10 mVSleep mode deglitch time 250 650 msoverdrive
BATTERY DETECTION THRESHOLDS
I
(DETECT)
Battery detection current 2 V ≤V
(IBAT)
≤V
(RCH)
– 3.1 – 4.6 – 6.1 mA
I
(DETECT)
battery detection time 2 V ≤V
(IBAT)
≤V
(RCH)
100 125 150 ms
I
(FAULT)
Fault current V
(IBAT)
< V
(RCH)
and/or t > t
(PRECHG)
660 900 1200 µA
POWER-ON RESET AND INPUT VOLTAGE RAMP RATE
V
POR
(2)
Power-on reset threshold voltage 225 2.5 2.75 V
(2) Specified by design. Not production tested.
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Product Folder Link(s): bq24010, bq24012 bq24013, bq24014, bq24018
DEVICE INFORMATION
DRC PACKAGE
(TOP VIEW)
VSS
5
STAT2
4
STAT1
3
VCC
2
IN
1
6 7 8 9 10
ISET PG TS BAT OUT
bq24010DRC
DRC PACKAGE
(TOP VIEW)
VSS
5
STAT2
4
STAT1
3
VCC
2
IN
1
6 7 8 9 10
ISET PG CE BAT OUT
bq24012DRC
DRC PACKAGE
(TOP VIEW)
VSS
5
STAT2
4
STAT1
3
VCC
2
IN
1
6 7 8 9 10
ISET CE TTE BAT OUT
DRC PACKAGE
(TOP VIEW)
VSS
5
STAT2
4
STAT1
3
VCC
2
IN
1
6 7 8 9 10
ISET CE TS BAT OUT
bq24014DRC
bq24013DRC
and
bq24018DRC
bq24010, bq24012bq24013, bq24014, bq24018
www.ti.com
...................................................................................................................................... SLUS530J – SEPTEMBER 2002 – REVISED DECEMBER 2008
Copyright © 2002 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): bq24010, bq24012 bq24013, bq24014, bq24018
bq24010, bq24012bq24013, bq24014, bq24018
SLUS530J – SEPTEMBER 2002 – REVISED DECEMBER 2008 ......................................................................................................................................
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TERMINAL FUNCTIONS
TERMINAL
bq24013
I/O DESCRIPTIONNAME bq24010 bq24012 and bq24014bq24018
(1)
BAT 9 9 9 9 I Battery voltage sense inputCE – 8 7 7 I Charge enable input (active low)IN 1 1 1 1 I Charge input voltage. This input must be tied to the VCC pin.ISET 6 6 6 6 O Charge current set pointOUT 10 10 10 10 O Charge current outputPG 7 7 – – O Power good status output (open collector)STAT1 3 3 3 3 O Charge status output 1 (open collector)STAT2 4 4 4 4 O Charge status output 2 (open collector)TTE – – 8 – I Timer and termination enable input (active low)TS 8 – – 8 I Temperature sense inputVCC 2 2 2 2 I VCC supply inputVSS 5 5 5 5 – Ground inputThere is an internal electrical connection between the exposedthermal pad and V
SS
pin of the device. The exposed thermal padExposed
must be connected to the same potential as the Vss pin on theThermal Pad Pad Pad Pad –
printed circuit board. Do not use the thermal pad as the primaryPAD
ground input for the device. VSS pin must be connected to groundat all times.
(1) The bq24018 is in product preview status.
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Product Folder Link(s): bq24010, bq24012 bq24013, bq24014, bq24018
FUNCTIONAL BLOCK DIAGRAM
VI(BAT)
VO(REG)
I(DETECT) I(FAULT)
ENABLE ENABLE
VI(BAT)
V(SLP)
I(DETECT) ENABLE
I(FAULT) ENABLE
VI(BAT)
VI(BAT)
VI(BAT)
VI(SET)
VI(SET)
VO(REG)
VO(REG)
V(ISET)
VSET
CE
Dotted lines represent optional features
IN
VCC
+
+
DEGLITCH
OUT
ISET
REFERENCE
ANDBIAS
VCC
BAT
VCC
TS
CHARGE
CONTROL,
TIMER,
AND
DISPLAY
LOGIC
THERMAL
SHUTDOWN
PRECHARGE
DEGLITCH
DEGLITCH
DEGLITCH
RECHARGE
TAPER
CHGENABLE
STAT1
STAT2
TERM
VSS
VCC
CHGENABLE
CHGENABLE
TTE PG
V(RCH)
VSET
V(TAPER)
V(TERM)
V(PRECHG)
PG
bq24010, bq24012bq24013, bq24014, bq24018
www.ti.com
...................................................................................................................................... SLUS530J – SEPTEMBER 2002 – REVISED DECEMBER 2008
Copyright © 2002 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): bq24010, bq24012 bq24013, bq24014, bq24018
TYPICAL CHARACTERISTICS
DropoutVoltage-mV
T -JunctionTemperature-ºC
J
250
-50
150
50
850
150
350
450
550
650
750
0 50 100
I =1000mA
O(OUT)
I =750mA
O(OUT)
I =500mA
O(OUT)
I =250mA
O(OUT)
bq24010, bq24012bq24013, bq24014, bq24018
SLUS530J – SEPTEMBER 2002 – REVISED DECEMBER 2008 ......................................................................................................................................
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DROPOUT VOLTAGE
vsJUNCTION TEMPERATURE
Figure 1.
Figure 2. Typical Charging Profile
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Product Folder Link(s): bq24010, bq24012 bq24013, bq24014, bq24018
FUNCTIONAL DESCRIPTION
DC +
1
2
3
4
10
9
8
5
IN
VCC
OUT
VSS
STAT1
STAT2 7
6
BAT
TS
PG
ISET
bq24010DRC
+
BATTERY
PACK
PACK+
PACK
RT1
RT2
VCC
CHARGE
DONE
POWERGOOD
0.1 Fm
RSET
DC-
0.47 Fm
USBPORT
D+
D-
VBUS
GND
0.47 Fm
1
2
3
4
5
10
9
8
7
6
IN
VCC
STAT1
STAT2
VSS
OUT
BAT
TTE
CE
ISET
0.1 Fm
2.26kW
9.09kW
PACK-
PACK+
BATTERY
PACK
+
SYSTEM
and
USB
CONTROLLER
100mA /500mA
SI1032x
bq24013DRC
bq24018DRC
bq24010, bq24012bq24013, bq24014, bq24018
www.ti.com
...................................................................................................................................... SLUS530J – SEPTEMBER 2002 – REVISED DECEMBER 2008
The bqTINY™ supports a precision Li-Ion, Li-Pol charging system suitable for single-cells. Figure 2 shows atypical charge profile, application circuit and Figure 5 shows an operational flow chart.
Figure 3. Typical Application Circuit
Figure 4. USB Charger Circuit
Copyright © 2002 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): bq24010, bq24012 bq24013, bq24014, bq24018
Yes
No
No
Yes
Indicate Fault
Yes
No
Yes
No
Regulate Current
or Voltage
No
POR
Yes
No
Yes
No
No
Fault Condition
Yes
Ye s
Indicate DONE
Turn off charge
Indicate SLEEP
MODE
SLEEP MODE
Suspend charge
No
No
Yes
No
No
Yes
Ye s
No
Yes
Enter Battery
Absent
Detection
No
Yes
Ye s
VCC > VI(BAT)
checked at
all times
VI(BAT) < V(LOWV) Reset and Start
t(PRECHG) timer
Regulate
IO(PRECHG)
Reset all timers
start t(CHG)
timers
VI(BAT) < V(LOWV)
TJ< t(SHTDWN)
TJ< t(SHTDWN)
t(PRECHG)
expired?
t(CHG)
expired?
VI(BAT) < V(LOWV)
Enable
I(FAULT)
current?
VI(BAT) > V(RCH)
?
VI(BAT) > V(RCH)
?
I(TERM)
detection
?
t(TAPER)
expired?
Disable
I(FAULT)
current?
VI(BAT) < V(RCH)
?
I(TAPER)
detection
?
Indicate
Charge-in-Progress
Indicate
Charge Suspend
Indicate
Charge-in-Progress
bq24010, bq24012bq24013, bq24014, bq24018
SLUS530J – SEPTEMBER 2002 – REVISED DECEMBER 2008 ......................................................................................................................................
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Figure 5. Operational Flow Chart
10 Submit Documentation Feedback Copyright © 2002 – 2008, Texas Instruments Incorporated
Product Folder Link(s): bq24010, bq24012 bq24013, bq24014, bq24018
TEMPERATURE QUALIFICATION
ChargeSuspend
Normal Temperature Range
ChargeSuspend
V(TS2)
V(TS1)
VSS
VCC
( )
( )
( )
TH TC
TC TH
T1
5 x R x R
R =
3 x R - R
(1)
( )
( ) ( )
TH TC
TC TH
T2
5 x R x R
R =
2 x R - 7 x R
(2)
bq24010, bq24012bq24013, bq24014, bq24018
www.ti.com
...................................................................................................................................... SLUS530J – SEPTEMBER 2002 – REVISED DECEMBER 2008
NOTE:
The temperature qualifications apply only to versions with temperature sense input(TS) pin option (bq24020 and bq24014).
Versions of the bqTINY with the TS pin option, continuously monitor battery temperature by measuring thevoltage between the TS and VSS pins. A negative temperature coefficient thermistor (NTC) and an externalvoltage divider typically develops this voltage (see Figure 3 ). The bqTINY compare this voltage against theinternal V
(TS1)
and V
(TS2)
thresholds to determine if charging is allowed (see Figure 6 ). The temperature sensingcircuit is immune to any fluctuation in V
CC
since both the external voltage divider and the internal thresholds areratiometric to V
CC
.
Once a temperature outside the V
(TS1)
and V
(TS2)
thresholds is detected the bqTINY immediately suspend thecharge. The bqTINY suspends charge by turning off the power FET and holding the timer value (i.e. timers areNOT reset). Charge is resumed when the temperature returns to the normal range.
Figure 6. TS Pin Thresholds
The resistor values of R
T1
and R
T2
are calculated by Equation 1 and Equation 2 (for NTC Thermistors).
Where R
TC
is the cold temperature resistance and R
TH
is the hot temperature resistance of thermistor, asspecified by the thermistor manufacturer.
R
T1
or R
T2
can be omitted If only one temperature (hot or cold) setting is required. Applying a constant voltagebetween the V
TS1
and V
TS2
thresholds to pin TS disables the temperature-sensing feature.
Copyright © 2002 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Link(s): bq24010, bq24012 bq24013, bq24014, bq24018
BATTERY PRE-CONDITIONING
( )
PRECHG SET
SET
O(PRECHG)
V x K
( ) ( )
I = R( )
(3)
BATTERY CHARGE CURRENT
( )
SET SET
SET
O(OUT)
K x V
( ) ( )
I = R( )
(4)
BATTERY VOLTAGE REGULATION
CHARGE TAPER DETECTION, TERMINATION AND RECHARGE
( )
TAPER SET
SET
(TAPER)
V x K
( ) ( )
I = R( )
(5)
( )
TERM SET
SET
(TERM)
V x K
( ) ( )
I = R( )
(6)
bq24010, bq24012bq24013, bq24014, bq24018
SLUS530J – SEPTEMBER 2002 – REVISED DECEMBER 2008 ......................................................................................................................................
www.ti.com
During a charge cycle if the battery voltage is below the V
(LOWV)
threshold, the bqTINY applies a prechargecurrent, I
O(PRECHG)
, to the battery. This feature revives deeply discharged cells. The resistor connected betweenthe ISET and V
SS
, R
SET
, determines the precharge rate. The V
(PRECHG)
and K
(SET)
parameters are specified in thespecifications table.
The bqTINY activates a safety timer, t
(PRECHG)
, during the conditioning phase. If V
(LOWV)
threshold is not reachedwithin the timer period, the bqTINY turns off the charger and enunciates FAULT on the STAT1 and STAT2 pins.Refer to Timer Fault Recovery section for additional details.
The bqTINY offers on-chip current regulation with programmable set point. The resistor connected between theISET and V
SS
, R
SET
, determines the charge rate. The V
(SET)
and K
(SET)
parameters are specified in thespecifications table.
Voltage regulation feedback is accomplished through the BAT pin. This input is tied directly and close to thepositive side of the battery pack. The bqTINY monitors the battery-pack voltage between the BAT and VSS pins.When the battery voltage rises to V
O(REG)
threshold, the voltage regulation phase begins and the charging currentbegins to taper down.
As a safety backup, the bqTINY also monitors the charge time in the charge mode. If termination does not occurwithin this time period, t
(CHG)
, the bqTINY turns off the charger and enunciates FAULT on the STAT1 and STAT1pins. Refer to the Timer Fault Recovery section for additional details.
The bqTINY monitors the charging current during the voltage regulation phase. Once the taper threshold, I
(TAPER)
,is detected the bqTINY initiates the taper timer, t
(TAPER)
. Charge is terminated after the timer expires. The resistorconnected between the ISET and V
SS
, R
SET
, determines the taper detection level. The V
(TAPER)
and K
(SET)parameters are specified in the specifications table.
The bqTINY resets the taper timer in the event that the charge current returns above the taper threshold, I
(TAPER)
.
In addition to the taper current detection, the bqTINY terminates charge in the event that the charge current fallsbelow the I
(TERM)
threshold. This feature allows for quick recognition of a battery removal condition or insertion ofa fully charged battery. Note that taper timer is not used for I
(TERM)
detection. The resistor connected between theISET and V
SS
, R
SET
, determines the taper detection level. The V
(TERM)
and K
(SET)
parameters are specified in thespecifications table.
12 Submit Documentation Feedback Copyright © 2002 – 2008, Texas Instruments Incorporated
Product Folder Link(s): bq24010, bq24012 bq24013, bq24014, bq24018
SLEEP MODE
CHARGE STATUS OUTPUTS
PG OUTPUT
CE INPUT (CHARGE ENABLE)
TTE INPUT (TIMER AND TERMINATION ENABLE)
THERMAL SHUTDOWN AND PROTECTION
bq24010, bq24012bq24013, bq24014, bq24018
www.ti.com
...................................................................................................................................... SLUS530J – SEPTEMBER 2002 – REVISED DECEMBER 2008
After charge termination, the bqTINY restarts the charge once the voltage on the BAT pin falls below the V(RCH)threshold. This feature keeps the battery at full capacity at all times. See the Battery Absent Detection section foradditional details.
The bqTINY enters the low-power sleep mode if the V
CC
is removed from the circuit ( PG pin is high impedance).This feature prevents draining the battery during the absence of V
CC
. The status pins do not function when insleep mode or when V
CC
< V
POR
and default to the OFF state.
The open-collector STAT1 and STAT2 outputs indicate various charger operations as shown in the followingtable. These status pins can be used to drive LEDs or communicate to the host processor. Note that OFFindicates the open-collector transistor is turned off. When V
CC
< V
POR
or V
CC
< V
BAT
(Sleep Mode – PG OFF) theSTAT pins default to their OFF state. Note that this STAT1/STAT2 OFF/OFF state is shared by several operatingconditions. Monitoring IN, BAT, PG and TS, it is possible to decode the actual fault condition.
Table 1. Status Pins Summary
CHARGE STATE STAT1 STAT2
Charge-in-progress ON OFFCharge done OFF
(1)
ONBattery absentCharge suspend (temperature)
OFF OFFTimer faultSleep mode
(1) OFF means the open-collector output transistor on the STAT1 orSTAT2 pins is in an off state.
The open-collector PG (power good) indicates when the ac adapter (i.e., V
CC
) is present. The PG bipolartransistor turns ON when a valid V
CC
is detected. This output is turned off in the sleep mode. The PG pin can beused to drive an LED or communicate to the host processor.
The CE digital input is used to disable or enable the charge process. A low-level signal on this pin enables thecharge and a high-level signal disables the charge. A high-to-low transition on this pin also resets all timers andfault conditions and starts a new charge cycle.
The TTE digital input is used to disable or enable the fast-charge timer and charge termination. A low-level signalon this pin enables the fast-charge timer and termination and a high-level signal disables this feature. Ahigh-to-low transition on this pin also resets all timers.
The bqTINY monitors the junction temperature, T
J
, of the die and suspends charging if T
J
exceeds 155 ° C.Charging resumes when T
J
falls below approximately 130 ° C.
Copyright © 2002 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): bq24010, bq24012 bq24013, bq24014, bq24018
BATTERY ABSENT DETECTION
No
Yes
Yes
No
No
Yes
VI(BAT) <
V(RCH)
Enable
I(DETECT) for
t(DETECT)
VI(BAT) <
V(LOWV)
BATTERY
PRESENT
BeginCharge
BATTERY
PRESENT
Begin
Charge
Apply
IO(PRECHG) for
t(DETECT)
VI(BAT) >
V(RCH)
BATTERY
ABSENT
Charge Done
or
TimerFault
bq24010, bq24012bq24013, bq24014, bq24018
SLUS530J – SEPTEMBER 2002 – REVISED DECEMBER 2008 ......................................................................................................................................
www.ti.com
For applications with removable battery packs, bqTINY provides a battery absent detection scheme to reliablydetect insertion and/or removal of battery packs.
The voltage at the BAT pin is held above the battery recharge threshold, V
(RCH)
, by the charged battery followingfast charging. When the voltage at the BAT pin falls to the recharge threshold, either by a load on the battery ordue to battery removal, the bqTINY begins a battery absent detection test. This test involves enabling a detectioncurrent, I
(DETECT)
, for a period of t
(DETECT)
and checking to see if the battery voltage is below the pre-chargethreshold, V
(LOWV)
. Following this, the precharge current, I
O(PRECHG)
is applied for a period of t
(DETECT)
and thebattery voltage checked again to be above the recharge threshold. The purpose is to attempt to close a batterypack with an open protector, if one is connected to the bqTINY. Passing both of the discharge and charging testsindicates a battery absent fault at the STAT pins. Failure of either test starts a new charge cycle. For the absentbattery condition the voltage on the BAT pin rises and falls between the V
(LOWV)
and V
O(REG)
thresholdsindefinitely. See Figure 7 .
Figure 7. Battery Absent Detection
14 Submit Documentation Feedback Copyright © 2002 – 2008, Texas Instruments Incorporated
Product Folder Link(s): bq24010, bq24012 bq24013, bq24014, bq24018
TIMER FAULT RECOVERY
bq24010, bq24012bq24013, bq24014, bq24018
www.ti.com
...................................................................................................................................... SLUS530J – SEPTEMBER 2002 – REVISED DECEMBER 2008
As shown in Figure 5 , bqTINY provides a recovery method to deal with timer fault conditions. The followingconditions summarize this method.
Condition #1: Charge voltage above recharge threshold (V
(RCH)
) and timeout fault occurs
Recovery method: bqTINY waits for the battery voltage to fall below the recharge threshold. This could happenas a result of a load on the battery, self-discharge or battery removal. Once the battery falls below the rechargethreshold, the bqTINY clears the fault and enters the battery absent detection routine. A POR or CE toggle alsoclears the fault.
Condition #2: Charge voltage below recharge threshold (V
(RCH)
) and timeout fault occurs.
Recovery method: Under this scenario, the bqTINY applies the I
(FAULT)
current. This small current is used todetect a battery removal condition and remains on as long as the battery voltage stays below the rechargethreshold. If the battery voltage goes above the recharge threshold, then the bqTINY disables the I
(FAULT)
currentand executes the recovery method described for condition #1. Once the battery falls below the rechargethreshold, the bqTINY clears the fault and enters the battery absent detection routine. A POR or CE toggle alsoclears the fault.
Copyright © 2002 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): bq24010, bq24012 bq24013, bq24014, bq24018
APPLICATION INFORMATION
SELECTING INPUT CAPACITOR
SELECTING OUTPUT CAPACITOR
THERMAL CONSIDERATIONS
J A
JA
T x T
=
P
q
(7)
IN I(BAT) O(OUT)
P = V - V x I
(8)
bq24010, bq24012bq24013, bq24014, bq24018
SLUS530J – SEPTEMBER 2002 – REVISED DECEMBER 2008 ......................................................................................................................................
www.ti.com
In most applications, all that is needed is a high-frequency decoupling capacitor. A 0.47- µF ceramic, placed inclose proximity to V
CC
and V
SS
pins, works well. The bqTINY is designed to work with both regulated andunregulated external dc supplies. If a non-regulated supply is chosen, the supply unit should have enoughcapacitance to hold up the supply voltage to the minimum required input voltage at maximum load. If not, morecapacitance has to be added to the input of the charger.
The bqTINY requires only a small output capacitor for loop stability. A 0.1- µF ceramic capacitor placed betweenthe BAT and ISET pins is typically sufficient for embedded applications (i.e., non-removable battery packs). Forapplication with removable battery packs a 1- µF ceramic capacitor ensure proper operation of the batterydetection circuitry. Note that the output capacitor can also be placed between BAT and VSS pins.
The bqTINY is packaged in a thermally enhanced MLP (also referred to as QFN) package. The package includesa thermal pad to provide an effective thermal contact between the device and the printed circuit board (PCB).Full PCB design guidelines for this package are provided in the application note entitled, QFN/SON PCBAttachment application note (SLUA271 ).
The most common measure of package thermal performance is thermal impedance ( θ
JA
) measured (or modeled)from the device junction to the air surrounding the package surface (ambient). The mathematical expression forθ
JA
is:
Where:
T
J
= device junction temperatureT
A
= ambient temperatureP = device power dissipation
Factors that can greatly influence the measurement and calculation of θ
JA
include:•whether or not the device is board mounted•trace size, composition, thickness, and geometry•orientation of the device (horizontal or vertical)•volume of the ambient air surrounding the device under test and airflown•whether other surfaces are in close proximity to the device being tested
The device power dissipation, P, is a function of the charge rate and the voltage drop across the internalPowerFET. It can be calculated from the following equation:
Due to the charge profile of Li-xx batteries, the maximum power dissipation is typically seen at the beginning ofthe charge cycle when the battery voltage is at its lowest. See Figure 2 .
16 Submit Documentation Feedback Copyright © 2002 – 2008, Texas Instruments Incorporated
Product Folder Link(s): bq24010, bq24012 bq24013, bq24014, bq24018
PCB LAYOUT CONSIDERATIONS
bq24010, bq24012bq24013, bq24014, bq24018
www.ti.com
...................................................................................................................................... SLUS530J – SEPTEMBER 2002 – REVISED DECEMBER 2008
It is important to pay special attention to the PCB layout. The following provides some guidelines:•To obtain optimal performance, the decoupling capacitor from V
CC
to V
SS
and the output filter capacitors fromBAT to ISET should be placed as close as possible to the bqTINY, with short trace runs to both signal andV
SS
pins.•All low-current V
SS
connections should be kept separate from the high-current charge or discharge paths fromthe battery. Use a single-point ground technique incorporating both the small signal ground path and thepower ground path.•The BAT pin is the voltage feedback to the device and should be connected with its trace as close to thebattery pack as possible.•The high current charge paths into IN and from the OUT pins must be sized appropriately for the maximumcharge current in order to avoid voltage drops in these traces.•The bqTINY is packaged in a thermally enhanced MLP package. The package includes a thermal pad toprovide an effective thermal contact between the device and the printed circuit board (PCB). Full PCB designguidelines for this package are provided in the application note entitled: QFN/SON PCB AttachmentApplication Note (SLUA271 ).•There is an internal electrical connection between the exposed thermal pad and V
SS
pin of the device. Theexposed thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Donot use the thermal pad as the primary ground input for the device. V
SS
pin must be connected to ground atall times.
Copyright © 2002 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Link(s): bq24010, bq24012 bq24013, bq24014, bq24018
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
BQ24010DRCR ACTIVE SON DRC 10 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
BQ24010DRCRG4 ACTIVE SON DRC 10 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
BQ24012DRCR ACTIVE SON DRC 10 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
BQ24012DRCRG4 ACTIVE SON DRC 10 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
BQ24013DRCR ACTIVE SON DRC 10 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
BQ24013DRCRG4 ACTIVE SON DRC 10 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
BQ24014DRCR ACTIVE SON DRC 10 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
BQ24014DRCRG4 ACTIVE SON DRC 10 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
BQ24018DRCR ACTIVE SON DRC 10 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
BQ24018DRCRG4 ACTIVE SON DRC 10 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
BQ24018DRCT ACTIVE SON DRC 10 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
BQ24018DRCTG4 ACTIVE SON DRC 10 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 8-Dec-2008
Addendum-Page 1
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 8-Dec-2008
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
BQ24010DRCR SON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24012DRCR SON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24013DRCR SON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24014DRCR SON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24018DRCR SON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24018DRCT SON DRC 10 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
BQ24010DRCR SON DRC 10 3000 367.0 367.0 35.0
BQ24012DRCR SON DRC 10 3000 367.0 367.0 35.0
BQ24013DRCR SON DRC 10 3000 367.0 367.0 35.0
BQ24014DRCR SON DRC 10 3000 367.0 367.0 35.0
BQ24018DRCR SON DRC 10 3000 367.0 367.0 35.0
BQ24018DRCT SON DRC 10 250 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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