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1
FEATURES
DESCRIPTION
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
ACDET
ACPRES
ACSEL
BATDEP
SRSET
ACSET
VREF
ENABLE
BATSET
COMP
ACN
ACP
ACDRV
BATDRV
VCC
PWM
VHSP
ALARM
VS
GND
SRP
SRN
IBAT
BATP
bq24702, bq24703
PW PACKAGE
(TOP VIEW)
8
9
10
11
12
13
14
ACSEL
ACPRES
ACDET
ACDRV
BATDRV
NC
VCC
ACN
ACP
NC
NC
BATP
IBAT
NC
28
27
26
25
24
23
22
1
2
3
4
5
6
7
BATDEP
SRSET
ACSET
VREF
ENABLE
BATSET
COMP
PWM
VHSP
ALARM
VS
GND
SRP
SRN
21
20
19
18
17
16
15
bq24703
RHD PACKAGE
(BOTTOM VIEW)
NC - No internal connection
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007www.ti.com
MULTICHEMISTRY BATTERY CHARGER CONTROLLER ANDSYSTEM POWER SELECTOR
•Dynamic Power Management, DPM MinimizesBattery Charge Time
The bq24702/bq24703 is a highly integrated batterycharge controller and selector tailored for notebook•Integrated Selector Supports Battery
and sub-notebook PC applications.Conditioning and Smart Battery Learn Cycle•Zero Volt Operation
The bq24702/bq24703 uses dynamic powermanagement (DPM) to minimize battery charge time•Selector Feedback Circuit Ensures
by maximizing use of available wall-adapter power.Break-Before-Make Transition
This is achieved by dynamically adjusting the battery•± 0.4% Charge Voltage Accuracy, Suitable for
charge current based on the total system (adapter)Charging Li-Ion Cells
current.•± 4% Charge Current Accuracy
The bq24702/bq24703 uses a fixed frequency, pulse•300-kHz Integrated PWM Controller for
width modulator (PWM) to accurately control batteryHigh-Efficiency Buck Regulation
charge current and voltage. Charge current limits canbe programmed from a keyboard controller DAC or•Depleted Battery Detection and Indication to
by external resistor dividers from the precision 5-V,Protect Battery From Over Discharge
± 0.6%, externally bypassed voltage reference•20- μA Sleep Mode Current for Low Battery
(VREF), supplied by the bq24702/bq24703.Drain
•24-Pin TSSOP Package and 5 mm ×5 mm QFNpackage (bq24703 only)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003 – 2007, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
www.ti.com
DESCRIPTION (CONTINUED)
DISSIPATION RATINGS
0
0.20
0.40
0.60
0.80
1
1.20
1.40
1.60
25 50 70 85
MAX Pd (W) @ 500 LFM
MAX Pd (W) @ 250 LFM
MAX Pd (W) @ 150 LFM
MAX Pd (W) @ 0 LFM
θJA = 89.37 C/W @ 0 LFM,
θJA = 77.98 C/W @ 150 LFM,
θJA = 73.93 C/W @ 250 LFM,
θJA = 68.23 C/W @ 500 LFM
Maximum Power Dissipation (High K Board) - W
MAXIMUM POWER DISSIPATION
(HIGH K BOARD)
vs
FREE-AIR TEMPERATURE
TA - Free-Air Temperature - °C
0
0.20
0.40
0.60
0.80
1
1.20
1.40
25 50 70 85
MAX Pd (W) @ 500 LFM
MAX Pd (W) @ 250 LFM
MAX Pd (W) @ 150 LFM
MAX Pd (W) @ 0 LFM
θJA = 150.17 C/W @ 0 LFM,
θJA = 110.95 C/W @ 150 LFM,
θJA = 99.81 C/W @ 250 LFM,
θJA = 86.03 C/W @ 500 LFM
Maximum Power Dissipation (Low K Board) - W
MAXIMUM POWER DISSIPATION
(LOW K BOARD)
vs
FREE-AIR TEMPERATURE
TA - Free-Air Temperature - °C
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.
The battery voltage limit can be programmed by using the internal 1.196-V, ± 0.5% precision reference, making itsuitable for the critical charging demands of lithium-ion cells. Also, the bq24702/bq24703 provides an option tooverride the precision reference and drive the error amplifier either directly from an external reference or from aresistor divider off the 5 V supplied by the integrated circuit.
The selector function allows the manual selection of the system power source, battery or wall-adapter power.The bq24702/bq24703 supports battery-conditioning and battery-learn cycles through the ACSEL function. TheACSEL function allows manual selection of the battery or wall power as the main system power. It also providesautonomous switching to the remaining source (battery or ac power) should the selected system power sourceterminate (refer to Available Options table for the differences between the bq24702 and the bq24703). Thebq24702/bq24703 also provides an alarm function to indicate a depleted battery condition.
The bq24702/bq24703 PWM controller is ideally suited for operation in a buck converter for applications whenthe wall-adapter voltage is greater than the battery voltage.
A. The JEDEC low K (1s) board design used to derive this data was a 3-inch ×3-inch, two layer board with 2 ouncecopper traces on top of the board.B. The JEDEC high K (1s) board design used to derive this data was a 3-inch ×3-inch, multilayer board with 1 ounceinternal power and ground planes and 2 ounce copper traces on top and bottom of the board.
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Product Folder Link(s): bq24702 bq24703
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ABSOLUTE MAXIMUM RATINGS
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
AVAILABLE OPTIONS
SELECTOR OPERATIONCONDITION
20 °C≤T
J
≤125 °C
bq24702PW bq24703RHD
BATTERY AS POWER SOURCE
Battery removal Automatically selects ac + alarm Automatically selects ac + alarmBattery reinserted Selection based on selector inputs Adapter latched until adapter is removed or ac select toggles.
AC AS POWER SOURCE
AC removal Automatically selects battery Automatically selects batteryAC reinserted Selection based on selector inputs Selection based on selector inputs
DEPLETED BATTERY CONDITION
Battery as power source Sends ALARM signal Automatically selects ac Sends ALARM signalAC as power source Sends ALARM signal Sends ALARM signal
ALARM SIGNAL ACTIVE
Depleted battery condition Depleted battery conditionWhen selector input is not equal to selectoroutput (single pulse alarm)
over operating free-air temperature range (unless otherwise noted)
(1) (2)
VALUE UNIT
V
CC
Supply voltage range – 0.3 to 30 VBattery voltage range: SRP, SRN – 0.3 to 30 VInput voltage: ACN, ACP – 0.3 to 30 VT
J
Virtual junction temperature range – 40 to 125 °CMaximum source/sink current VHSP 50 mAMaximum ramp rate for V
CC
10 V/ μsMaximum sink current ACPRES, COMP, ALARM 2.5 mAMaximum ramp rate for V
(BAT)
10 V/ μsMaximum source/sink current BATDRV 10 mAMaximum source/sink current ACDRV 10 mAMaximum source/sink current PWM 50 mAMaximum source/sink current pulsed ACDRV, (10- μs rise time, 10- μs fall time, 1-ms
50 mApulse width, single pulse)Maximum source current VREF 30 mAMaximum source current SRP 100 mAMaximum difference voltage SRP – SRN 30 VT
stg
Storage temperature range – 65 to 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under recommended operatingconditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) All voltages are with respect to ground. Currents are positive into and negative out of the specified terminals. Consult the Packagingsection of the data book for thermal limitations and considerations of the package.
Copyright © 2003 – 2007, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): bq24702 bq24703
www.ti.com
RECOMMENDED OPERATING CONDITIONS
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
(T
A
= T
OPR
) all voltages relative to V
SS
MIN MAX UNIT
Analog and PWM operation 7 28Supply voltage, (VCC) VSelector operation 4.5 28Negative ac current sense, (ACN) 7 28 VPositive ac current sense, (ACP) 7 28 VNegative battery current sense, (SRN) 5 28 VPositive battery current sense, (SRP) 5 28 VAC or adapter power detection (ACDET) 0 5 VAC power indicator (ACPRES) 0 5 VAC adapter power select (ACSEL) 0 5 VDepleted battery level (BATDEP) 0 5 VBattery charge current programming voltage (SRSET) 0 2.5 VCharge enable (ENABLE) 0 5 VExternal override to an internal 0.5% precision reference (BATSET) 0 2.5 VInverting input to the PWM comparator (COMP) 0 5 VBattery charge regulation voltage measurement input to the battery — voltage g
m
amplifier (BATP) 0 5 VBattery current differential amplifier output (IBAT) 0 5 VSystem load voltage input pin (VS) 0 2.5 VDepleted battery alarm output (ALARM) 0 5 VGate drive output ( PWM) VHSP VCC VBattery power source select output ( BATDRV) 0 28 VAC or adapter power source selection output ( ACDRV) VHSP VCC VACSET 0 2.5 VOperating free-air temperature, T
A
-40 85 °C
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Product Folder Link(s): bq24702 bq24703
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ELECTRICAL CHARACTERISTICS
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
– 40 °C≤T
J
≤125 °C, 7 V
DC
≤V
CC
≤28 V
DC
, all voltages relative to V
SS
(unless otherwise specified)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
QUIESCENT CURRENT
I
DD(OP)
Total chip operating current ACPRES = High, EN = 0 1 1.6 6 mAI
DD(SLEEP)
Total battery sleep current, ac not present ACPRES = Low 22 28 μA
LOGIC INTERFACE DC CHARACTERISTICS
V
OL
Low-level output voltage (ACPRES, ALARM) I
OL
= 1 mA 0.4 VV
IL
Low-level input voltage (ACSEL, ENABLE) 0.6 VV
IH
High-level input voltage (ACSEL, ENABLE) 1.8 VI
(SINK1)
Sink current (ACPRES) V
OL
= 0.4 1.5 2 2.5 mAI
(SINK2)
Sink current (ALARM) V
OL
= 0.4 1.5 2 2.5 mA
PWM OSCILLATOR
0°C≤T
J
≤85 °C 280 300 340f
OSC(PWM)
Oscillator frequency kHz– 40 °C≤T
J
≤125 °C 240 300 350Maximum duty cycle 100%Input voltage for maximum dc (COMP) 3.8 VMinimum duty cycle 0%Input voltage for minimum dc (COMP) 0.8 VV
(RAMP)
Oscillator ramp voltage (peak-to-peak) 1.85 2.15 2.30Internal input clamp voltageV
IK(COMP)
3.8 4.5(tracks COMP voltage for maximum dc)I
S(COMP)
Internal source current (COMP) Error amplifier = OFF, V
(COMP)
= 1 V 70 110 140 μA
LEAKAGE CURRENT
I
L( ACDET)
Leakage current, ACDET V
(ACDET)
= 5 V 0.2 μAI
L(SRSET)
Leakage current, SRSET V
(SRSET)
= 2.5 V 0.2 μAI
L(ACSET)
Leakage current, ACSET V
(ACSET)
= 2.5 V 0.2 μAI
L(BATDEP)
Leakage current, BATDEP V
(BATDEP)
= 5 V 0.2 μAI
L(VS)
Leakage current, VS V
(VS)
= 5 V 0.2 μAI
L(ALARM)
Leakage current, ALARM V
(ALARM)
= 5 V 0.2 μAI
L(ACSEL)
Leakage current, ACSEL V
(ACSEL)
= 5 V 0.2 μAI
L(ENABLE)
Leakage current, ENABLE V
(ENABLE)
= 5 V 0.2 μAI
L(ACPRES)
Leakage current, ACPRES V
(ACPRES)
= 5 V 0.2 μAI
L(BATP)
Leakage current, BATP V
(BATP)
= 5 V 0.2 μAI
L(BATSET)
Leakage current, BATSET V
(BATSET)
= 2.5 V 0.2 μA
Copyright © 2003 – 2007, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): bq24702 bq24703
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ELECTRICAL CHARACTERISTICS (Continued)
(3)
IBAT +SRSET
RSENSE 1
AV
measured gain, A
V
.
Dc+SRSET
AV, Total accuracy in % +(Dm*Dc)
Dc 100,I(SRP) *I(SRN) +0
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
– 40 °C≤T
J
≤125 °C, 7 V
DC
≤V
CC
≤28 V
DC
, all voltages relative to V
SS
(unless otherwise specified)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
BATTERY CURRENT-SENSE AMPLIFIER
g
m
Transconductance gain 75 120 175 mA/VCMRR Common-mode rejection ratio See
(1)
90 dBCommon-mode input (SRP, SRN) voltageV
ICR
VCC = SRN, SRP + 2 V 5 30 VrangeI
(SINK)
Sink current (COMP) COMP = 1 V, (SRP – SRN) = 10 mV 0.5 1.5 2.5 mAV
(SRP)
= 16 V, (SRP – SRN) = 100 mV,Input bias current (SRP)
(2)
70 85 110SRSET = 2.5 V, VCC = 28I
IB
μA(SRP - SRN) = 100 mV, SRSET= 2.5 V,Input bias current accuracy (I
SRP
– I
SRN
) – 3 0 3VCC = 28 V, 0 ≤T
J
≤125 °CV
(SET)
Battery current programming voltage (SRSET) 0 2.5 V0.65 V ≤SRSET ≤2.5 V,A
V
Battery current set gain 24 25 26 V/V8 V ≤SRN ≤16 V
(3)
SRSET = 1.25 V, T
J
= 25 °C
(4)
– 5% 5%Total battery current-sense mid-scale accuracy
SRSET = 1.25 V
(4)
– 6% 6%SRSET = 2.5 V, T
J
= 25 °C
(4)
– 3% 3%Total battery current-sense full-scale accuracy
SRSET = 2.5 V
(4)
– 4% 4%
(1) Specified by design. Not production tested.(2) I
(SRP)
= I
(SRN)
= (V
(SRSET)
/ 50 k Ω) + ((V
(SRP)
- V
(SRN)
/ 3 k Ω)example: If (V
(SRSET)
= 2.5 V) , (V
(SRP)
- V
(SRN)
= 100 mV) Then I
(SRP)
= I
(SRN)
= 83 A
(4) Total battery-current set is based on the measured value of (SRP – SRN) = Δm, and the calculated value of (SRP – SRN) = ΔC, using the
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ELECTRICAL CHARACTERISTICS (Continued)
(1) Calculation of the ac current:
IAC +ACSET
RSENSE 1
AV
Dc+ACSET
AV, Total accuracy in % +(Dm*Dc)
Dc 100,I(ACP) *I(ACN) +0
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
– 40 °C≤T
J
≤125 °C, 7 V
DC
≤V
CC
≤28 V
DC
, all voltages relative to V
SS
, (unless otherwise specified)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ADAPTER CURRENT-SENSE AMPLIFIER
g
m
Transconductance gain 75 130 175 mA/VCMRR Common-mode rejection ratio See
(1)
90 dBV
ICR
Common-mode input voltage range (ACP) 7 V
CC
VI
(SINK)
Sink current (COMP) COMP = 1 V, (ACP – ACN) = 10 mV 0.5 1.5 2.5 mAACP = ACN = 28 V, VCC = 28 V, ACSET = 2.5Input bias current (ACP, ACN) 40 50 65VI
IB
AInput bias current accuracy ratio ACP = ACN = 28 V, VCC = 28 V,
– 3 0 3(I
(ACP)
, I
(ACN)
) ACSET = 2.5 V, 0 ≤T
J
≤125 °CV
(SET)
AC current programming voltage (ACSET) 0 2.5 VA
V
AC current set gain 0.65 V ≤ACSET ≤2.5 V, 12 V ≤ACP ≤20 V
(1)
24.5 25.3 26.5 V/VACSET = 1.25 V, T
J
= 25 °C
(2)
– 5% 5%Total ac current-sense mid-scale accuracy
ACSET = 1.25 V
(2)
– 6% 6%Total ac current-sense full-scale accuracy ACSET = 2.5 V, T
J
= 25 °C
(2)
– 3.5% 3.5%ACSET = 2.5 V
(2)
– 4% 4%
BATTERY VOLTAGE ERROR AMPLIFIER
g
m
Transconductance gain 75 135 175 mA/VCMRR Common-mode rejection ratio See
(1)
90 dBBATSET common-mode input voltageV
ICR
1 2.5 Vrange
Internal reference override input thresholdV
IT
0.20 0.25 0.35 Vvoltage
COMP = 1 V, (BATP – BATSET) = 10 mV,I
(SINK)
Sink current COMP 0.5 1.5 2.5 mABATSET = 1.25 VT
J
= 25 °C 1.190 1.196 1.202V
(FB)
Error-amplifier precision reference voltage T
J
= 0 °C to 85 °C 1.183 1.196 1.203 VT
J
= – 40 °C to 125 °C 1.178 1.196 1.204
(2) Total ac-current set accuracy is based on the measured value of (ACP-ACN) = Δc, using the measured gain, A
V.
Copyright © 2003 – 2007, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): bq24702 bq24703
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ELECTRICAL CHARACTERISTICS (Continued)
(1) Battery readback transfer gain
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
– 40 °C≤T
J
≤125 °C, 7 V
DC
≤V
CC
≤28 V
DC
, all voltages relative to V
SS
(unless otherwise specified)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
BATTERY CURRENT OUTPUT AMPLIFIER
G
(TR)
Transfer gain (SRP – SRN) = 5 mV
(1)
20 V/VBattery current readback output (SRP – SRN) = 5 mV, SRP = 12 V,V
I(BAT)
100 mVvoltage (IBAT) V
CC
= 18 V, T
J
= 25 °CLine rejection voltage T
J
= 25 °C 10 mV/VCM Common-mode input range (SRP) 5 28 VV
O(IBA
Battery current output voltage
0 2.5 VT)
range (IBAT)I
S(O)
Output source current (IBAT) (SRP – SRN) = 100 mV 5 7.1 9.4 mA(SRP – SRN) = 50 mV, T
J
= 25 °C
(1)
– 3% 2.4%(SRP – SRN) = 50 mV,
– 20% 20%0°C≤T
J
≤85 °CTotal battery current readback
(SRP – SRN) = 100 mV,full-scale accuracy
– 1.5% 1.2%T
J
= 25 °C
(1)
(SRP – SRN) = 100 mV,
– 6% 8.5%0°C < T
J
< 85 °C
5-V VOLTAGE REFERENCE
V
ref
Output voltage (VREF) T
J
= 25 °C 4.985 5 5.013 VT
J
= 0 °C to 85 °C 4.946 5 5.013T
J
= 40 °C to 85 °C 4.946 5 5.03 VT
J
= – 40 °C to 125 °C 4.926 5 5.03 VLine regulation I
LOAD
= 5 mA 0.1 0.37 mV/VLoad regulation 1 mA ≤I
LOAD
≤5 mA 1.1 4 mV/mAShort circuit current 8 20 30 mA5V REF output capacitor Capacitance 2.2 10 μFOutput capacitor equivalent
ESR 5 1000 m Ωresistor
HALF SUPPLY REGULATOR
I
(SINK)
= 20 mA, V
CC
= 18 V V
CC
– 11 V
CC
– 10.2 V
CC
– 8.5V
(HSP)
Voltage regulation VI
(SINK)
= 1 mA, V
CC
= 7 V 1.5
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ELECTRICAL CHARACTERISTICS (Continued)
VIBATc +(SRP*SRN) GTR Total Accuracy in % +VIBATm*VIBATc
VIBATm 100
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
– 40 °C≤T
J
≤125 °C, 7 V
DC
≤V
CC
≤28 V
DC
, all voltages relative to V
SS
(unless otherwise specified)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
MOSFET GATE DRIVE
AC driver R
DS(on)
high V
CC
= 18 V, I
( ACDRV)
= 1 mA 85 150 Ω
AC driver R
DS(on)
low V
CC
= 18 V, I
( ACDRV)
= 1 mA 55 110 Ω
Battery driver R
DS(on)
high V
CC
= 18 V, I
( BATDRV)
= 1 mA 315 600 Ω
Battery driver R
DS(on)
low V
CC
= 18 V, I
( BATDRV)
= 1 mA 70 115 Ω
Time delay from ac driver off tot
da
ACSEL 2.4 V ^ 0.2 V 1.2 2 μsbattery driver onTime delay from battery driver off tot
db
ACSEL 0.2 V $ 2.4 V 2.4 3.3 μsac driver on
I
O
= – 10 mA, VCC = 18 V V
CC
– 0.18 V
CC
– 0.09PWM driver high-level outputV
OH
Vvoltage
I
O
= – 50 mA, VCC = 18 V V
CC
– 1.2 V
CC
– 0.8PWM driver R
DS(on)
high 7 14 Ω
I
O
= 10 mA, VCC = 18 V V
HSP
+0.1 V
HSP
+0.4V
OL
PWM driver low-level output voltage VI
O
= 50 mA, VCC = 18 V V
HSP
+0.6 V
HSP
+1.2PWM driver R
DS(on)
low 5 8.5 Ω
SELECTOR
1.194 1.246 1.286V
(ACPRES)
AC presence detect voltage V– 40 °C to 85 °C 1.208 1.246 1.285V
IT(ACPRES)
AC presence hysteresis 1%t
d(ACPRES)
Deglitch delay for adapter insertion 100 μsSee
(1)
1.194 1.246 1.286Battery depletion ALARM tripV
(BATDEP)
Vvoltage
– 40 °C to 85 °C 1.208 1.246 1.285V
(NOBAT)
No battery detect, switch to ACDRV bq24702 only
(1)
0.869 1 1.144 V– 40 °C to 85 °C 0.880 1 1.118Battery select time (ACSEL low to VS < BATP, 50% threshold, ACSELt
(BATSEL)
1 2.5 3.5 μsBATDRV low) 2.4 V ↓0.2 VAC select time (ACSEL high tot
(ACSEL)
ACSEL 0.2 V ↑2.4 V 1 2.5 5 μsACDRV low)V
(VS)
VS voltage to enable BATDRV BATP = 1 V 0.98 1 1.02 VV
IT(VS)
VS voltage hysteresis VS > BATP 20 35 85 mV
ZERO VOLT OPERATION
(2)
Static drain source on-stater
DS(on)
V
CC
= 7 V, T
J
= 125 °C, I
O
= 100 mA 5.3 8.7 Ωresistance
BATDEP increasing 0.743 0.794 0.840Zero volt operation threshold VBATDEP decreasing 0.570 0.62 0.656
(1) Total battery current readback accuracy is based on the measured value of V
IBAT
, V
IBATm
, and the calculated value of V
IBAT
, V
IBATc
,using the measured value of the transfer gain, GTR.
(2) See Table 1 to determine the logic operation of the bq24702 and the bq24703.
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R6 R11
Open
R12
Note1
R14
0.025
R13 R15
C3 C12
35V
U2
SI4435DY
R18 D2
BAS16
ACDRV24
ACN11
12 ACP
1ACDET
22VCC
20
VHSP
D3 13 V
21
SRP
C6
16V
C7
35 V
PWM
L1
U3
SI4435DY R20
SRN
D5
Note 1 D6
Note 1
R22
R23
Note1
R24
R25
Note1
16
15
BATDEP
BATP
4
13
R16 C5
C4
150pF
10COMP
D1
MBRD640CTT4
D4
MBRD640CTT4
C11
35 V
R21
Note1
R19
Note1 C8
U4
SI4435DY
D9 BAS16
R26 100K
BATDRV 23
SYSTEM
R27
R28
Note1
Battery Plus
VS 18
AC Adapter
VREF7
ENABLE
ACSEL3
8
19 ALARM
ACPRES
2
C1
ENABLE
ACSEL
ALARM
ACPRES
5
6
SRSET
ACSET
R2
R10
Note1
R8
Note1
C10
180pF
14 IBAT
C13
1 nF
IBAT R29
17 GND
9BATSET BATSET
100 kΩ
100 Ω
1µF
100 Ω
10Ω
33µH
4.7µF
1µF
0.025 Ω
22µF
100 Ω4.7µF
604 kΩ
Connect to GND
to Disable
100 kΩ
30 kΩ
4.7µF
Note 1: R8 Sets AC Adapter Current Limit
R10 Sets Charge Current
R12 Sets AC ADAPTER Current Limit
R23 Sets the Battery Depleted Threshold
R25 Sets the Charge Regulation Voltage
R28 Sets System Break Before Make
R19 = R21, Sets Zero Volt Charge Current
bq24703
bq24702
Note1
604 kΩ
604 kΩ
Note1
Note1
C11 Optional, See Application Notes
C12 For Value, See Application Notes
C8 Value Depends on R21 and R19, See Application Notes
D5, D6 Refer to the Application Section
PROCESSOR’S
POWER SUPPLY
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
APPLICATION DIAGRAM
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UDG-00137
20
VHSP
VHSP
REGULATOR
22
VCC
7
VREF
VOLTAGE
REFERENCE
VREF
ACPRES
2ACPRES
+
1ACDET
ACPRES
HYST
LEVEL
SHIFT
S Q
QR PWM
LOGIC
OSC 21
HIGH-SIDE
DRIVE
300 kHz
+
3ACSEL
8ENABLE
VCC
VHSP
10COMP
5 V
100 µA
+
+
5 V
SRN
+
2 kΩ
12ACP
11ACN
+
6ACSET
25
kΩ
VCC
ac
CURRENT
ERROR
AMPLIFIER
BATTERY
CURRENT
ERROR
AMPLIFIER
BATTERY
VOLTAGE
ERROR
AMPLIFIER
+
13
PWM
BATP
9 BATSET
16 SRP
2 kΩ
15 SRN
5 SRSET
25
kΩ
0.25 V
BATTERY
SELECT
DRIVE
ADAPTER
SELECT
DRIVE
+
24
VCC
VHSP
VCC
23 BATDRV
BATTERY SELECT
LOGIC
AND
ANTI-CROSS
CONDUCT
+
NO BATTERY
COMPARATOR
17 GND
+
A=20
VCC
14 IBAT
SRP
SRN
ACSEL
ACPRES
+
SWITCH TO
BATTERY
4BATDEP
+
DEPLETED
BATTERY
COMPARATOR
BATP
18VS
2
2
1
1
ACDRV
ACDRV
ACSEL
bq24702 ONLY
bq24703 ONLY
19ALARM
2 V
+
BATDA
VTBD Zero Volt
Charging
VACPRES
VFB
0.8 x VNOBAT
VBATDEP
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
BLOCK DIAGRAM
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PIN ASSIGNMENTS
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
Table 1. TERMINAL FUNCTIONS
TERMINAL
I/O DESCRIPTIONbq24702 bq24703NAME
(PW) (QFN)
ACDET 1 26 I AC or adapter power detectionACDRV 24 25 O AC or adapter power source selection outputACN 11 8 I Negative differential inputACP 12 9 I Positive differential inputACPRES 2 27 O AC power indicatorACSEL 3 28 I AC adapter power selectACSET 6 3 I Adapter current programming voltageALARM 19 19 O Alarm outputBATDEP 4 1 I Depleted battery levelBATDRV 23 24 O Battery power source select outputBATP 13 12 I Battery charge regulation voltage measurement input to the battery-voltage g
m
amplifierBATSET 9 6 I External override to an internal precision referenceCOMP 10 7 O Inverting input to the PWM comparatorENABLE 8 5 I Charge enableGND 17 17 O Supply return and ground referenceIBAT 14 13 O Battery current differential amplifier outputPWM 21 21 O Gate drive outputSRN 15 15 I Negative differential battery current sense amplifier inputSRP 16 16 I/O Positive differential battery current sense amplifier inputSRSET 5 2 I Battery charge current programming voltageVCC 22 22 I Operational supply voltageVHSP 20 20 O Voltage source to drive gates of the external MOSFETsVREF 7 4 O Precision 5-V referenceVS 18 18 I System (load) voltage input pin
ACDET: AC or adapter power detection. This input pin is used to determine the presence of the ac adapter.When the voltage level on the ACDET pin is less than V
ACPRES
, the bq24702/bq24703 is in sleep mode, thePWM control is disabled, the BATDRV is driven low, and the ACDRV is driven high. This feature can be used toautomatically select battery as the system power source.
ACDRV: AC or adapter power source select output. This pin drives an external P-channel MOSFET used toswitch to the ac wall-adapter as the system power source. When the ACSEL pin is high while the voltage on theACDET pin is greater than V
ACPRES
, the output ACDRV pin is driven low (V
HSP
). This pin is driven high (V
CC
)when the ACDET is less than V
ACPRES
.
ACN, ACP: Negative and positive differential inputs, respectively for ac-to-dc adapter current sense resistor.
ACPRES: This open-drain output pin is used to indicate the presence of ac power. A logic high indicates there isa valid ac input. A low indicates the loss of ac power. ACPRES is high when the voltage level on the ACDET pinis greater than V
ACPRES
.
ACSEL: AC adapter power select. This input selects either the ac adapter or the battery as the power source. Alogic high selects ac power, while a logic low selects the battery.
ACSET: Adapter current programming voltage. This input sets the system current level at which dynamic powermanagement occurs. Adapter currents above this programmed level activate the dynamic power managementand proportionally reduce the available power to the battery.
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bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
ALARM: Depleted battery alarm output. This open-drain pin indicates that a depleted battery condition exists. Apullup on ALARM goes high when the voltage on the BATDEP pin is below V
ACPRES
. On the bq24702, theALARM output also activates when the selector inputs do not match the selector state.
BATDEP: Depleted battery level. A voltage divider network from the battery to BATDEP pin is used to set thebattery voltage level at which depletion is indicated by the ALARM pin. See ALARM pin for more details. Abattery depletion is detected when BATDEP is less than V
ACPRES
. A no-battery condition is detected when thebattery voltage is < 80% of the depleted threshold. In a no-battery condition, the bq24702 automatically selectsac as the input source. If ENABLE = 1, the PWM remains enabled.
BATDRV: Battery power source select output. This pin drives an external P-channel MOSFET used to switch thebattery as the system's power source. When the voltage level on the ACDET pin is less than V
ACPRES
, the outputof the BATDRV pin is driven low, GND. This pin is driven high (V
CC
) when ACSEL is high and ACDET > V
ACPRES
.
BATP: Battery charge regulation voltage measurement input to the battery-voltage g
m
amplifier. The voltage onthis pin is typically derived from a voltage divider network connected across the battery. In a voltage loop, BATPis regulated to the V
FB
precision reference of the battery voltage g
m
amplifier.
BATSET: An external override to an internal precision reference. When BATSET is > 0.25 V, the voltage level onthe BATSET pin sets the voltage charge level. When BATSET ≤0.25 V, an internal V
FB
reference is connectedto the inverting input of the battery error amplifier. To ensure proper battery voltage regulation with BATSET,BATSET must be > 1.0 V. Simply ground BATSET to use the internal reference.
COMP: The inverting input to the PWM comparator and output of the g
m
amplifiers. A type II compensationnetwork between COMP and GND is recommended.
ENABLE: Charge enable. A high on this input pin allows PWM control operation to enable charging while a lowon this pin disables and forces the PWM output to a high state. Battery charging is initiated by asserting a logic 1on the ENABLE pin.
GND: Supply return and ground reference
IBAT: Battery current differential amplifier output. The output of this pin produces a voltage proportional to thebattery charge current. This voltage is suitable for driving an ADC input.
PWM: Gate drive output pin drives the P-channel MOSFET for PWM control. The PWM control is active whenACPRES, ACSEL, and ENABLE are high. PWM is driven low to V
HSP
and high to V
CC
.
SRN, SRP: Differential amplifier inputs for battery current sense. These pins feed back the battery charge currentfor PWM control. SRN is tied to the battery terminal. SRP is the source pin for zero volt operation.
SRSET: Battery charge current programmed voltage. The level on this pin sets the battery charge current limit.
VCC: Operational supply voltage.
VHSP: The VHSP pin is connected to a 1- μF capacitor (close to the pin) to provide a stable voltage source todrive the gates of the external MOSFETs. VHSP = VCC – 10 V for VCC > 10.5 V and VHSP = VCC – 0.5 V forVCC <10.5 V. A 13-V Zener diode should be placed between VCC and VHSP to prevent MOSFET overstressduring start-up.
VREF: Bypassed precision voltage 5-V output. It can be used to set fixed levels on the inverting inputs of anyone of the three error amplifiers if desired. The tight tolerance is suitable for charging lithium-ion batteries.
VS: System (Load) voltage input pin. The voltage on this pin indicates the system voltage in order to insure abreak before make transition when changing from ac power to battery power. The battery is protected from anover-voltage condition by disabling the P-channel MOSFET connected to the BATDRV pin if the voltage at VS isgreater than BATP. This function can be eliminated by grounding the VS pin.
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APPLICATION INFORMATION
PROGRAMMING THE THRESHOLDS
DYNAMIC POWER MANAGEMENT
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
The input-referenced thresholds for battery depleted, ac detection and charge voltage are defined bydimensioning the external dividers connected to pins BATDEP, ACDET and BATP. This calculation is simple,and consists of assuming that when the input voltage equals the desired threshold value the voltage at therelated pin is equal to the pin internal reference voltage:Vinput = Vpin ×(1 + Kres)
where:
Vinput = Target threshold, referenced to input signalVpin = Internal reference(1.196 V for BATP; 1.246 V for BATDEP, ACDET)Kres = External resistive divider gain ( for instance: R24/R25 for BATP)
When using external dividers with high absolute value the input bias currents for those pins must be included inthe threshold calculation. On the bq24702/3 the input bias currents increase the actual value for the thresholdvoltage, when compared to the values calculated using the internal references and divider gain only:Vinput = Vpin ×(1+Kres) + Vbias
The increase on the threshold voltage is given by:Vbias = Rdiv ×Ipin
where:
Vbias = Voltage increase due to pin bias currentRdiv = External resistor value for resistor connected from pin to input voltageIpin = Maximum pin leakage current
The effect of IB can be reduced if the resistor values are decreased.
The dynamic power management (DPM) feature allows a cost effective choice of an ac wall-adapter thataccommodates 90% of the system's operating-current requirements. It minimizes battery charge time byallocating available power to charge the battery (i.e. I
BAT
= I
ADPT
– I
SYS
). If the system plus battery charge currentexceeds the adapter current limit, as shown in Figure 1 , the DPM feature reduces the battery charge current tomaintain an overall input current consumption within user defined power capability of the wall-adapter. As thesystem's current requirements decrease, additional current can be directed to the battery, thereby increasingbattery charge current and minimizing battery charge time.
The DPM feature is inherently designed into the PWM controller by inclusion of the three control loops,battery-charge regulation voltage, battery-charge current, and adapter-charge current, refer to Figure 2 . If any ofthe three user programmed limits are reached, the corresponding control loop commands the PWM controller toreduce duty cycle, thereby reducing the battery charge current.
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UDG-00113
NO
CHARGE MAXIMUM
CHARGE CURRENT DYNAMIC POWER
MANAGEMENT MAXIMUM
CHARGE CURRENT
ADAPTER CURRENT
SYSTEM CURRENT
BATTERY CHARGE CURRENT
ADAPTER CURRENT LIMIT
ACDET OPERATION
BATTERY CHARGER OPERATION
PRECHARGE OPERATION
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
Figure 1. Dynamic Power Management
The ACDET function senses the loss of adequate adapter power. If the voltage on ACDET drops below theinternal V
ACPRES
reference voltage, a loss of ADAPTER power is declared and the bq24702/bq24703 switches tobattery power as the main system power. In addition, the bq24702/bq24703 shuts down its 5-V VREF and entersa low power sleep mode.
The bq24702/bq24703 fixed-frequency, PWM controller is designed to provide closed-loop control of batterycharge-current (I
CH
) based on three parameters, battery-float voltage (V
BAT
), battery-charge current, and adaptercharge current (I
ADPT
). The bq24702/bq24703 is designed primarily for control of a buck converter using a highside P-channel MOSFET device (SW, refer to Figure 2 ).
The three control parameters are voltage programmable through resistor dividers from the bq24702/bq24703precision 5-V reference, an external or internal precision reference, or directly via a DAC interface from akeyboard controller.
Adapter and battery-charge current information is sensed and fed back to two transconductance ( g
m
) amplifiersvia low-value-sense resistors in series with the adapter and battery respectively. Battery voltage information issensed through an external resistor divider and fed back from the battery to a third g
m
amplifier.
The precharge operation must be performed using the PWM regulator. The host can set the precharge currentexternally by monitoring the ALARM pin to detect a battery depleted condition and programming SRSET voltageto obtain the desired precharge current level.
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ZERO VOLT OPERATING
PWM OPERATION
UDG-00114
10
21
100µA
ENABLE
5 V
OSC CLK
RAMP
S Q
QR
ENABLELATCH OUT
FROM ENABLE LOGIC
PWM COMPARATOR
LEVEL
SHIFT PWM
DRIVE
VHSP
VCC
+
1.25 V
BATTERY
VOLTAGE
BATTERY CHARGE
CURRENT
ADP CURRENT
ZCOMP
COMP
+
VADPT
+ISW SW
VBAT
gm
AMPLIFIERS
PWM
BATP
13
Q1
D1
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
The zero volt operation is intended to provide a low current path to close open packs and protect the system inthe event of a pack cell short-circuit condition or if a short is applied to the pack terminal. It is not designed toprecharge depleted packs, as it is disabled at voltages that are not within normal pack operating range forprecharge.
If the voltage at BATDEP pin is below the zero volt operation threshold , charge is enabled (EN=HI), and ac isselected (ACSEL=HI) the bq24702/3 enters the zero volt operation mode. When the zero volt operation mode ison, the internal PWM is disabled, and an internal power MOSFET connects SRP to V
CC
. The battery chargecurrent is limited by the filter resistor connected to SRP pin (R19). R19 must be dimensioned to withstand theworst case power dissipation when in zero volt operation mode.
The zero volt operation mode is disabled when BATDEP is above the zero volt operation threshold, and the mainPWM loop is turned on if charge is enabled, regulating the current to the value set by SRSET voltage. To avoiderrors on the charge current both resistors on the SRP, SRN filter must have the same value. Note, however,that R21 (connected to SRN) does not dissipate any power when in zero volt operation and can be of minimumsize.
The three open collector g
m
amplifiers are tied to the COMP pin (refer to Figure 2 ), which is internally biased upby a 100- μA constant current source. The voltage on the COMP pin is the control voltage (V
C
) for the PWMcomparator. The PWM comparator compares V
C
to the sawtooth ramp of the internally fixed 300-kHz oscillator toprovide duty cycle information for the PWM drive. The PWM drive is level-shifted to provide adequate gatevoltage levels for the external P-channel MOSFET. Refer to PWM selector switch gate drive section for gatedrive voltage levels.
Figure 2. PWM Controller Block Diagram
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SOFTSTART
10
0
30
20
40
60
50
70
90
80
100
VCOMP - Compensation Voltage - V
Percent Duty Cycle - %
PERCENT DUTY CYCLE
vs
COMPENSATION VOLTAGE
1.2 1.7 2.2 2.7 3.2
SETTING THE BATTERY CHARGE REGULATION VOLTAGE
VBATTERY +(R1 )R2) VBATSET
R2 V)IBATP R1
(1)
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
Softstart is provided to ensure an orderly start-up when the PWM is enabled. When the PWM controller isdisabled (ENABLE = Low), the 100- μA current source pullup is disabled and the COMP pin is actively pulleddown to GND. Disabling the 100- μA pullup reduces current drain when the PWM is disabled. When thebq24702/bq24703 PWM is enabled (ENABLE = High), the COMP pin is released and the 100- μA pullup isenabled (refer to Figure 2 ). The voltage on the COMP pin increases as the pullup charges the externalcompensation network connected to the COMP pin. As the voltage on the COMP pin increases the PWM dutycycle increases linearly as shown in Figure 3 .
Figure 3.
As any one of the three controlling loops approaches the programmed limit, the g
m
amplifier begins to shuntcurrent away from the COMP pin. The rate of voltage rise on the COMP pin slows due to the decrease in totalcurrent out of the pin, decreasing the rate of duty cycle increase. When the loop has reached the programmedlimit the g
m
amplifier shunts the entire bias current (100 μA) and the duty cycle remains fixed. If any of the controlparameters tries to exceed the programmed limit, the g
m
amplifier shunts additional current from the COMP pin,further reducing the PWM duty cycle until the offending parameter is brought into check.
The battery charge regulation voltage is programmed through the BATSET pin, if the internal precision referenceis not used. The BATSET input is a high-impedance input that is driven by either a keyboard controller DAC orvia a resistor divider from a precision reference (see Figure 4 ).
The battery voltage is fed back to the g
m
amplifier through a resistor divider network. The battery chargeregulation voltage can be defined as:
where I
BATP
= input bias current for pin BATP
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UDG-00116
(a) VBATSET < 0.25 V
(b) VBATSET > 1 V
13
+
9
0.25 V
BATSET
BATP
R2
VBAT
gm AMPLIFIER
1.196 V
R1
VREF = 5 V COMP
13
9
+
10
0.25 V
BATSET
BATP
VBAT
gm AMPLIFIER
1.25 V
COMP
10
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
The overall accuracy of the battery charge regulation voltage is a function of the bypassed 5-V reference voltagetolerance as well as the tolerances on R1 and R2. The precision voltage reference has a 0.5% tolerance makingit suitable for the tight battery voltage requirements of Li-ion batteries. Tolerance resistors of 0.1% arerecommended for R1 and R2 as well as any resistors used to set BATSET.
The bq24702/bq24703 provides the capability of using an internal precision voltage reference through the use ofa multiplexing scheme, refer to Figure 4 , on the BATSET pin. When BATSET voltage is less than 0.25 V, aninternal reference is switched in and the BATSET pin is switched out from the g
m
amplifier input. When theBATSET voltage is greater than 0.25 V, the BATSET pin voltage is switched in to the input of the g
m
amplifierand the voltage reference is switched out.
NOTE:
The minimum recommended BATSET is 1.0 V, if BATSET is used to set the voltageloop.
Figure 4. Battery Error Amplifier Input Multiplexing Scheme
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PROGRAMMING THE BATTERY CHARGE CURRENT
UDG-00117
RS
25 kΩ
10
5
16
COMP
+2 kΩ
15
+
SRN
SRP
VREF
SRSET
(2)
PROGRAMMING THE ADAPTER CURRENT
IADPT +VACSET
25 RS2
(3)
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
The battery charge current is programmed via a voltage on the SRSET pin. This voltage can be derived from aresistor divider from the 5-V VREF or by means of an DAC. The voltage is converted to a current source that isused to develop a voltage drop across an internal offset resistor at one input of the SR g
m
amplifier. The chargecurrent is then a function of this voltage drop and the sense resistor (R
S
), refer to Figure 5 .
Figure 5. Battery Charge Current Input Threshold Function
The battery charge current can be defined as:
where V
SRSET
is the programming voltage on the SRSET pin. V
SRSET
maximum is 2.5 V.
Like the battery charge current described previously, the adapter current is programmed via a voltage on theACSET pin. That voltage can either be from an external resistor divider from the 5-V VREF or from an externalDAC. The adapter current is defined as:
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COMPONENT SELECTION
MOSFET Selection
IIN(avg)+D Ichg A
D = Duty cycle
Ichg = Charge current
(4)
IIN(RMS)+Ichg D
ǸARMS
(5)
Schottky Rectifier (Freewheeling)
ID1(avg)+Ichg (1*D)A
(6)
Choosing an Inductance
L+D ǒVIN *VBATǓ
FS Ichg Ripple
Ripple = % Ripple allowed (Ex.: 0,2 for 20% ripple)
(7)
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
MOSFET selection depends on several factors, namely, gate-source voltage, input voltage, and input current.The MOSFET must be a P-channel device capable of handling at least 15-V gate-to-source with a drain-sourcebreakdown of V
BV
~ V
IN
+1 V. The average input current can be approximated by:
The RMS current through the MOSFET is defined as:
The rise/fall times for pin PWM for the selected MOSFET should be greater than 40 nsec.
The freewheeling Schottky rectifier must also be selected to withstand the input voltage, V
IN
. The average currentcan be approximated from:
Low inductance values result in a steep current ramp or slope. Steeper current slopes result in the converteroperating in the discontinuous mode at a higher power level. Steeper current slopes also result in higher outputripple current, which may require a higher number or more expensive capacitors to filter the higher ripple current.
In addition, the higher ripple current results in an error in the sensed battery current particularly at lower chargingcurrents. It is recommended that the ripple current not exceed 20% to 30% of full scale dc current.
Too large an inductor value results in the current waveform of Q1 and D1 in Figure 2 approximating asquarewave with an almost flat current slope on the step. In this case, the inductor is usually much larger thannecessary, which may result in an efficiency loss (higher DCR) and an area penalty.
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Selecting an Output Capacitor
Ic(RMS)+ǒVIN *VBATǓ D
FS LARMS
(8)
Selecting an Input Capacitor
IRMS +[Ichg (1–D)]2 D)[Ichg D]2 (1–D)
ǸARMS
(9)
Compensating the Loop
FZ+1
2 ǒ1
p RCOMP CZǓHz
(10)
FP+1
2 ǒ1
p RCOMP CPǓHz
(11)
SELECTOR OPERATION
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
For this application the output capacitor is used primarily to shunt the output ripple current away from the battery.The output capacitor should be sized to handle the full output ripple current as defined as:
The input capacitor is used to shunt the converter ripple current on the input lines. The capacitor(s) must have aripple current (RMS) rating of:
In addition to shunting the converter input ripple when the PWM is operating, the input capacitor also acts as partof an LC filter, where the inductance component is defined by the ac adapter cable inductance and board traceinductance from adapter connector to filter capacitor. Overshoot conditions can be observed at V
CC
line duringfast load transients when the adapter powers the load or when the adapter is hot-plugged .
Increasing the input capacitor value decreases the overshoot at V
CC
. Avoid overshoot voltages at V
CC
in excessof the absolute maximum ratings for that pin.
For the bq24702/bq24703 used as a buck converter, the best method of compensation is to use a Type IIcompensation network from the output of the transconductance amplifiers (COMP pin) to ground (GND) asshown in Figure 2 . A Type II compensation adds a pole-zero pair and an additional pole at dc.
The Type II compensation network places a zero at
and a pole at
For this battery charger application the following component values: C
Z
= 4.7 μF, C
P
= 150 pF, and R
COMP
= 100Ω, provides a closed loop response with more than sufficient phase margin, as long as the LC pole [1/2 ×PI ×sqrt (l ×c)] is set below 10 kHz. The SRP/SRN filter (R19, R21, C8) and ACP/ACN filter (R13/R15/C3) arerequired to filter noise associated with the PWM switching. To avoid adding secondary poles to the PWM closedloop system those filters should be set with cutoff frequencies higher than 1 kHz.
The bq24702/bq24703 allows the host controller to manually select the battery as the system's main powersource, without having to remove adapter power. This allows battery conditioning through smart battery learncycles. In addition, the bq24702/bq24703 supports autonomous supply selection during fault conditions on eithersupply. The selector function uses low R
DS(on)
P-channel MOSFETs for reduced voltage drops and longer batteryrun times.
NOTE:
Selection of battery power whether manual or automatic results in the suspension ofbattery charging.
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UDG-00119
(bq24702)
BATTERY
SELECTOR
CONTROL BATDRV
24
23
ACDRV
BATTERY
SELECT
SWITCH
ADAPTER SELECT SWITCH
ADAPTER
INPUT SYSTEM
LOAD
PWM
BATTERY
CHARGER
BAT
(bq24702)
AUTONOMOUS SELECTION OPERATION
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
Figure 6. Selector Control Switches
Adapter voltage information is sensed at the ACDET pin via a resistor divider from the adapter input. The voltageon the ACDET pin is compared to an internally fixed threshold. An ACDET voltage less than the set threshold isconsidered as a loss of adapter power regardless of the actual voltage at the adapter input. Informationconcerning the status of adapter power is fed back to the host controller through ACPRES. The presence ofadapter power is indicated by ACPRES being set high. A loss of adapter power is indicated by ACPRES goinglow regardless of which power source is powering the system. During a loss of adapter power, thebq24702/bq24703 obtains operating power from the battery through the body diode of the P-channel batteryselect MOSFET. Under a loss of adapter power, ACPRES (normally high) goes low, if adapter power is selectedto power the system, the bq24702/bq24703 automatically switches over to battery power by commandingACDRV high and BATDRV low. During the switch transition period, battery power is supplied to the load via thebody diode of the battery select P-channel MOSFET. When adapter power is restored, the bq24702/bq24703configures the selector switches according to the state of signals; ACSEL, and ACPRES. If the ACSEL pin is lefthigh when ac power is restored, the bq24702/bq24703 automatically switches back to ac power. To remain onbattery power after ac power is restored, the ACSEL pin must be brought low.
Conversely ,if the battery is removed while the system is running on battery power and adapter power is present,the bq24702/bq24703 automatically switches over to adapter power by commanding BATDRV high and ACDRVlow.
NOTE:
For the bq24702 any fault condition that results in the selector MOSFET switches notmatching their programmed states is indicated by the ALARM pin momentarily goinghigh. Refer to Battery Depletion Detection Section for more information on the ALARMdiscrete.
When switching between the ac adapter and battery the internal logic monitors the voltage at pins ACDRV andBATDRV to implement a break-before-make function, with typical dead time on the order of 150 nsec.
The turnon times for the external ac/battery switches can be increased to minimize inrush peak currents; that canbe accomplished by adding external resistors in series with the MOSFET gates (R18 and R26). Note, however,that adding those resistors effectively disables the internal break-before-make function for ac/battery-switches, asthe MOSFET gate voltages can not be monitored directly. If external resistors are added to increase the rise/falltimes for battery/ac switches the break-before-make has to be implemented with discrete external components,to avoid shoot-through currents between ac adapter and battery pack. This functionality can be implemented byadding diodes (D2/D9) that bypass the external resistors when turning off the external FETs.
22 Submit Documentation Feedback Copyright © 2003 – 2007, Texas Instruments Incorporated
Product Folder Link(s): bq24702 bq24703
www.ti.com
SMART LEARN CYCLES WHEN ADAPTER POWER IS PRESENT
SYSTEM BREAK BEFORE MAKE FUNCTION
BATTERY DEPLETION DETECTION
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
Smart learn cycles can be conducted when adapter power is present by asserting and maintaining the ACSELpin low. The adapter power can be reselected at the end of the learn cycle by a setting ACSEL to a logic high,provided that adapter power is present. Battery charging is suspended while selected as the system powersource.
NOTE:
On the bq24703 the ac adapter is switched to the load when the battery voltagereaches the battery depleted threshold; it can be used when the learn cycle does notrequire the battery voltage to go below the battery depleted threshold. If the learncycle algorithm requires the battery voltage to go lower than the battery depletedvoltage, the bq24702 should be used, as it does not switch the ac adapter to loadupon battery depleted detection.
When selecting the battery as the system primary power source, the adapter power select MOSFET turns off, inabreak-before-make fashion, before the battery select MOSFET turns on. To ensure that this happens under allload conditions, the system voltage (load voltage) can be monitored through a resistor divider on the VS pin. Thisfunction provides protection against switching over to battery power if the adapter selector switch were shortedand adapter power present. Setting the VS resistive divider gain with the same gain selected for the BATPresistive divider assures the battery switch is turned on only when the system voltage is equal or less than thebattery voltage. This function can be eliminated by grounding the VS pin.
The ACDET function senses the adapter voltage via a resistive divider (refer to application circuit).The dividercan be connected either to the anode of the input blocking diode (directly to the adapter supply) or to the cathodeof the input blocking diode (bq24702/3 VCC pin). When the divider is connected to the adapter supply, theadapter power removal is immediately identified and the sleep mode is entered, disabling the break-before-makefunction for system voltage (see section for system power switching) and coupling system voltage to the batteryline. In normal operation with a battery present, the battery low impedance prevents any over-voltage conditions.However, if a pack is not present or the pack is open, the battery line voltage has a transient equal to the adaptervoltage. The bq24703 SRP/SRN pins are designed to withstand this over-voltage condition, but avoid connectionto the battery line of any external devices that are not rated to withstand the adapter voltage.
Connecting the ACDET resistive divider input to the VCC node keeps the system break-before-make functionenabled until the voltage at pin VS is lower than the voltage at pin BATP. However, note that when using thistopology the VCC pin voltage can be held by capacitive loads at either the VCC or system (ac switch is on)nodes when the ac adapter is removed. As the ACDET divider is connected to the VCC line there is a time delayfrom ac adapter removal to ac adapter removal detection by the IC. This time is dependent on load conditionsand capacitive load values at VCC and system lines.
The bq24702/bq24703 provides the host controller with a battery depletion discrete, the ALARM pin, to alert thehost when a depleted battery condition occurs. The battery depletion level is set by the voltage applied to theBATDEP pin through a voltage divider network. The ALARM output asserts high and remains high as long as thebattery deplete condition exists, regardless of the power source selected.
For the bq24702, the host controller must take appropriate action during a battery deplete condition to select theproper power source. The bq24702 remains on the selected power source. The bq24703, however, automaticallyreverts over to adapter power, provided the adapter is present, during a deep discharge state. The battery isconsidered as being in a deep discharge state when the battery voltage is less than (0.8 ×depleted level).
Feature sets for the bq24702 and bq24703 are detailed in the Available Options table.
Copyright © 2003 – 2007, Texas Instruments Incorporated Submit Documentation Feedback 23
Product Folder Link(s): bq24702 bq24703
www.ti.com
SELECTOR/ALARM TIMING EXAMPLE
UDG-00120
UDG-00122
ACPRES
ACSEL
BATDRV
ALARM
bq24703 ONLY
ACDRV
BATTERY
DEPLETE
CONDITION
BATDEP< 1 V
tACSEL
tBATSEL
ACSEL
(ACPRES)
tACSEL
tBATSEL
ACDRV
BATDRV
BATDRV
ACDRV
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
The selector and ALARM timing example in Figure 7 illustrates the battery conditioning support.
NOTE:
For manual selection of wall power as the main power source, both the ACPRES andACSEL signals must be a logic high.
Figure 7. Battery Selector and ALARM Timing Diagram
24 Submit Documentation Feedback Copyright © 2003 – 2007, Texas Instruments Incorporated
Product Folder Link(s): bq24702 bq24703
www.ti.com
PWM SELECTOR SWITCH GATE DRIVE
TRANSIENT CONDITIONS AT SYSTEM, OVER-VOLTAGE AT SYSTEM TERMINAL
AC ADAPTER COLLAPSING DUE TO TRANSIENT CONDITIONS
IBAT AMPLIFIER
POWER DISSIPATION CALCULATION
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
Because the external P-channel MOSFETs (as well as the internal MOSFETs) have a maximum gate-sourcevoltage limitation of the input voltage, VCC, cannot be used directly to drive the MOSFET gate under all inputconditions. To provide safe MOSFET-gate-drive at input voltages of less than an intermediate gate drive voltagerail was established (VSHP). Where V
HSP
= VCC – 10 V. This ensures adequate enhancement voltage across alloperating conditions.
An external zener diode (D3) connected between VCC and VHSP is required for transient protection; itsbreakdown voltage should be above the maximum value for internal VHSP/VCC clamp voltage for all operatingconditions.
Overshoot conditions can be observed at the system terminal due to fast load transients and inductivecharacteristics of the system terminal to load connection. An overshoot at the system terminal can be directlycoupled to the VCC and VBAT nodes, depending on the switch mode of operation. If the capacitors at VBAT andVCC can not reduce this overshoot to values below the absolute maximum ratings, it is recommended that anadditional capacitor is added to the system terminal to avoid damage to IC or external components due tovoltage overstress under those transient conditions.
The ac adapter voltage collapses when the ac switch is on and a current load transient at the system exceedsthe adapter current limit protection. Under those conditions the ac switch is turned off when the ac adaptervoltage falls below the ac adapter detection threshold. If the system terminal to load impedance has an inductivecharacteristic, a negative voltage spike can be generated at the system terminal and coupled into the battery linevia the battery switch backgate diode.
In normal operation, with a battery present, this is not an issue, as the low battery impedance holds the voltageat battery line. However, if a battery is not present or the pack protector switches are open the negative spike atthe system terminal is directly coupled to the SRP/SRN pins via the R19/R21 resistors.
Avoid damage to the SRP/SRN pins if this transient condition happens in the application. If a negative voltagespike happens at system terminal and R19/R21 limit the current sourced from the pin to less than – 50 mA (Ipin =Vsystem/R19), the pins SRP/SRN are not damaged and the external protection schottky diodes are not required.However, if the current under those transient conditions exceeds – 50 mA, external schottky diodes must beadded to clamp the voltage at pins SRP/SRN so they do not exceed the absolute maximum ratings specified(-0.3 V).
A filter with a cutoff frequency smaller than 10 kHz should be added to the IBAT output to remove switchingnoise.
During PWM operation, the power dissipated internally to the IC increases as the internal driver is switching thePWM FET on/off. The power dissipation figures are dependent on the external FET used, and can be calculatedusing the following equation:Pd(max) = [IDDOP + Qg ×Fs(max)] ×VADAP
where:
Qg = Total gate charge for selected PWM MOSFETIDDOP = Maximum quiescent current for ICVADAP = Maximum adapter voltageFs(max) = Maximum PWM switching frequency
The maximum junction temperature for the IC must be limited to 125 °C, under worst case conditions.
Copyright © 2003 – 2007, Texas Instruments Incorporated Submit Documentation Feedback 25
Product Folder Link(s): bq24702 bq24703
www.ti.com
TYPICAL CHARACTERISTICS
4.9
4.92
4.94
4.96
4.98
5
5.02
5.04
5.06
5.08
5.1
−40 10 60 110
VREF − 5 -V Reference − V
VCC = 18 V
TJ − Junction Temperature − _C125
1.175
1.18
1.185
1.19
1.195
1.2
1.205
1.21
1.215
−40 10 60 110
VFB Error Amplifier Reference − V−
VCC = 18 V
TJ − Junction Temperature − _C125
TJ − Junction Temperature − _C
14
16
18
20
22
24
26
−40 10 60 110
ISLEEP − Battery Sleep Current − Aµ
VCC = 18 V
125
TJ − Junction Temperature − _C
235
245
255
265
275
285
295
305
315
325
335
−40 10 60 110
f − Oscillator Frequency − kHz
VCC = 18 V
125
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
ERROR AMPLIFIER REFERENCE BYPASSED 5-V REFERENCEvs vsJUNCTION TEMPERATURE JUNCTION TEMPERATURE
Figure 8. Figure 9.
TOTAL SLEEP CURRENT OSCILLATOR FREQUENCYvs vsJUNCTION TEMPERATURE JUNCTION TEMPERATURE
Figure 10. Figure 11.
26 Submit Documentation Feedback Copyright © 2003 – 2007, Texas Instruments Incorporated
Product Folder Link(s): bq24702 bq24703
www.ti.com
VSRSET − Battery Current Set V oltage − V
0
5
10
15
20
25
0.25 0.75 1.25 1.75 2.25
SRSET Full Scale = 2.5 V
= Max Programmed Current
TJ = 25°C
Battery Current Set Accuracy − %
0.5 1 1.5 2 2.5
VACSET − AC Current Set Voltage − V
0
5
10
15
20
25
0.25 0.75 1.25 1.75 2.25
AC Current Set Accuracy − %
ACSET Full Scale = 2.5 V
= Max Programmed Current
TJ = 25°C
0.5 1 1.5 2 2.5
BOARD LAYOUT GUIDELINES
Recommended Board Layout
bq24702
bq24703
SLUS553E – MAY 2003 – REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS (continued)
BATTERY CURRENT SET ACCURACY AC CURRENT SET ACCURACYvs vsBATTERY CURRENT SET VOLTAGE AC CURRENT SET VOLTAGE
Figure 12. Figure 13.
Follow these guidelines when implementing the board layout:1. Do not place lines and components dedicated to battery/adapter voltage sensing (ACDET,BATDEP, VS),voltage feedback loop (BATP, BATSET if external reference is used) and shunt voltage sensing(SRP/SRN/ACP/ACN) close to lines that have signals with high dv/dt (PWM, BATDRV, ACDRV, VHSP) toavoid noise coupling.2. Add filter capacitors for SRP/SRN (C8) and ACP/ACN (C3) close to IC pins3. Add Reference filter capacitor C1 close to IC pins4. Use an isolated, clean ground for IC ground pin and resistive dividers used in voltage sensing; use anisolated power ground for PWM filter cap and diode (C11/D4). Connect the grounds to the battery PACK-and adapter GND.5. Place C7 close to VCC pin.6. Place input capacitor C12 close to PWM switch (U3) source and R14.7. Position ac switch (U2) to minimize trace length from ac switch source to input capacitor C12.8. Minimize inductance of trace connecting PWM pin and PWM external switch U3 gate9. Maximize power dissipation planes connected to PWM switch10. Maximize power dissipation planes connected to SRP resistor if steady state in zero volt mode is possible11. Maximize power dissipation planes connected to D1
Copyright © 2003 – 2007, Texas Instruments Incorporated Submit Documentation Feedback 27
Product Folder Link(s): bq24702 bq24703
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
BQ24702PW ACTIVE TSSOP PW 24 60 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
BQ24702PWG4 ACTIVE TSSOP PW 24 60 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
BQ24702PWR ACTIVE TSSOP PW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
BQ24702PWRG4 ACTIVE TSSOP PW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
BQ24703PW ACTIVE TSSOP PW 24 60 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
BQ24703PWG4 ACTIVE TSSOP PW 24 60 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
BQ24703PWR ACTIVE TSSOP PW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
BQ24703PWRG4 ACTIVE TSSOP PW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
BQ24703RHDR ACTIVE VQFN RHD 28 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
BQ24703RHDRG4 ACTIVE VQFN RHD 28 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 8-Dec-2009
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
BQ24702PWR TSSOP PW 24 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 Q1
BQ24703PWR TSSOP PW 24 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 Q1
BQ24703RHDR VQFN RHD 28 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
BQ24702PWR TSSOP PW 24 2000 367.0 367.0 38.0
BQ24703PWR TSSOP PW 24 2000 367.0 367.0 38.0
BQ24703RHDR VQFN RHD 28 3000 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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