74LVC245A-Q100;
74LVCH245A-Q100
Octal bus transceiver; 3-state
Rev. 3 — 11 September 2018 Product data sheet
1. General description
The 74LVC245A-Q100; 74LVCH245A-Q100 are 8-bit transceivers featuring non-inverting 3-state
bus compatible outputs in both send and receive directions. The device features an output enable
(OE) input for easy cascading and a send/receive (DIR) input for direction control. OE controls the
outputs so that the buses are effectively isolated.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to
the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications.
The 74LVCH245A-Q100 bus hold on data inputs eliminates the need for external pull-up resistors
to hold unused inputs.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low-power consumption
Direct interface with TTL levels
Inputs accept voltages up to 5.5 V
High-impedance when VCC = 0 V
Bus hold on all data inputs (74LVCH245A-Q100 only)
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
Nexperia 74LVC245A-Q100; 74LVCH245A-Q100
Octal bus transceiver; 3-state
3. Ordering information
Table 1. Ordering information
PackageType number
Temperature range Name Description Version
74LVC245AD-Q100
74LVCH245AD-Q100
-40 °C to +125 °C SO20 plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
74LVC245APW-Q100
74LVCH245APW-Q100
-40 °C to +125 °C TSSOP20 plastic thin shrink small outline package;
20 leads; body width 4.4 mm
SOT360-1
74LVC245ABQ-Q100
74LVCH245ABQ-Q100
-40 °C to +125 °C DHVQFN20 plastic dual in-line compatible
thermal enhanced very thin quad
flat package; no leads; 20 terminals;
body 2.5 × 4.5 × 0.85 mm
SOT764-1
4. Functional diagram
2
1DIR
18
19
B0
B1
B2
B3
B4
B5
B6
B7
3
17
4
16
5
15
6
14
7
13
8
12
9
A0
A1
A2
A3
A4
A5
A6
A7
11
OE
mna174
Fig. 1. Logic diagram
173
1
19
2
1
16
4
15
5
14
6
13
7
12
8
119
18
G3
3EN1
3EN2
2
mna175
Fig. 2. IEC logic symbol
74LVC_LVCH245A_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 3 — 11 September 2018 2 / 15
Nexperia 74LVC245A-Q100; 74LVCH245A-Q100
Octal bus transceiver; 3-state
5. Pinning information
5.1. Pinning
74LVC245A-Q100
74LVCH245A-Q100
DIR VCC
A0 OE
A1 B0
A2 B1
A3 B2
A4 B3
A5 B4
A6 B5
A7 B6
GND B7
aaa-003142
1
2
3
4
5
6
7
8
9
10
12
11
14
13
16
15
18
17
20
19
Fig. 3. Pin configuration SOT163-1 (SO20)
and SOT360-1 (TSSOP20)
74LVC245A-Q100
74LVCH245A-Q100
Transparent top view
B6
A6
A7
B5
A5 B4
A4 B3
A3 B2
A2 B1
A1 B0
A0 OE
GND
B7
D
I
R
V
C
C
9 12
8 13
7 14
6 15
5 16
4 17
3 18
2 19
10
11
1
2
0
terminal 1
index area
GND(1)
aaa-003143
(1) This is not a supply pin. The substrate is
attached to this pad using conductive die attach
material. There is no electrical or mechanical
requirement to solder this pad. However, if it is
soldered, the solder land should remain floating or
be connected to GND.
Fig. 4. Pin configuration SOT764-1 (DHVQFN20)
5.2. Pin description
Table 2. Pin description
Symbol Pin Description
DIR 1 direction control
A0, A1, A2, A3, A4, A5, A6, A7 2, 3, 4, 5, 6, 7, 8, 9 data input/output
GND 10 ground (0 V)
B0, B1, B2, B3, B4, B5, B6, B7 18, 17, 16, 15, 14, 13, 12, 11 data input/output
OE 19 output enable input (active LOW)
VCC 20 supply voltage
6. Functional description
Table 3. Function selection
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high impedance OFF-state.
Inputs Inputs/outputs
OE DIR An Bn
L L An = Bn inputs
L H inputs Bn = An
H X Z Z
74LVC_LVCH245A_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 3 — 11 September 2018 3 / 15
Nexperia 74LVC245A-Q100; 74LVCH245A-Q100
Octal bus transceiver; 3-state
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage -0.5 +6.5 V
IIK input clamping current VI < 0 V -50 - mA
VIinput voltage [1] -0.5 +6.5 V
IOK output clamping current VO > VCC or VO < 0 V - ±50 mA
output HIGH or LOW [2] -0.5 VCC + 0.5 VVOoutput voltage
output 3-state [2] -0.5 +6.5 V
IOoutput current VO = 0 V to VCC - ±50 mA
ICC supply current - 100 mA
IGND ground current -100 - mA
Tstg storage temperature -65 +150 °C
Ptot total power dissipation Tamb = -40 °C to +125 °C [3] - 500 mW
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SO20 packages: above 70 °C derate linearly with 8 mW/K.
For TSSOP20 packages: above 60 °C derate linearly with 5.5 mW/K.
For DHVQFN20 packages: above 60 °C derate linearly with 4.5 mW/K.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
1.65 - 3.6 VVCC supply voltage
functional 1.2 - 3.6 V
VIinput voltage 0 - 5.5 V
output HIGH or LOW 0 - VCC VVOoutput voltage
output 3-state 0 - 5.5 V
Tamb ambient temperature in free air -40 - +125 °C
VCC = 1.2 V to 2.7 V 0 - 20 ns/VΔt/ΔV input transition rise and fall rate
VCC = 2.7 V to 3.6 V 0 - 10 ns/V
74LVC_LVCH245A_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 3 — 11 September 2018 4 / 15
Nexperia 74LVC245A-Q100; 74LVCH245A-Q100
Octal bus transceiver; 3-state
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Tamb = -40 °C to +85 °C Tamb =
-40 °C to +125 °C
Symbol Parameter Conditions
Min Typ [1] Max Min Max
Unit
VCC = 1.2 V 1.08 - - 1.08 - V
VCC = 1.65 V to 1.95 V 0.65VCC - - 0.65VCC - V
VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V
VIH HIGH-level input
voltage
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VCC = 1.2 V - - 0.12 - 0.12 V
VCC = 1.65 V to 1.95 V - - 0.35VCC - 0.35VCC V
VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V
VIL LOW-level input
voltage
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VI = VIH or VIL
IO = -100 μA;
VCC = 1.65 V to 3.6 V
VCC - 0.2 - - VCC - 0.3 - V
IO = -4 mA; VCC = 1.65 V 1.2 - - 1.05 - V
IO = -8 mA; VCC = 2.3 V 1.8 - - 1.65 - V
IO = -12 mA; VCC = 2.7 V 2.2 - - 2.05 - V
IO = -18 mA; VCC = 3.0 V 2.4 - - 2.25 - V
VOH HIGH-level
output voltage
IO = -24 mA; VCC = 3.0 V 2.2 - - 2.0 - V
VI = VIH or VIL
IO = 100 μA;
VCC = 1.65 V to 3.6 V
- - 0.2 - 0.3 V
IO = 4 mA; VCC = 1.65 V - - 0.45 - 0.65 V
IO = 8 mA; VCC = 2.3 V - - 0.6 - 0.8 V
IO = 12 mA; VCC = 2.7 V - - 0.4 - 0.6 V
VOL LOW-level output
voltage
IO = 24 mA; VCC = 3.0 V - - 0.55 - 0.8 V
IIinput leakage
current
VI = 5.5 V or GND;
VCC = 3.6 V
[2] - ±0.1 ±5 - ±20 μA
IOZ OFF-state output
current
VI = VIH or VIL;
VO = 5.5 V or GND;
VCC = 3.6 V
[3] - ±0.1 ±5 - ±20 μA
IOFF power-off
leakage current
VI or VO = 5.5 V; VCC = 0.0 V - ±0.1 ±10 - ±20 μA
ICC supply current VI = VCC or GND; IO = 0 A;
VCC = 3.6 V
- 0.1 10 - 40 μA
ΔICC additional supply
current
per input pin; VI = VCC - 0.6 V;
IO = 0 A; VCC = 2.7 V to 3.6 V
- 5 500 - 5000 μA
CIinput capacitance VCC = 0 V to 3.6 V;
VI = GND to VCC
- 4.0 - - - pF
CI/O input/output
capacitance
VCC = 0 V to 3.6 V;
VI = GND to VCC
- 10 - - - pF
74LVC_LVCH245A_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 3 — 11 September 2018 5 / 15
Nexperia 74LVC245A-Q100; 74LVCH245A-Q100
Octal bus transceiver; 3-state
Tamb = -40 °C to +85 °C Tamb =
-40 °C to +125 °C
Symbol Parameter Conditions
Min Typ [1] Max Min Max
Unit
VCC = 1.65; VI = 0.58 V [4][5] 10 - - 10 - μA
VCC = 2.3; VI = 0.7 V 30 - - 25 - μA
IBHL bus hold LOW
current
VCC = 3.0; VI = 0.8 V 75 - - 60 - μA
VCC = 1.65; VI = 1.07 V [4][5] -10 - - -10 - μA
VCC = 2.3; VI = 1.7 V -30 - - -25 - μA
IBHH bus hold
HIGH current
VCC = 3.0; VI = 2.0 V -75 - - -60 - μA
VCC = 1.95 V [4][6] 200 - - 200 - μA
VCC = 2.7 V 300 - - 300 - μA
IBHLO bus hold LOW
overdrive current
VCC = 3.6 V 500 - - 500 - μA
VCC = 1.95 V [4][6] -200 - - -200 - μA
VCC = 2.7 V -300 - - -300 - μA
IBHHO bus hold HIGH
overdrive current
VCC = 3.6 V -500 - - -500 - μA
[1] All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb = 25 °C.
[2] The bus hold circuit is switched off when VI ˃ VCC allowing 5.5 V on the input terminal.
[3] For I/O ports the parameter IOZ includes the input leakage current.
[4] Valid for data inputs of bus hold parts only (74LVCH245A-Q100). Note that control inputs do not have a bus hold circuit.
[5] The specified sustaining current at the data input holds the input below the specified VI level.
[6] The specified overdrive current at the data input forces the data input to the opposite input state.
74LVC_LVCH245A_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 3 — 11 September 2018 6 / 15
Nexperia 74LVC245A-Q100; 74LVCH245A-Q100
Octal bus transceiver; 3-state
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Fig. 7.
Tamb = -40 °C to +85 °C Tamb =
-40 °C to +125 °C
Symbol Parameter Conditions
Min Typ [1] Max Min Max
Unit
nAn to nBn; nBn to nAn; see Fig. 5 [2]
VCC = 1.2 V - 17.0 - - - ns
VCC = 1.65 V to 1.95 V 1.5 6.5 14.6 1.5 16.9 ns
VCC = 2.3 V to 2.7 V 1.0 3.4 7.6 1.0 8.7 ns
VCC = 2.7 V 1.5 3.4 7.3 1.5 9.5 ns
tpd propagation
delay
VCC = 3.0 V to 3.6 V 1.5 2.9 6.3 1.5 8.0 ns
nOE to nAn, nBn; see Fig. 6 [2]
VCC = 1.2 V - 22.0 - - - ns
VCC = 1.65 V to 1.95 V 1.9 8.3 19.5 1.9 22.5 ns
VCC = 2.3 V to 2.7 V 1.5 4.6 10.7 1.5 12.4 ns
VCC = 2.7 V 1.5 4.8 9.5 1.5 12.0 ns
ten enable time
VCC = 3.0 V to 3.6 V 1.5 3.7 8.5 1.5 11.0 ns
nOE to nAn, nBn; see Fig. 6 [2]
VCC = 1.2 V - 12.0 - - - ns
VCC = 1.65 V to 1.95 V 2.9 5.5 12.3 2.9 14.2 ns
VCC = 2.3 V to 2.7 V 1.0 3.1 7.1 1.0 8.2 ns
VCC = 2.7 V 1.5 3.9 8.0 1.5 10.0 ns
tdis disable time
VCC = 3.0 V to 3.6 V 1.7 3.6 7.0 1.7 9.0 ns
tsk(o) output skew
time
[3] - - 1.0 - 1.5 ns
per input; VI = GND to VCC [4]
VCC = 1.65 V to 1.95 V - 7.7 - - - pF
VCC = 2.3 V to 2.7 V - 11.3 - - - pF
CPD power
dissipation
capacitance
VCC = 3.0 V to 3.6 V - 14.4 - - - pF
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC
2 × fi × N + Σ(CL × VCC
2 × fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in Volts
N = number of inputs switching
Σ(CL × VCC
2 × fo) = sum of the outputs.
74LVC_LVCH245A_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 3 — 11 September 2018 7 / 15
Nexperia 74LVC245A-Q100; 74LVCH245A-Q100
Octal bus transceiver; 3-state
10.1. Waveforms and test circuit
mna176
An, Bn input
Bn, An output
tPLH tPHL
GND
VI
VM
VM
VM
VM
VOH
VOL
See Table 8 for measurement points.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 5. Input (An, Bn) to output (Bn, An) propagation delays and output transition times
mna367
tPLZ
tPHZ
outputs
disabled
outputs
enabled
VY
VX
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
OE input
VI
VOL
VOH
VCC
VM
GND
GND
tPZL
tPZH
VM
VM
See Table 8 for measurement points.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 6. Enable and disable times
Table 8. Measurement points
Supply voltage Input
VCC
VM
VIVXVY
1.2 V 0.5 × VCC VCC VOL + 0.15 V VOH - 0.15 V
1.65 V to 1.95 V 0.5 × VCC VCC VOL + 0.15 V VOH - 0.15 V
2.3 V to 2.7 V 0.5 × VCC VCC VOL + 0.15 V VOH - 0.15 V
2.7 V 1.5 V 2.7 V VOL + 0.3 V VOH - 0.3 V
3.0 V to 3.6 V 1.5 V 2.7 V VOL + 0.3 V VOH - 0.3 V
74LVC_LVCH245A_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 3 — 11 September 2018 8 / 15
Nexperia 74LVC245A-Q100; 74LVCH245A-Q100
Octal bus transceiver; 3-state
VMVM
tW
tW
10 %
90 %
0 V
VI
VI
negative
pulse
positive
pulse
0 V
VMVM
90 %
10 %
tf
tr
tr
tf
001aae331
VEXT
VCC
VIVO
DUT
CL
RT
RL
RL
G
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig. 7. Test circuit for measuring switching times
Table 9. Test data
Input Load VEXT
Supply voltage
VItr, tfCLRLtPLH, tPHL tPLZ, tPZL tPHZ, tPZH
1.2 V VCC ≤ 2 ns 30 pF 1 kΩ open 2 × VCC GND
1.65 V to 1.95 V VCC ≤ 2 ns 30 pF 1 kΩ open 2 × VCC GND
2.3 V to 2.7 V VCC ≤ 2 ns 30 pF 500 Ω open 2 × VCC GND
2.7 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open 2 × VCC GND
3.0 V to 3.6 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open 2 × VCC GND
74LVC_LVCH245A_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 3 — 11 September 2018 9 / 15
Nexperia 74LVC245A-Q100; 74LVCH245A-Q100
Octal bus transceiver; 3-state
11. Package outline
UNIT A
max. A
1 A
2 A
3 b
p c D
(1) E
(1) (1)
e H
E L L
p Q Z
y w v θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
2.65 0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4 1.27 10.65
10.00
1.1
1.0
0.9
0.4 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.1
0.4
SOT163-1
10
20
w M
b
p
detail X
Z
e
11
1
D
y
0.25
075E04 MS-013
pin 1 index
0.1 0.012
0.004
0.096
0.089
0.019
0.014
0.013
0.009
0.51
0.49
0.30
0.29 0.05
1.4
0.055
0.419
0.394
0.043
0.039
0.035
0.016
0.01
0.25
0.01 0.004
0.043
0.016
0.01
0 5 10 mm
scale
X
θ
A
A
1
A
2
H
E
L
p
Q
E
c
L
v M A
(A )
3
A
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
99-12-27
03-02-19
Fig. 8. Package outline SOT163-1 (SO20)
74LVC_LVCH245A_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 3 — 11 September 2018 10 / 15
Nexperia 74LVC245A-Q100; 74LVCH245A-Q100
Octal bus transceiver; 3-state
Fig. 9. Package outline SOT360-1 (TSSOP20)
74LVC_LVCH245A_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 3 — 11 September 2018 11 / 15
Nexperia 74LVC245A-Q100; 74LVCH245A-Q100
Octal bus transceiver; 3-state
References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT764-1 - - -
MO-241
- - -
sot764-1_po
03-01-27
14-12-12
Unit
mm
max
nom
min
1.00 0.05 4.6 3.15 2.6
0.5 3.5 0.1
A(1)
Dimensions (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
A1b
0.30
c D(1) DhE(1) Eh
1.00
e e1L
0.4
v w
0.05
y y1
0.90 0.02 0.2 4.5 3.00 2.50.25 0.05 0.1
0.85 0.30.80 0.00 4.4 2.85 2.40.18
1.15 0.5
detail X
B A
e1
e
e
C
y
C
y1
X
AC B
v
C
w
scale
A
A1
c
L
Eh
Dh
b
2 9
19 12
11
10
1
20
D
E
terminal 1
index area
terminal 1
index area
0 5 mm2.5
DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
20 terminals; body 2.5 x 4.5 x 0.85 mm SOT764-1
Fig. 10. Package outline SOT764-1 (DHVQFN20)
74LVC_LVCH245A_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 3 — 11 September 2018 12 / 15
Nexperia 74LVC245A-Q100; 74LVCH245A-Q100
Octal bus transceiver; 3-state
12. Abbreviations
Table 10. Abbreviations
Acronym Description
CDM Charged Device Model
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MIL Military
MM Machine Model
TTL Transistor-Transistor Logic
13. Revision history
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74LVC_LVCH245A_Q100 v.3 20180911 Product data sheet - 74LVC_LVCH245A_Q100 v.2
Modifications: The format of this data sheet has been redesigned to comply with the identity guidelines
of Nexperia.
Legal texts have been adapted to the new company name where appropriate.
Package outline drawing of SOT764-1 updated.
74LVC_LVCH245A_Q100 v.2 20140210 Product data sheet - 74LVC_LVCH245A_Q100 v.1
Modifications: Alternative descriptive title corrected (errata).
74LVC_LVCH245A_Q100 v.1 20120903 Product data sheet - -
74LVC_LVCH245A_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 3 — 11 September 2018 13 / 15
Nexperia 74LVC245A-Q100; 74LVCH245A-Q100
Octal bus transceiver; 3-state
14. Legal information
Data sheet status
Document status
[1][2]
Product
status [3]
Definition
Objective [short]
data sheet
Development This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification This document contains data from
the preliminary specification.
Product [short]
data sheet
Production This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
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74LVC_LVCH245A_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 3 — 11 September 2018 14 / 15
Nexperia 74LVC245A-Q100; 74LVCH245A-Q100
Octal bus transceiver; 3-state
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................2
4. Functional diagram.......................................................2
5. Pinning information......................................................3
5.1. Pinning.........................................................................3
5.2. Pin description............................................................. 3
6. Functional description................................................. 3
7. Limiting values............................................................. 4
8. Recommended operating conditions..........................4
9. Static characteristics....................................................5
10. Dynamic characteristics............................................ 7
10.1. Waveforms and test circuit........................................ 8
11. Package outline........................................................ 10
12. Abbreviations............................................................ 13
13. Revision history........................................................13
14. Legal information......................................................14
© Nexperia B.V. 2018. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 11 September 2018
74LVC_LVCH245A_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 3 — 11 September 2018 15 / 15