Low Cost, High Speed
Rail-to-Rail Amplifiers
AD8091/AD8092
Rev. C
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Tel: 781.329.4700 www.analog.com
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FEATURES
Low cost single (AD8091) and dual (AD8092) amplifiers
Fully specified at +3 V, +5 V, and ±5 V supplies
Single-supply operation
Output swings to within 25 mV of either rail
High speed and fast settling on 5 V
110 MHz, −3 dB bandwidth (G = +1)
145 V/μs slew rate
50 ns settling time to 0.1%
Good video specifications (G = +2)
Gain flatness of 0.1 dB to 20 MHz; RL = 150 Ω
0.03% differential gain error; RL = 1 kΩ
0.03%differential phase error; RL = 1 kΩ
Low distortion
−80 dBc total harmonic @ 1 MHz; RL = 100 Ω
Outstanding load drive capability
Drives 45 mA, 0.5 V from supply rails
Drives 50 pF capacitive load (G = +1)
Low power of 4.4 mA per amplifier
APPLICATIONS
Coaxial cable drivers
Active filters
Video switchers
Professional cameras
CCD imaging systems
CDs/DVDs
Clock buffers
CONNECTION DIAGRAMS
0
2859-001
NC = NO CONNECT
AD8091
NC
1
–IN
2
+IN
3
–V
S4
NC
+V
S
V
OUT
NC
8
7
6
5
Figure 1. SOIC-8 (R-8)
0
2859-003
AD8091
V
OUT 1
–V
S2
+IN
3
+V
S
5
–IN
4
Figure 2. SOT23-5 (RJ-5)
02859-002
NC = NO CONNECT
AD8092
OUT1
1
–IN1
2
+IN1
3
–V
S4
+V
S
OUT
–IN2
+IN2
8
7
6
5
Figure 3. MSOP-8 and SOIC-8 (RM-8, R-8)
GENERAL DESCRIPTION
The AD8091 (single) and AD8092 (dual) are low cost, voltage
feedback, high speed amplifiers designed to operate on +3 V,
+5 V, or ±5 V supplies. The AD8091/AD8092 have true single-
supply capability, with an input voltage range extending 200 mV
below the negative rail and within 1 V of the positive rail.
Despite their low cost, the AD8091/AD8092 provide excellent
overall performance and versatility. The output voltage swing
extends to within 25 mV of each rail, providing the maximum
output dynamic range with excellent overdrive recovery. This
makes the AD8091/AD8092 useful for video electronics, such
as cameras, video switchers, or any high speed portable equip-
ment. Low distortion and fast settling make them ideal for
active filter applications.
The AD8091/AD8092 offer a low power supply current and can
operate on a single 3 V power supply. These features are ideally
suited for portable and battery-powered applications where size
and power are critical.
The wide bandwidth and fast slew rate make these amplifiers
useful in many general-purpose, high speed applications where
dual power supplies of up to ±6 V and single supplies from +3
V to +12 V are needed.
This low cost performance is offered in an 8-lead SOIC
(AD8091/AD8092), a tiny SOT23-5 (AD8091), and an MSOP
(AD8092).
AD8091/AD8092
Rev. C | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Connection Diagrams...................................................................... 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 6
ESD Caution.................................................................................. 6
Maximum Power Dissipation ..................................................... 7
Typical Performance Characteristics ............................................. 8
Layout, Grounding, and Bypassing Considerations .................. 12
Power Supply Bypassing............................................................ 12
Grounding ................................................................................... 12
Input Capacitance ...................................................................... 12
Input-to-Output Coupling........................................................ 12
Driving Capacitive Loads .............................................................. 13
Overdrive Recovery ................................................................... 13
Active Filters ............................................................................... 13
Sync Stripper............................................................................... 14
Single-Supply Composite Video Line Driver ......................... 14
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 17
REVISION HISTORY
9/07—Rev. B to Rev. C
Changes to Applications Section .................................................... 1
Updated Outline Dimensions....................................................... 16
Changes to Ordering Guide .......................................................... 17
3/05—Rev. A to Rev. B
Changes to Format .............................................................Universal
Changes to Features.......................................................................... 1
Updated Outline Dimensions....................................................... 17
Changes to Ordering Guide .......................................................... 18
5/02–Rev. 0 to Rev. A
Edits to Product Description .......................................................... 1
Edit to TPC 6 .................................................................................... 7
Edits to TPCs 21–24....................................................................... 10
Edits to Figure 3.............................................................................. 11
2/02—Revision 0: Initial Version
AD8091/AD8092
Rev. C | Page 3 of 20
SPECIFICATIONS
TA = 25°C, VS = 5 V, RL = 2 kΩ to 2.5 V, unless otherwise noted.
Table 1.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth G = +1, VO = 0.2 V p-p 70 110 MHz
G = −1, +2, VO = 0.2 V p-p 50 MHz
Bandwidth for 0.1 dB Flatness G = +2, VO = 0.2 V p-p,
RL = 150 Ω to 2.5 V, RF = 806 Ω
20 MHz
Slew Rate G = −1, VO = 2 V step 100 145 V/μs
Full Power Response G = +1, VO = 2 V p-p 35 MHz
Settling Time to 0.1% G = −1, VO = 2 V step 50 ns
NOISE/DISTORTION PERFORMANCE
Total Harmonic Distortion (See Figure 11) fC = 5 MHz, VO = 2 V p-p, G = +2 −67 dB
Input Voltage Noise f = 10 kHz 16 nV/√Hz
Input Current Noise f = 10 kHz 850 fA/√Hz
Differential Gain Error (NTSC) G = +2, RL = 150 Ω to 2.5 V 0.09 %
R
L = 1 kΩ to 2.5 V 0.03 %
Differential Phase Error (NTSC) G = +2, RL = 150 Ω to 2.5 V 0.19 Degrees
R
L = 1 kΩ to 2.5 V 0.03 Degrees
Crosstalk f = 5 MHz, G = +2 −60 dB
DC PERFORMANCE
Input Offset Voltage 1.7 10 mV
T
MIN to TMAX 25 mV
Offset Drift 10 μV/°C
Input Bias Current 1.4 2.5 μA
T
MIN to TMAX 3.25 μA
Input Offset Current 0.1 0.75 μA
Open-Loop Gain RL = 2 kΩ to 2.5 V 86 98 dB
T
MIN to TMAX 96 dB
R
L = 150 Ω to 2.5 V 76 82 dB
T
MIN to TMAX 78 dB
INPUT CHARACTERISTICS
Input Resistance 290 kΩ
Input Capacitance 1.4 pF
Input Common-Mode Voltage Range −0.2 to +4 V
Common-Mode Rejection Ratio VCM = 0 V to 3.5 V 72 88 dB
OUTPUT CHARACTERISTICS
Output Voltage Swing RL = 10 kΩ to 2.5 V 0.015 to 4.985 V
R
L = 2 kΩ to 2.5 V 0.100 to 4.900 0.025 to 4.975 V
R
L = 150 Ω to 2.5 V 0.300 to 4.625 0.200 to 4.800 V
Output Current VOUT = 0.5 V to 4.5 V 45 mA
T
MIN to TMAX 45 mA
Short-Circuit Current Sourcing 80 mA
Sinking 130 mA
Capacitive Load Drive G = +1 50 pF
POWER SUPPLY
Operating Range 3 12 V
Quiescent Current/Amplifier 4.4 5 mA
Power Supply Rejection Ratio ΔVS = ±1 V 70 80 dB
OPERATING TEMPERATURE RANGE −40 +85 °C
AD8091/AD8092
Rev. C | Page 4 of 20
TA = 25°C, VS = +3 V, RL = 2 kΩ to +1.5 V, unless otherwise noted.
Table 2.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth G = +1, VO = 0.2 V p-p 70 110 MHz
G = −1, +2, VO = 0.2 V p-p 50 MHz
Bandwidth for 0.1 dB Flatness G = +2, VO = 0.2 V p-p,
RL = 150 Ω to 2.5 V, RF = 402 Ω
17 MHz
Slew Rate G = −1, VO = 2 V step 90 135 V/μs
Full Power Response G = +1, VO = 1 V p-p 65 MHz
Settling Time to 0.1% G = −1, VO = 2 V step 55 ns
NOISE/DISTORTION PERFORMANCE
Total Harmonic Distortion (see Figure 11) fC = 5 MHz, VO = 2 V p-p, G = −1,
RL = 100 Ω to 1.5 V
−47 dB
Input Voltage Noise f = 10 kHz 16 nV/√Hz
Input Current Noise f = 10 kHz 600 fA/√Hz
Differential Gain Error (NTSC) G = +2, VCM = 1 V
R
L = 150 Ω to 1.5 V 0.11 %
R
L = 1 kΩ to 1.5 V 0.09 %
Differential Phase Error (NTSC) G = +2, VCM = 1 V
R
L = 150 Ω to 1.5 V 0.24 Degrees
R
L = 1 kΩ to 1.5 V 0.10 Degrees
Crosstalk f = 5 MHz, G = +2 −60 dB
DC PERFORMANCE
Input Offset Voltage 1.6 10 mV
T
MIN to TMAX 25 mV
Offset Drift 10 μV/°C
Input Bias Current 1.3 2.6 μA
T
MIN to TMAX 3.25 μA
Input Offset Current 0.15 0.8 μA
Open-Loop Gain RL = 2 kΩ 80 96 dB
T
MIN to TMAX 94 dB
R
L = 150 Ω 74 82 dB
T
MIN to TMAX 76 dB
INPUT CHARACTERISTICS
Input Resistance 290 kΩ
Input Capacitance 1.4 pF
Input Common-Mode Voltage Range −0.2 to +2.0 V
Common-Mode Rejection Ratio VCM = 0 V to 1.5 V 72 88 dB
OUTPUT CHARACTERISTICS
Output Voltage Swing RL = 10 kΩ to 1.5 V 0.01 to 2.99 V
R
L = 2 kΩ to 1.5 V 0.075 to 2.9 0.02 to 2.98 V
R
L = 150 Ω to 1.5 V 0.20 to 2.75 0.125 to 2.875 V
Output Current VOUT = 0.5 V to 2.5 V 45 mA
T
MIN to TMAX 45 mA
Short Circuit Current Sourcing 60 mA
Sinking 90 mA
Capacitive Load Drive G = +1 45 pF
POWER SUPPLY
Operating Range 3 12 V
Quiescent Current/Amplifier 4.2 4.8 mA
Power Supply Rejection Ratio ΔVS = +0.5 V 68 80 dB
OPERATING TEMPERATURE RANGE −40 +85 °C
AD8091/AD8092
Rev. C | Page 5 of 20
TA = 25°C, VS = ±5 V, RL = 2 kΩ to ground, unless otherwise noted.
Table 3.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth G = +1, VO = 0.2 V p-p 70 110 MHz
G = −1, +2, VO = 0.2 V p-p 50 MHz
Bandwidth for 0.1 dB Flatness G = +2, VO = 0.2 V p-p,
RL = 150 Ω, RF = 1.1 kΩ
20 MHz
Slew Rate G = −1, VO = 2 V step 105 170 V/μs
Full Power Response G = +1, VO = 2 V p-p 40 MHz
Settling Time to 0.1% G = −1, VO = 2 V step 50 ns
NOISE/DISTORTION PERFORMANCE
Total Harmonic Distortion (see Figure 11) fC = 5 MHz, VO = 2 V p-p, G = +2 −71 dB
Input Voltage Noise f = 10 kHz 16 nV/√Hz
Input Current Noise f = 10 kHz 900 fA/√Hz
Differential Gain Error (NTSC) G = +2, RL = 150 Ω 0.02 %
R
L = 1 kΩ 0.02 %
Differential Phase Error (NTSC) G = +2, RL = 150 Ω 0.11 Degrees
R
L = 1 kΩ 0.02 Degrees
Crosstalk f = 5 MHz, G = +2 −60 dB
DC PERFORMANCE
Input Offset Voltage 1.8 11 mV
T
MIN to TMAX 27 mV
Offset Drift 10 μV/°C
Input Bias Current 1.4 2.6 μA
T
MIN to TMAX 3.5 μA
Input Offset Current 0.1 0.75 μA
Open-Loop Gain RL = 2 kΩ 88 96 dB
T
MIN to TMAX 96 dB
R
L = 150 Ω 78 82 dB
T
MIN to TMAX 80 dB
INPUT CHARACTERISTICS
Input Resistance 290 kΩ
Input Capacitance 1.4 pF
Input Common-Mode Voltage Range −5.2 to +4.0 V
Common-Mode Rejection Ratio VCM = −5 V to +3.5 V 72 88 dB
OUTPUT CHARACTERISTICS
Output Voltage Swing RL = 10 kΩ −4.98 to +4.98 V
R
L = 2 kΩ −4.85 to +4.85 −4.97 to +4.97 V
R
L = 150 Ω −4.45 to +4.30 −4.60 to +4.60 V
Output Current VOUT = −4.5 V to +4.5 V 45 mA
T
MIN to TMAX 45 mA
Short Circuit Current Sourcing 100 mA
Sinking 160 mA
Capacitive Load Drive G = +1 (AD8091/AD8092) 50 pF
POWER SUPPLY
Operating Range 3 12 V
Quiescent Current/Amplifier 4.8 5.5 mA
Power Supply Rejection Ratio ΔVS = ±1 V 68 80 dB
OPERATING TEMPERATURE RANGE −40 +85 °C
AD8091/AD8092
Rev. C | Page 6 of 20
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter Rating
Supply Voltage 12.6 V
Power Dissipation See Figure 4
Common-Mode Input Voltage ±VS
Differential Input Voltage ±2.5 V
Output Short-Circuit Duration See Figure 4
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +85°C
Lead Temperature (Soldering 10 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
AD8091/AD8092
Rev. C | Page 7 of 20
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8091/AD8092
package is limited by the associated rise in junction temperature
(TJ) on the die. The plastic encapsulating the die locally reaches
the junction temperature. At approximately 150°C, which is the
glass transition temperature, the plastic changes its properties.
Even temporarily exceeding this temperature limit may change
the stresses that the package exerts on the die, permanently
shifting the parametric performance of the AD8091/AD8092.
Exceeding a junction temperature of 175°C for an extended
period of time can result in changes in the silicon devices,
potentially causing failure.
The still-air thermal properties of the package (θJA), the ambient
temperature (TA), and the total power dissipated in the package
(PD) can be used to determine the junction temperature of the die.
The junction temperature can be calculated as
(
)
JA
D
A
JθPTT ×+=
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (VS) times the
quiescent current (IS). Assuming that the load (RL) is referenced
to midsupply, then the total drive power is VS/2 × IOUT, some of
which is dissipated in the package and some in the load
(VOUT × IOUT). The difference between the total drive power and
the load power is the drive power dissipated in the package.
(
)
powerloadpowerdrivetotalpowerquiescentPD−+=
()
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
−
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛×+×=
L
OUT
L
OUTS
SSD R
V
R
VV
IVP 2
2
RMS output voltages should be considered. If RL is referenced to
−VS, as in single-supply operation, then the total drive power is
VS × IOUT.
If the rms signal levels are indeterminate, then consider the
worst case when VOUT = VS/4 for RL to midsupply
()
2
4
L
S
SS
DR
V
IVP
⎟
⎠
⎞
⎜
⎝
⎛
+×=
In single-supply operation with RL referenced to −VS, the worst
case is VOUT = VS/2.
Airflow increases heat dissipation, effectively reducing θJA. Also,
more metal directly in contact with the package leads from
metal traces, through holes, ground, and power planes reduces
the θJA. Care must be taken to minimize parasitic capacitances
at the input leads of high speed op amps as discussed in the
Input Capacitance section.
Figure 4 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the SOIC-8
(125°C/W), SOT23-5 (180°C/W), and MSOP-8 (150°C/W) on a
JEDEC standard four-layer board.
2.0
0
0.5
1.0
1.5
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90
02859-004
AMBIENT TEMPERATURE (°C)
MAXIMUM POWER DISSIPATION (W)
TJ = 150°C
MSOP-8
SOIC-8
SOT23-5
Figure 4. Maximum Power Dissipation vs.
Temperature for a Four-Layer Board
AD8091/AD8092
Rev. C | Page 8 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
3
–7
–6
–5
–4
–3
–2
–1
0
1
2
0.1 1 10 100 500
02859-005
FREQUENCY (MHz)
NORMALIZED GAIN (dB)
VS = 5V
GAIN AS SHOWN
RFAS SHOWN
RL = 2kΩ
VO = 0.2V p-p
G = +1
RF = 0Ω
G = +5
RF = 2kΩ
G = +2
RF = 2kΩ
G = +10
RF = 2kΩ
Figure 5. Normalized Gain vs. Frequency; VS = +5 V
3
–7
–6
–5
–4
–3
–2
–1
0
1
2
0.1 1 10 100 500
02859-006
FREQUENCY (MHz)
GAIN (dB)
VSAS SHOWN
G = +1
RL = 2kΩ
VO = 0.2V p-p
VS = +3V VS = +5V
VS = ±5V
Figure 6. Gain vs. Frequency vs. Supply
3
–7
–6
–5
–4
–3
–2
–1
0
1
2
0.1 1 10 100 500
02859-007
FREQUENCY (MHz)
GAIN (dB)
VS = 5V
G = +1
RL = 2kΩ
VO = 0.2V p-p
TEMPERATURE AS SHOWN
–40°C
+85°C
+25°C
Figure 7. Gain vs. Frequency vs. Temperature
6.3
5.3
5.4
5.5
5.6
5.7
5.8
5.9
6.0
6.1
6.2
0.1 1 10 100
02859-008
FREQUENCY (MHz)
GAIN FLATNESS (dB)
VS = 5V
G = +2
RL = 150kΩ
RF = 806Ω
VO = 0.2V p-p
Figure 8. 0.1 dB Gain Flatness vs. Frequency; G = +2
9
–1
0
1
2
3
4
5
6
7
8
0.1 1 10 100 500
02859-009
FREQUENCY (MHz)
GAIN (dB)
VSAS SHOWN
G = +2
RL = 2kΩ
RF = 2kΩ
VOAS SHOWN
VS = +5V
VO = 2V p-p
VS = ±5V
VO = 4V p-p
Figure 9. Large Signal Frequency Response; G = +2
70
–20
–10
0
10
–180
–135
–90
–45
0
20
30
40
50
60
0.1 1 10 100 500
02859-010
FREQUENCY (MHz)
OPEN-LOOP GAIN (dB)
PHASE (Degrees)
PHASE
GAIN
50° PHASE
MARGIN
VS = 5V
RL = 2kΩ
Figure 10. Open-Loop Gain and Phase vs. Frequency
AD8091/AD8092
Rev. C | Page 9 of 20
–
20
–110
–100
–90
–80
–70
–60
–50
–40
–30
11
0
0.10
0 102030405060708090100
0 102030405060708090100
–0.06
0.10
0.05
0
–0.05
–0.10
–0.15
–0.20
–0.25
–0.04
–0.02
0
0.02
0.04
0.06
0.08
02859-014
MODULATING RAMP LEVEL (IRE)
DIFFERENTIAL
GAIN ERROR (%)
DIFFERENTIAL
PHASE ERROR (Degrees)
98765432
02859-011
FUNDAMENTAL FREQUENCY (MHz)
TOTAL HARMONIC DISTORTION (dBc)
V
O
= 2V p-p V
S
= 3V, G = –1
R
F
= 2kΩ, R
L
= 100Ω
V
S
= 5V, G = +2
R
F
= 2kΩ, R
L
= 100Ω
V
S
= 5V, G = +1
R
L
= 100Ω
V
S
= 5V, G = +2
R
F
= 2kΩ, R
L
= 2kΩ
V
S
= 5V, G = +1
R
L
= 2kΩ
Figure 11. Total Harmonic Distortion
–
30
–130
–120
–110
–100
–90
–80
–70
–60
–50
–40
05
.04.54.03.53.02.52.01.51.00.5
02859-012
OUTPUT VOLTAGE (V p-p)
WORST HARMONIC (dBc)
V
S
= 5V
R
L
= 2kΩ
G = +2
10MHz
5MHz
1MHz
Figure 12. Worst Harmonic vs. Output Voltage
5.0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0.1 50101
02859-013
FREQUENCY (MHz)
OUTPUT VOLTAGE SWING (THD £ 0.5%) (V p-p)
V
S
= 5V
G = –1
R
F
= 2kΩ
R
L
= 2kΩ
Figure 13. Low Distortion Rail-to-Rail Output Swing
NTSC SUBSCRIBER (3.58MHz) R
L
= 150Ω
R
L
= 1kΩ
R
L
= 1kΩ
R
L
= 150Ω
V
S
= 5, G = +2
R
F
= 2kΩ, R
L
AS SHOWN
V
S
= 5, G = +2
R
F
= 2kΩ, R
L
AS SHOWN
1000
1
10
100
10 10M1M100k10k1k100
02859-015
FREQUENCY (Hz)
VOLTAGE NOISE (nA Hz)
Figure 14. Differential Gain and Phase Errors
V
S
= 5V
Figure 15. Input Voltage Noise vs. Frequency
100
0.1
1
10
10 10M1M100k10k1k100
02859-016
FREQUENCY (Hz)
CURRENT NOISE (pA Hz)
V
S
= 5V
Figure 16. Input Current Noise vs. Frequency
AD8091/AD8092
Rev. C | Page 10 of 20
–
10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0.1 1 10 100 500
02859-017
FREQUENCY (MHz)
CROSSTALK (dB)
V
S
= 5V
R
F
= 2kΩ
R
L
= 2kΩ
V
O
= 2V p-p
Figure 17. AD8092 Crosstalk (Output-to-Output) vs. Frequency
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0.03 0.1 1 10 100 500
02859-018
FREQUENCY (MHz)
CMRR (dB)
V
S
= 5V
Figure 18. CMRR vs. Frequency
100.000
31.000
10.000
3.100
1.000
0.310
0.100
0.031
0.010
0.1 1 10 100 500
02859-019
FREQUENCY (MHz)
OUTPUT RESISTANCE (Ω)
V
S
= 5V
G = +1
Figure 19. Closed-Loop Output Resistance vs. Frequency
20
10
0
–10
–20
–30
–40
–50
–60
–70
–80
0.01 0.1 1 10 100 500
02859-020
FREQUENCY (MHz)
PSRR (dB)
V
S
= 5V
–PSRR
+PSRR
Figure 20. PSRR vs. Frequency
70
60
50
40
30
20
10
0
0.5 1.0 1.5 2.0
02859-021
INPUT STEPS (V p-p)
SETTLING TIME TO 0.1% (ns)
V
S
= 5V
G = –1
R
L
= 2kΩ
Figure 21. Settling Time vs. Input Step
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85
02859-022
LOAD CURRENT (mA)
OUTPUT SATURATION VOLTAGE (V)
V
S
= 5V V
OH
= +85°C
V
OH
= +25°C
V
OH
= –40°C V
OL
= +85°C
V
OL
= +25°C
V
OL
= –40°C
Figure 22. Output Saturation Voltage vs. Load Current
AD8091/AD8092
Rev. C | Page 11 of 20
2
.5
V
3
.5
V
1.5
V
02859-026
V
S
= 5V
G = +2
R
L
= 2kΩ
V
IN
= 1V p-p
100
90
80
70
60
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
02859-023
OUTPUT VOLTAGE (V)
OPEN-LOOP GAIN (dB)
R
L
= 2kΩ
R
L
= 150Ω
V
S
= 5V
Figure 26. Large Signal Step Response; VS = +5 V, G = +2
Figure 23. Open-Loop Gain vs. Output Voltage
1.50V
02859-024
20mV 20ns
V
IN
= 0.1V p-p
G = +1
R
L
= 2kΩ
V
S
= 3V
2.5V
5V
02859-027
V
S
= 5V
G = –1
R
F
= 2kΩ
R
L
= 2kΩ
1V 2µs
Figure 24. 100 mV Step Response; G = +1 Figure 27. Output Swing; G = −1, RL = 2 kΩ
1V
–1V
–2V
–3V
–4V
2V
3V
4V
02859-028
V
S
= ±5V
G = +1
R
L
= 2kΩ
1V 20ns
2.50V
2.60V
2.40V
02859-025
50mV 20ns
V
S
= 5V
G = +1
R
L
= 2kΩ
Figure 25. 200 mV Step Response; VS = +5 V, G = +1 Figure 28. Large Signal Step Response; VS = ±5 V, G = +1
AD8091/AD8092
Rev. C | Page 12 of 20
LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS
POWER SUPPLY BYPASSING
Power supply pins are actually inputs, and care must be taken so
that a noise-free stable dc voltage is applied. The purpose of
bypass capacitors is to create low impedances from the supply
to ground at all frequencies, thereby shunting or filtering a
majority of the noise.
Decoupling schemes are designed to minimize the bypassing
impedance at all frequencies with a parallel combination of
capacitors. Chip capacitors of 0.01 μF or 0.001 μF (X7R or
NPO) are critical and should be as close as possible to the
amplifier package. Larger chip capacitors, such as the 0.1 μF
capacitor, can be shared among a few closely spaced active
components in the same signal path. A 10 μF tantalum
capacitor is less critical for high frequency bypassing and, in
most cases, only one per board is needed at the supply inputs.
GROUNDING
A ground plane layer is important in densely packed PC boards
to spread the current-minimizing parasitic inductances.
However, an understanding of where the current flows in a
circuit is critical to implementing effective high speed circuit
design. The length of the current path is directly proportional to
the magnitude of parasitic inductances and thus the high
frequency impedance of the path. High speed currents in an
inductive ground return create an unwanted voltage noise.
The lengths of the high frequency bypass capacitor leads are
most critical. A parasitic inductance in the bypass grounding
works against the low impedance created by the bypass
capacitor. Place the ground leads of the bypass capacitors at the
same physical location. Because load currents flow from the
supplies as well, the ground for the load impedance should be at
the same physical location as the bypass capacitor grounds. For
the larger value capacitors, which are intended to be effective at
lower frequencies, the current return path distance is less
critical.
INPUT CAPACITANCE
Along with bypassing and ground, high speed amplifiers can
be sensitive to parasitic capacitance between the inputs and
ground. A few pF of capacitance reduces the input impedance
at high frequencies, in turn increasing the amplifier’s gain and
causing peaking of the frequency response or even oscillations,
if severe enough. It is recommended that the external passive
components, which are connected to the input pins, be placed
as close as possible to the inputs to avoid parasitic capacitance.
The ground and power planes must be kept at a distance of at
least 0.05 mm from the input pins on all layers of the board.
INPUT-TO-OUTPUT COUPLING
The input and output signal traces should not be parallel to
minimize capacitive coupling between the inputs and output
and to avoid any positive feedback.
AD8091/AD8092
Rev. C | Page 13 of 20
DRIVING CAPACITIVE LOADS
A highly capacitive load reacts with the output of the amplifiers,
causing a loss in phase margin and subsequent peaking or even
oscillation, as shown in Figure 29 and Figure 30. There are two
methods to effectively minimize its effect.
• Put a small value resistor in series with the output to isolate
the load capacitor from the amplifier’s output stage.
• Increase the phase margin with higher noise gains or by
adding a pole with a parallel resistor and capacitor from
−IN to the output.
8
–12
–10
–8
–6
–4
–2
0
2
4
6
0.1 500100110
02859-029
FREQUENCY (MHz)
GAIN (dB)
V
S
= 5V
G = +1
R
L
= 2kΩ
C
L
= 50pF
V
O
= 200mV p-p
Figure 29. Closed-Loop Frequency Response: CL = 50 pF
2.50V
100ns50mV
2.60V
2.45V
2.55V
2.40V
02859-030
V
S
= 5V
G = +1
R
L
= 2kΩ
C
L
= 50pF
Figure 30. 200 mV Step Response: CL = 50 pF
As the closed-loop gain is increased, the larger phase margin
allows for large capacitor loads with less peaking. Adding a low
value resistor in series with the load at lower gains has the same
effect. Figure 31 shows the effect of a series resistor for various
voltage gains. For large capacitive loads, the frequency response
of the amplifier is dominated by the series resistor and capaci-
tive load.
10000
1
10
100
1000
165234
02859-031
A
CL
(V/V)
CAPACITIVE LOAD (pF)
V
S
= 5V
£
30%
OVERSHOOT
R
S
= 3Ω
R
S
= 0Ω
R
G
R
F
R
S
C
L
V
OUT
50Ω
V
IN
100mV STEP
Figure 31. Capacitive Load Drive vs. Closed-Loop Gain
OVERDRIVE RECOVERY
Overdrive of an amplifier occurs when the output range and/or
input range is exceeded. The amplifier must recover from this
overdrive condition. The AD8091/AD8092 recover within 60 ns
from negative overdrive and within 45 ns from positive
overdrive, as shown in Figure 32.
02859-032
V/DIV AS SHOWN 100ns
INPUT 1V/DIV
OUTPUT 2V/DIV
V
S
= ±5V
G = +5
R
F
= 2kΩ
R
L
= 2kΩ
Figure 32. Overdrive Recovery
ACTIVE FILTERS
Active filters at higher frequencies require wider bandwidth op
amps to work effectively. Excessive phase shift produced by
lower frequency op amps can significantly impact active filter
performance.
Figure 33 shows an example of a 2 MHz biquad bandwidth filter
that uses three op amps. Such circuits are sometimes used in
medical ultrasound systems to lower the noise bandwidth of the
analog signal before A/D conversion. Note that the unused
amplifiers’ inputs should be tied to ground.
AD8091/AD8092
Rev. C | Page 14 of 20
02859-033
2
16
5
72
3
6
AD8092 AD8091
C2
50pF
C1
50pF
R5
2kΩ
R4
2kΩ
R6
1kΩ
R3
2kΩ
R2
2kΩ
R1
3kΩ
VOUT
3
AD8092
VIN
Figure 33. 2 MHz Biquad Band-Pass Filter
The frequency response of the circuit is shown in Figure 34.
0
–10
–20
–30
–40
10k 100k 1M 10M 100M
02859-034
FREQUENCY (Hz)
GAIN (dB)
Figure 34. Frequency Response of 2 MHz Band-Pass Biquad Filter
SYNC STRIPPER
Synchronizing pulses are sometimes carried on video signals so
as not to require a separate channel to carry the synchronizing
information. However, for some functions, such as A/D
conversion, it is not desirable to have the sync pulses on the
video signal. These pulses reduce the dynamic range of the
video signal and do not provide any useful information for such
a function.
A sync stripper removes the synchronizing pulses from a video
signal while passing all the useful video information. Figure 35
shows a practical single-supply circuit that uses only a single
AD8091. It is capable of directly driving a reverse terminated
video line.
The video signal plus sync is applied to the noninverting input
with the proper termination. The amplifier gain is set equal to 2
via the two 1 kΩ resistors in the feedback circuit. A bias voltage
must be applied to R1 for the input signal to have the sync
pulses stripped at the proper level.
The blanking level of the input video pulse is the desired place
to remove the sync information. The amplifier multiplies this
level by 2. This level must be at ground at the output in order
for the sync stripping action to take place. Because the gain of
the amplifier from the input of R1 to the output is −1, a voltage
equal to 2 × VBLANK must be applied to make the blanking level
come out at ground.
02859-035
AD8091
+
R2
1kΩ
R1
1kΩ
+0.8V
(OR 2 × VBLANK )
100Ω
TO A/D
3V OR 5V
3
24
6
7
10µF0.1µF
VBLANK
VIN
GROUND
+0.4V
V
IDEO WITH SYNC
GROUND
V
IDEO WITHOUT SYN
C
Figure 35. Sync Stripper
SINGLE-SUPPLY COMPOSITE VIDEO LINE DRIVER
Many composite video signals have their blanking level at
ground and have video information that is both positive and
negative. Such signals require dual-supply amplifiers to pass
them. However, by ac level-shifting, a single-supply amplifier
can be used to pass these signals. The following complications
may arise from such techniques.
Signals of bounded peak-to-peak amplitude that vary in duty
cycle require larger dynamic swing capacity than their
(bounded) peak-to-peak amplitude after they are ac-coupled.
As a worst case, the dynamic signal swing approaches twice the
peak-to-peak value. One of two conditions that define the
maximum dynamic swing requirements is a signal that is
mostly low but goes high with a duty cycle that is a small
fraction of a percent. The opposite condition defines the second
condition.
The worst case of composite video is not quite this demanding.
One bounding condition is a signal that is mostly black for an
entire frame but has a white (full amplitude) minimum width
spike at least once in a frame.
The other extreme is a full white video signal. The blanking
intervals and sync tips of such a signal have negative-going
excursions in compliance with the composite video
specifications. The combination of horizontal and vertical
blanking intervals limit such a signal to being at the highest
(white) level for a maximum of about 75% of the time.
As a result of the duty cycles between the two extremes, a 1 V
p-p composite video signal that is multiplied by a gain of 2
requires about 3.2 V p-p of dynamic voltage swing at the output
for an op amp to pass a composite video signal of arbitrary
varying duty cycle without distortion.
AD8091/AD8092
Rev. C | Page 15 of 20
Some circuits use a sync tip clamp to hold the sync tips at a
relatively constant level to lower the amount of dynamic signal
swing required. However, these circuits can have artifacts like
sync tip compression unless they are driven by a source with a
very low output impedance. The AD8091/AD8092 have
adequate signal swing when running on a single 5 V supply to
handle an ac-coupled composite video signal.
The feedback circuit provides unity gain for the dc biasing of
the input and provides a gain of 2 for any signals that are in the
video bandwidth. The output is ac-coupled and terminated to
drive the line.
The capacitor values provide minimum tilt or field time
distortion of the video signal. These values are required for
video that is considered to be studio or broadcast quality.
However, if a lower consumer grade of video, sometimes
referred to as consumer video, is all that is desired, the values
and the cost of the capacitors can be reduced by as much as a
factor of 5 with minimum visible degradation in the picture.
The input to the circuit shown in Figure 36 is a standard
composite (1 V p-p) video signal that has the blanking level at
ground. The input network level shifts the video signal by
means of ac coupling. The noninverting input of the op amp is
biased to half of the supply voltage.
02859-036
AD8091
5V
+
4.99kΩ
10µF
47µF
+
4.99kΩ
10kΩ
R
T
75Ω
R
G
1kΩ
R
F
1kΩ
R
BT
75Ω
R
L
75Ω
V
OU
T
C
OMPOSITE
VIDEO IN
+
220µF
0.1µF
3
24
6
7
1000µF
0.1µF 10µF
+
Figure 36. Single-Supply Composite Video Line Driver
AD8091/AD8092
Rev. C | Page 16 of 20
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-A A
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 37. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
COMPLIANT TO JEDEC STANDARDS MO-187-AA
0.80
0.60
0.40
8°
0°
4
8
1
5
PIN 1
0.65 BSC
SEATING
PLANE
0.38
0.22
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.08
3.20
3.00
2.80
5.15
4.90
4.65
0.15
0.00
0.95
0.85
0.75
Figure 38. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
PIN 1
1.60 BSC 2.80 BSC
1.90
BSC
0.95 BSC
5
123
4
0.22
0.08
10°
5°
0°
0.50
0.30
0.15 MAX SEATING
PLANE
1.45 MAX
1.30
1.15
0.90
2.90 BSC
0.60
0.45
0.30
COMPLIANT TO JEDEC STANDARDS MO-178-A A
Figure 39. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
AD8091/AD8092
Rev. C | Page 17 of 20
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
AD8091AR −40°C to +85°C 8-Lead SOIC R-8
AD8091AR-REEL −40°C to +85°C 8-Lead SOIC, 13” Tape and Reel R-8
AD8091AR-REEL7 −40°C to +85°C 8-Lead SOIC, 7” Tape and Reel R-8
AD8091ARZ1−40°C to +85°C 8-Lead SOIC R-8
AD8091ARZ-REEL1−40°C to +85°C 8-Lead SOIC, 13” Tape and Reel R-8
AD8091ARZ-REEL71−40°C to +85°C 8-Lead SOIC, 7” Tape and Reel R-8
AD8091ART-R2 −40°C to +85°C 5-Lead SOT-23 RJ-5 HVA
AD8091ART-REEL −40°C to +85°C 5-Lead SOT-23, 13” Tape and Reel RJ-5 HVA
AD8091ART-REEL7 −40°C to +85°C 5-Lead SOT-23, 7” Tape and Reel RJ-5 HVA
AD8091ARTZ-R21−40°C to +85°C 5-Lead SOT-23 RJ-5 HVA#
AD8091ARTZ-R71−40°C to +85°C 5-Lead SOT-23, 7” Tape and Reel RJ-5 HVA#
AD8091ARTZ-RL1−40°C to +85°C 5-Lead SOT-23, 13” Tape and Reel RJ-5 HVA#
AD8092AR −40°C to +85°C 8-Lead SOIC R-8
AD8092AR-REEL −40°C to +85°C 8-Lead SOIC, 13” Tape and Reel R-8
AD8092AR-REEL7 −40°C to +85°C 8-Lead SOIC, 7” Tape and Reel R-8
AD8092ARZ1−40°C to +85°C 8-Lead SOIC R-8
AD8092ARZ-REEL1−40°C to +85°C 8-Lead SOIC, 13” Tape and Reel R-8
AD8092ARZ-REEL71−40°C to +85°C 8-Lead SOIC, 7” Tape and Reel R-8
AD8092ARM −40°C to +85°C 8-Lead MSOP RM-8 HWA
AD8092ARM-REEL −40°C to +85°C 8-Lead MSOP, 13" Tape and Reel RM-8 HWA
AD8092ARM-REEL7 −40°C to +85°C 8-Lead MSOP, 7" Tape and Reel RM-8 HWA
AD8092ARMZ1−40°C to +85°C 8-Lead MSOP RM-8 HWA#
AD8092ARMZ-REEL1−40°C to +85°C 8-Lead MSOP, 13" Tape and Reel RM-8 HWA#
AD8092ARMZ-REEL71−40°C to +85°C 8-Lead MSOP, 7" Tape and Reel RM-8 HWA#
1 Z = RoHS Compliant Part. # denotes lead-free, may be top or bottom marked.
AD8091/AD8092
Rev. C | Page 18 of 20
NOTES
AD8091/AD8092
Rev. C | Page 19 of 20
NOTES
AD8091/AD8092
Rev. C | Page 20 of 20
NOTES
©2002–2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02859-0-9/07(C)
