IRLZ44NS/LPbF
HEXFET® Power MOSFET
PD - 95156
lAdvanced Process Technology
lSurface Mount (IRLZ44NS)
lLow-profile through-hole (IRLZ44NL)
l175°C Operating Temperature
lFast Switching
lFully Avalanche Rated
Parameter Typ. Max. Units
RθJC Junction-to-Case 1.4
RθJA Junction-to-Ambient ( PCB Mounted,steady-state)** 40
Thermal Resistance
°C/W
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V47
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V33 A
IDM Pulsed Drain Current 160
PD @TA = 25°C Power Dissipation 3.8 W
PD @TC = 25°C Power Dissipation 110 W
Linear Derating Factor 0.71 W/°C
VGS Gate-to-Source Voltage ±16 V
EAS Single Pulse Avalanche Energy 210 mJ
IAR Avalanche Current25 A
EAR Repetitive Avalanche Energy11 mJ
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
°C
Absolute Maximum Ratings
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
The through-hole version (IRLZ44NL) is available for low-
profile applications.
Description
VDSS = 55V
RDS(on) = 0.022Ω
ID = 47A
2
D Pak
TO-262
S
D
G
4/21/04
lLogic-Level Gate Drive
lLead-Free
IRLZ44NS/LPbF
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55 V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient 0.070 V/°C Reference to 25°C, ID = 1mA
0.022 VGS = 10V, ID = 25A
0.025 ΩVGS = 5.0V, ID = 25A
0.035 VGS = 4.0V, ID = 21A
VGS(th) Gate Threshold Voltage 1.0 2.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 21 S VDS = 25V, ID = 25A
25 VDS = 55V, VGS = 0V
250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage 100 nA VGS = 16V
Gate-to-Source Reverse Leakage -100 VGS = -16V
QgTotal Gate Charge 48 ID = 25A
Qgs Gate-to-Source Charge 8.6 nC VDS = 44V
Qgd Gate-to-Drain ("Miller") Charge 25 VGS = 5.0V, See Fig. 6 and 13
td(on) Turn-On Delay Time 11 VDD = 28V
trRise Time 84 ID = 25A
td(off) Turn-Off Delay Time 26 RG = 3.4Ω, VGS = 5.0V
tfFall Time 15 RD = 1.1Ω, See Fig. 10
Between lead,
and center of die contact
Ciss Input Capacitance 1700 VGS = 0V
Coss Output Capacitance 400 pF VDS = 25V
Crss Reverse Transfer Capacitance 150 = 1.0MHz, See Fig. 5
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
nH
IGSS
RDS(on) Static Drain-to-Source On-Resistance
LSInternal Source Inductance 7.5
ns
IDSS Drain-to-Source Leakage Current µA
Parameter Min. Typ. Max. Units Conditions
I
SContinuous Source Current MOSFET symbol
(Body Diode) showing the
ISM Pulsed Source Current integral reverse
(Body Diode) p-n junction diode.
VSD Diode Forward Voltage 1.3 V TJ = 25°C, IS = 25A, VGS = 0V
trr Reverse Recovery Time 80 120 ns TJ = 25°C, IF = 25A
Qrr Reverse Recovery Charge 210 320 nC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Source-Drain Ratings and Characteristics
S
D
G
A
47
160
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Notes:
Uses IRLZ44N data and test conditions
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
ISD ≤ 25A, di/dt ≤ 270A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
VDD = 25V, starting TJ = 25°C, L =470µH
RG = 25Ω, IAS = 25A. (See Figure 12)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
IRLZ44NS/LPbF
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics
1
10
100
1000
0.1 1 10 100
I , Drain-to-Source Current (A)
D
V , Drain-to-Source Voltage (V)
DS
A
20µs PULSE WIDTH
T = 25°C
J
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
2.5V
1
10
100
1000
0.1 1 10 100
I , Drain-to-Source Current (A)
D
V , Drain-to-Source Voltage (V)
DS
A
20µs PULSE WIDTH
T = 175°C
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
2.5V
J
1
10
100
1000
2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0
T = 25°C
J
GS
V , Gate-to-Source Voltage (V)
D
I , Drain-to-Source Current (A)
T = 175°C
J
A
V = 25V
20µs PULSE WIDTH
DS
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
J
T , Junction Temperature (°C)
R , Drain-to-Source On Resistance
DS(on)
(Normalized)
V = 10V
GS
A
I = 41A
D
IRLZ44NS/LPbF
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
0
400
800
1200
1600
2000
2400
2800
1 10 100
C, Capacitance (pF)
DS
V , Drain-to-Source Voltage (V)
A
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
0
3
6
9
12
15
0 10203040506070
Q , Total Gate Charge (nC)
G
V , Gate-to-Source Voltage (V)
GS
A
FOR TEST CIRCUIT
SEE FIGURE 13
V = 44V
V = 28V
I = 25A
DS
DS
D
10
100
1000
0.4 0.8 1.2 1.6 2.0 2.4
T = 25°C
J
V = 0V
GS
V , Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
A
T = 175°C
J
1
10
100
1000
1 10 100
V , Drain-to-Source Voltage (V)
DS
I , Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY R
D
DS(on)
10µs
100µs
1ms
10ms
A
T = 25°C
T = 175°C
Single Pulse
C
J
IRLZ44NS/LPbF
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10a. Switching Time Test Circuit
VDS
90%
10%
VGS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
5.0V
+
-
VDD
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
25 50 75 100 125 150 175
0
10
20
30
40
50
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
IRLZ44NS/LPbF
Fig 12a. Unclamped Inductive Test Circuit
Fig 12b. Unclamped Inductive Waveforms
V
DS
L
D.U.T.
V
DD
I
AS
t
p
0.01Ω
R
G
+
-
tp
VDS
IAS
VDD
V(BR)DSS
5.0 V
QG
QGS QGD
VG
Charge
Fig 13a. Basic Gate Charge Waveform
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 13b. Gate Charge Test Circuit
5.0 V
0
100
200
300
400
500
25 50 75 100 125 150 175
J
E , Single Pulse Avalanche Energy (mJ)
AS
A
Starting T , Junction Temperature (°C)
I
TOP 10A
17A
BOTTOM 25A
V = 25V
D
DD
IRLZ44NS/LPbF
Peak Diode Recovery dv/dt Test Circuit
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
VGS=10V
VDD
ISD
Driver Gate Drive
D.U.T. ISD Waveform
D.U.T. VDS Waveform
Inductor Curent
D = P. W .
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFETS
* V
GS = 5V for Logic Level Devices
RG
VDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
*
IRLZ44NS/LPbF
N ote: "P " in as s embly line
pos ition indicates "L ead-F ree"
F530S
T H IS IS AN IR F 530S WIT H
LOT CODE 8024
AS S EMB LED ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
AS S E MB L Y
LOT CODE
IN T E R N AT ION AL
RECTIFIER
LOGO
PART NUMBER
DATE CODE
YEAR 0 = 2000
WEEK 02
LINE L
OR
F 530S
A = ASSEMBLY SITE CODE
WEEK 02
P = DES IGNATE S LEAD-FR EE
PRODUCT (OPTIONAL)
RECTIFIER
IN T E R N AT IO N AL
LOGO
LOT CODE
AS S E M B L Y
YEAR 0 = 2000
DATE CODE
PART NUMBER
D2Pak Part Marking Information (Lead-Free)
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
IRLZ44NS/LPbF
AS S E MB L Y
LOT CODE
RECTIFIER
INTE RNATIONAL
AS SEMBLE D ON WW 19, 1997
Note: "P" in as s embly line
pos i ti on indicates "L ead-F ree"
IN THE ASSEMBLY LINE "C" LOGO
THIS IS AN IRL3103L
LOT CODE 1789
E XAMP L E :
LINE C
DATE CODE
WEEK 19
YEAR 7 = 1997
PART NUMBE R
PART NUMBER
LOGO
LOT CODE
ASSEMBLY
INTERNATIONAL
RECTIFIER
PRODUCT (OPTIONAL)
P = DES IGNAT ES LE AD-FREE
A = ASSEMBLY SITE CODE
WE E K 19
YEAR 7 = 1997
DAT E CODE
OR
TO-262 Part Marking Information
TO-262 Package Outline
IGBT
1- GATE
2- COLLECTOR
3- EMITTER
IRLZ44NS/LPbF
3
4
4
TRR
FEED DIRECTION
1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
TRL
FEED DIRECTION
10.90 (.429)
10.70 (.421)
16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.609)
15.22 (.601)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0145)
0.342 (.0135)
1.60 (.063)
1.50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
27.40 (1.079)
23.90 (.941)
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
D2Pak Tape & Reel Infomation
Dimensions are shown in millimeters (inches)
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.04/04
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
