UCC25705, UCC25706, UCC35705, UCC35706
HIGH-SPEED VOLTAGE MODE PULSE WIDTH MODULATOR
SLUS473B -- NOVEMBER 1999 -- REVISED OCTOBER 2010
1
www.ti.com
DGreater Than 4-MHz Operation
DIntegrated Oscillator / Voltage Feed Forward
Compensation
D>4:1 Input Voltage Range
D25-ns Current Limit Delay
DProgrammable Maximum Duty Cycle Clamp
DOptocoupler Interface
D50-μA Start-Up Current
D4.2-mA Operating Current @ 1 MHz
DSmallest Footprint of the 8-pin MSOP
Package Minimizes Board Area and Height
description
The UCC35705 and UCC35706 devices are 8-pin voltage mode primary side controllers with fast over-current
protection. These devices are used as core high-speed building blocks in high performance isolated and non-isolated
power converters.
UCC35705/UCC35706 devices feature a high speed oscillator with integrated feed-forward compensation for
improved converter performance. A typical current sense to output delay time of 25 ns provides fast response to
overload conditions. The IC also provides an accurate programmable maximum duty cycle clamp for increased
protection which can also be disabled for the oscillator to run at maximum possible duty cycle.
Two UVLO options are offered. The UCC35705 with lower turn-on voltage is intended for dc-to-dc converters while
the higher turn-on voltage and the wider UVLO range of the UCC35706 is better suited for offline applications.
The UCC35705/UCC35706 family is offered in 8-pin MSOP (DGK), SOIC (D) and PDIP (P) packages.
typical application schematic
UDG-99181
VDD
OUT
GND
RC
ILIM
VFF
DISCH
UCC35705/6
+
--
VOUT
+
VIN
SOFT
START
CIRCUIT
4
5
3
6
8
7
1
TPS2829
--
FB 2
MODE = 1
FET DRIVER
Copyright ©2001 -- 2010, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
8
7
6
5
ILIM
FB
VFF
DISCH
VDD
OUT
GND
RC
D, OR P PACKAGE
(TOP VIEW)
ILIM
2
1
4
3
7
8
5
6
FB
VFF
DISCH
VDD
OUT
GND
RC
DGK PACKAGE
(TOP VIEW)
UCC25705, UCC25706, UCC35705, UCC35706
HIGH-SPEED VOLTAGE MODE PULSE WIDTH MODULATOR
SLUS473B -- NOVEMBER 1999 -- REVISED OCTOBER 2010
2www.ti.com
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†}
Supply voltage 15 V............................................................................
Input voltage (VFF,RC,ILIM) 7V.................................................................
Input voltage (FB) 15 V.........................................................................
Input current (DISCH) 1mA......................................................................
Output current (OUT) dc ±20 mA.................................................................
Storage temperature, Tstg –65°C to 150°C.........................................................
Junction temperature, TJ–55°C to 150°C.........................................................
Lead temperature (soldering, 10 sec.) 300°C.......................................................
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡All voltages are with respect to GND. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of the Power
Supply Control Data Book (TI Literature Number SLUD003) for thermal limitations and considerations of packages.
AVAILABLE OPTIONS
Packaged Devices
TA=T
JUVLO Option SOIC-8
Small Outline (D)†PDIP-8
Plastic Dip (P)
MSOP-8
Small Outline
(DGK)†
-
-
4
0
°
C
t
o
8
5
°
C
8.8V/8V UCC25705D UCC25705P UCC25705DGK
-- 4
0
°
C
to
8
5
°
C
12V/8V UCC25706D UCC25706P UCC25706DGK
0
°
C
t
o
7
0
°
C
8.8V/8V UCC35705D UCC35705P UCC35705DGK
0
°
C
to 7
0
°
C
12V/8V UCC35706D UCC35706P UCC35706DGK
†D (SOIC--8) and DGK (MSOP--8) packages are available taped and reeled. Add R suffix to device type (e.g.
UCC35705DR) to order quantities of 2500 devices per reel for SOIC-8 and 2000 devices per reel for the MSOP-8.
electrical characteristics, VDD =11V,V
IN =30V,R
T=47k,R
DISCH = 400 k, RFF =14k,C
T= 220 pF,
CVDD =0.1μF, and no load on the outputs, 0°C≤TA≤70°C for the UCC3570x and --40°C≤TA≤85°C
for the UCC2570x, TA=T
J, (unless otherwise specified)
UVLO section (UCCx5705)
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Start threshold 8.0 8.8 9.6 V
Stop threshold 7.4 8.2 9.0 V
Hysteresis 0.3 0.6 1.0 V
UVLO section (UCCx5706)
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Start threshold 11.2 12.0 12.8 V
Stop threshold 7.2 8.0 8.8 V
Hysteresis 3.5 4.0 4.5 V
supply current section
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Start-up current VDD =UVLOstart–1V,V
DD comparator off 30 90 μA
IDD active VDD comparator on, oscillator running at 1 MHz 4.2 5.0 mA
UCC25705, UCC25706, UCC35705, UCC35706
HIGH-SPEED VOLTAGE MODE PULSE WIDTH MODULATOR
SLUS473B -- NOVEMBER 1999 -- REVISED OCTOBER 2010
3
www.ti.com
electrical characteristics, VDD =11V,V
IN =30V,R
T=47k,R
DISCH = 400 k, RFF =14k,C
T= 220 pF,
CVDD =0.1μF, and no load on the outputs, 0°C≤TA≤70°C for the UCC3570x and --40°C≤TA≤85°C
for the UCC2570x, TA=T
J, (unless otherwise specified)
line sense section
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Low line comparator threshold 0.95 1.00 1.05 V
Input bias current (VFF) –100 100 nA
oscillator section
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Frequency VFF = 1.2 V to 4.8 V 0.9 1.0 1.1 MHz
C
T
p
e
a
k
v
o
l
t
a
g
e
VFF = 1.2 V, See Note 1 1.2 V
CT peak voltage VFF = 4.8 V, See Note 1 4.8 V
CT valley voltage SeeNote1 0 V
NOTE 1: Ensured by design. Not production tested.
current limit section
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Input bias current 0.2 –0.2 –1 μA
Current limit threshold 180 200 220 mV
Propagation delay, ILIM to OUT 50 mV overdrive 25 35 ns
pulse width modulator section
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
FB input impedance VFB =3V 30 50 90 kΩ
Minimum duty cycle VFB <2V 0 %
M
a
i
m
m
d
t
c
c
l
e
VFB =V
DD,F
OSC =1MHz 70 75 80 %
Maximum duty cycle VDISCH =0V, F
OSC =1MHz 93 %
PWM gain VFF = 2.5 V, MODE = 1 12 %/V
Propagation delay, PWM to OUT 65 120 ns
output section
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
VOH IOUT =–5mA, V
DD – output 0.3 0.6 V
VOL IOUT =5mA 0.15 0.4 V
Rise time CLOAD =50pF 10 25 ns
Fall time CLOAD =50pF 10 25 ns
UCC25705, UCC25706, UCC35705, UCC35706
HIGH-SPEED VOLTAGE MODE PULSE WIDTH MODULATOR
SLUS473B -- NOVEMBER 1999 -- REVISED OCTOBER 2010
4www.ti.com
pin descriptions
DISCH: A resistor to VIN sets the oscillator discharge current programming a maximum duty cycle. When grounded,
an internal comparator switches the oscillator to a quick discharge mode. A small 100-pF capacitor between DISCH
and GND may reduce oscillator jitter without impacting feed-forward performance. IDISCH must be between 25 μA
and 250 μA over the entire VIN range.
FB: Input to the PWM comparator. This pin is intended to interface with an optocoupler. Input impedance is 50-kΩ
typical.
GND: Ground return pin.
ILIM: Provides a pulse-by-pulse current limit by terminating the PWM pulse when the input is above 200 mV. This
provides a high speed (25 ns typical) path to reset the PWM latch, allowing for a pulse-by-pulse current limit.
OUT: The output is intended to drive an external FET driver or other high impedance circuits, but is not intended to
directly drive a power MOSFET. This improves the controller’s noise immunity. The output resistance of the PWM
controller, typically 60 Ωpull-up and 30 Ωpull-down, will result in excessive rise and fall times if a power MOSFET
is directly driven at the speeds for which the UCC35705/6 is optimized.
RC: The oscillator can be configured to provide a maximum duty cycle clamp. In this mode the on--time is set by RT
and CT, while the off-time is set by RDISCH and CT. Since the voltage ramp on CT is proportional to VIN, feed-forward
action is obtained. Since the peak oscillator voltage is also proportional to VIN, constant frequency operation is
maintained over the full power supply input range. When the DISCH pin is grounded, the duty cycle clamp is disabled.
The RC pin then provides a low impedance path to ground CT during the off time.
VDD: Power supply pin. This pin should be bypassed with a 0.1-μF capacitor for proper operation. The undervoltage
lockout function of the UCC35705/6 allows for a low current startup mode and ensures that all circuits become active
in a known state. The UVLO thresholds on the UCC35705 are appropriate for a dc-to-dc converter application. The
wider UVLO hysteresis of the UCC35706 (typically 4 V) is optimized for a bootstrap startup mode from a high
impedance source.
VFF: The feed-forward pin provides the controller with a voltage proportional to the power supply input voltage. When
the oscillator is providing a duty cycle clamp, a current of 2 ×IDISCH is sourced from the VFF pin. A single resistor
RFF between VFF and GND then set VFF to:
VFF ≈VIN ×2×RFF
2×RFF +RDISCH
When the DISCH pin is grounded and the duty cycle clamp is not used, the internal current source is disabled and
a resistor divider from VIN is used to set VFF. In either case, when the voltage on VFF is less than 1.0 V, both the
output and oscillator are disabled.
UCC25705, UCC25706, UCC35705, UCC35706
HIGH-SPEED VOLTAGE MODE PULSE WIDTH MODULATOR
SLUS473B -- NOVEMBER 1999 -- REVISED OCTOBER 2010
5
www.ti.com
pin descriptions (continued)
7
2
58
OUT
VDD
6GND
SQ
Q
RD
RD
RD
1ILIM
200 mV
CURRENT LIMIT
1pF20 kΩ
30 kΩ
+
0.7 V PWM
SQ
QRD
CLK
PWM
LATCH
100 mV
2*I(MODE=1)
0(MODE=0)
LOW LINE
1.0 V
30 * I (MODE=1)
80 Ω(MODE = 0)
I
RC
VFF
FB
3
DISCH 4
50 mV
VDD
MODE
UCC35705 (8.8 V/8 V)
UCC35706 (12 V/8 V)
UVLO
+
--
+
--
+
--
+
--
+
--
+
--
Figure 1. Block Diagram
FUNCTIONAL DESCRIPTION
oscillator and PWM
The oscillator can be programmed to provide a duty cycle clamp or be configured to run at the maximum possible
duty cycle.
The PWM latch is set during the oscillator discharge and is reset by the PWM comparator when the CTwaveform
is greater than the feedback voltage. The voltage at the FB pin is attenuated before it is applied to the PWM
comparator. The oscillator ramp is shifted by approximately 0.65-V at room temperature at the PWM comparator. The
offset has a temperature coefficient of approximately --2 mV/°C.
The ILIM comparator adds a pulse by pulse current limit by resetting the PWM latch when VILIM > 200 mV. The PWM
latch is also reset by a low line condition (VFF <1.0 V).
All reset conditions are dominant; asserting any output will force a zero duty cycle output.
oscillator with duty cycle clamp (MODE = 1)
The timing capacitor CT is charged from ground to VFF through RT. The discharge path is through an on-chip current
sink that has a value of 30 ×IDISCH, where IDISCH is the current through the external resistor RDISCH. Since the
charge and discharge currents are both proportional to VIN, their ratio, and the maximum duty cycle remains constant
as VIN varies.
UCC25705, UCC25706, UCC35705, UCC35706
HIGH-SPEED VOLTAGE MODE PULSE WIDTH MODULATOR
SLUS473B -- NOVEMBER 1999 -- REVISED OCTOBER 2010
6www.ti.com
FUNCTIONAL DESCRIPTION
45
RC DISCH
3
VFF
RFF
2*I
DISCH
RDISCH
RT
CT
VIN
30 * I DISCH
VDD
IDISCH
Figure 2. Duty Cycle Clamp (MODE = 1)
The on-time is approximately:
TON =∝ × RT×CTwhere ∝= VFF
VIN ≈2×RFF
RDISCH
Theoff-timeis:
TOFF =∝ × CT×RT×RDISCH
30 ×RT−RDISCH
The frequency is:
f=1
∝×RT×CT×1
1+RDISCH
30×RT−RDISCH
The maximum duty cycle is:
Duty Cycle =TON
TON +TOFF =1−RDISCH
30 ×RT
UCC25705, UCC25706, UCC35705, UCC35706
HIGH-SPEED VOLTAGE MODE PULSE WIDTH MODULATOR
SLUS473B -- NOVEMBER 1999 -- REVISED OCTOBER 2010
7
www.ti.com
FUNCTIONAL DESCRIPTION
component selection for oscillator with duty cycle clamp (MODE = 1)
For a power converter with the following specifications:
DVIN(min) =18V
DVIN(max) =75V
DVIN(shutdown) =15V
DFOSC =1MHz
DDMAX =0.78atV
IN(min)
In this mode, the on-time is approximately:
DTON(max) = 780 ns
DTOFF(min) = 220 ns
DVFF(min) =18
15 =1.20V
(1) Pick CT= 220 pF.
(2) Calculate RT
.
RT=
VINmin×TON(max)
VFFmin×CT
RT= 51.1 kΩ
(3) RDISCH
RDISCH =30 ×RT
1+⎪
⎪
⎪
⎪
⎧
⎩
VFF(min)
VIN(min)×RT×CT
TOFF(min)
⎪
⎪
⎪
⎪
⎫
⎭
RDISCH = 383 kΩ.
IDISCH must be between 25 μA and 250 μA over the entire VIN range.
With the calculated values, IDISCH ranges from 44 μA to 193 μA, within the allowable range. If IDISCH is too high, CT
must be decreased.
(4) RFF
RFF =VFF(min) ×RDISCH
2×VIN(min) −1
The nearest 1% standard value to the calculated value is 13.7 k.
UCC25705, UCC25706, UCC35705, UCC35706
HIGH-SPEED VOLTAGE MODE PULSE WIDTH MODULATOR
SLUS473B -- NOVEMBER 1999 -- REVISED OCTOBER 2010
8www.ti.com
FUNCTIONAL DESCRIPTION
oscillator without duty cycle clamp (MODE = 0)
In this mode, the timing capacitor is discharged through a low impedance directly to ground. The DISCH pin is
externally grounded. A comparator connected to DISCH senses the ground connection and disables both the
discharge current source and VFF current source. A resistor divider is now required to set VFF.
45
RC DISCH
3
VFF
RT
CT
VIN
Figure 3. Ocsillator Without Clamp (MODE = 0)
In this mode, the on-time is approximately:
TON =∝ × RT×CTwhere ∝= VFF
VIN
Theoff-timeis:
TOFF ≈75 ns
The frequency is:
f=1
∝×RT×CT+75 ns
UCC25705, UCC25706, UCC35705, UCC35706
HIGH-SPEED VOLTAGE MODE PULSE WIDTH MODULATOR
SLUS473B -- NOVEMBER 1999 -- REVISED OCTOBER 2010
9
www.ti.com
FUNCTIONAL DESCRIPTION
component selection for oscillator without duty cycle clamp (MODE = 0)
For a power converter with the following specifications:
DVIN(min) =18V
DVIN(max) =75V
DVIN(shutdown) =15V
DFOSC =1MHz
With these specifications,
VFF(min) =18
15 =1.2 V
(1) Pick CT= 220 pF
(2) Calculate RT
.
RT=
VIN(min)
VFF(min) ×1
FOSC −75 ns
CT
TYPICAL CHARACTERISTICS
Figure 4
--50 --25 0 25 50 75 100 125
Temperature
8.0
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
UCC35705 UVLO THRESHOLDS
vs
TEMPERATURE
°C
UVLO -- Thresholds -- V
Figure 5
--50 --25 0 25 50 75 100 125
Temperature
7
8
9
10
11
12
13
°C
UVLO -- Thresholds -- V
UCC35706 UVLO THRESHOLDS
vs
TEMPERATURE
UCC25705, UCC25706, UCC35705, UCC35706
HIGH-SPEED VOLTAGE MODE PULSE WIDTH MODULATOR
SLUS473B -- NOVEMBER 1999 -- REVISED OCTOBER 2010
10 www.ti.com
TYPICAL CHARACTERISTICS
Figure 6
--50 --25 0 25 50 75 100 125
Temperature
3.8
4.0
4.2
4.3
4.5
4.7
4.8
3.9
4.1
4.4
4.6
°C
IDD -- m A
OPERATING CURRENT (AT 1mHz)
vs
TEMPERATURE
Figure 7
--50 --25 0 25 50 75 100 125
Temperature
0.65
0.97
0.99
1.00
1.02
1.04
1.05
0.96
0.98
1.01
1.03
°C
Low-Line Threshold -- V
LOW-LINE THRESHOLD
vs.
TEMPERATURE
Figure 8
--50 --25 25 50 75 100 125
Temperature
0.90
1.00
1.10
0.95
1.05
Oscillator Frequency -- MHz
OSCILL
A
TOR FREQUENC
Y
vs
TEMPERATURE
°C
0
Figure 9
--50 --25 0 25 50 75 100 125
Temperature
68
76
82
70
78
72
74
80
°C
Programmable Maximum Duty Cycle --%
PROGR
A
MM
A
BLE M
A
XIMUM
DUTY CYCLE
vs
TEMPERATURE
UCC25705, UCC25706, UCC35705, UCC35706
HIGH-SPEED VOLTAGE MODE PULSE WIDTH MODULATOR
SLUS473B -- NOVEMBER 1999 -- REVISED OCTOBER 2010
11
www.ti.com
TYPICAL CHARACTERISTICS
Figure 10
--50 --25 0 25 50 75 100 125
Temperature
180
200
220
185
205
190
195
210
215
°C
Current-Limit Threshold --mV
CURRENT-LIMIT THRESHOLD
vs
TEMPERATURE
Figure 11
--50 --25 0 25 50 75 100 125
Temperature
15
25
35
17
29
19
23
31
33
21
27
°C
Current-Limit Prop Delay --ns
CURRENT-LIMIT PROP DELAY
vs
TEMPERATURE
Revision History
Revision SLUS473A, March 2001 to SLUS473B:
DModified “TOFF” and “f” equation on page 6.
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
UCC25705D ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 25705
UCC25705DGK ACTIVE VSSOP DGK 8 80 Green (RoHS
& no Sb/Br) CU NIPDAUAG Level-2-260C-1 YEAR -40 to 85 25705
UCC25705DGKTR ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAG Level-2-260C-1 YEAR -40 to 85 25705
UCC25705DGKTRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAG Level-2-260C-1 YEAR -40 to 85 25705
UCC25705DTR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 25705
UCC25705P ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 UCC25705P
UCC25705PG4 ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 UCC25705P
UCC25706D ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 25706
UCC25706DGK ACTIVE VSSOP DGK 8 80 Green (RoHS
& no Sb/Br) CU NIPDAUAG Level-2-260C-1 YEAR -40 to 85 25706
UCC25706P ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 UCC25706P
UCC35705D ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR 0 to 70 35705
UCC35705DGK ACTIVE VSSOP DGK 8 80 Green (RoHS
& no Sb/Br) CU NIPDAUAG Level-2-260C-1 YEAR 0 to 70 35705
UCC35705DGKG4 ACTIVE VSSOP DGK 8 80 Green (RoHS
& no Sb/Br) CU NIPDAUAG Level-2-260C-1 YEAR 0 to 70 35705
UCC35705DTR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR 0 to 70 35705
UCC35705P ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type 0 to 70 UCC35705P
UCC35706D ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR 0 to 70 35706
UCC35706DGK ACTIVE VSSOP DGK 8 100 Green (RoHS
& no Sb/Br) CU NIPDAUAG Level-2-260C-1 YEAR 0 to 70 35706
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
UCC35706P ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type 0 to 70 UCC35706P
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF UCC25706 :
•Automotive: UCC25706-Q1
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 3
NOTE: Qualified Version Definitions:
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
UCC25705DGKTR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
UCC25705DTR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
UCC35705DTR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
UCC25705DGKTR VSSOP DGK 8 2500 367.0 367.0 35.0
UCC25705DTR SOIC D 8 2500 367.0 367.0 35.0
UCC35705DTR SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 2
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