© Semiconductor Components Industries, LLC, 2012
March, 2012 − Rev. 20
1Publication Order Number:
NCP500/D
NCP500
150 mA CMOS Low Noise
Low-Dropout Voltage
Regulator
The NCP500 series of fixed output low dropout linear regulators are
designed for portable battery powered applications which require low
noise operation, fast enable response time, and low dropout. The
device achieves its low noise performance without the need of an
external noise bypass capacitor. Each device contains a voltage
reference unit, an error amplifier, a PMOS power transistor, and
resistors for setting output voltage, and current limit and temperature
limit protection circuits.
The NCP500 has been designed to be used with low cost ceramic
capacitors and requires a minimum output capacitor of 1.0 mF.
Features
•Ultra−Low Dropout Voltage of 170 mV at 150 mA
•Fast Enable Turn−On Time of 20 msec
•Wide Operating Voltage Range of 1.8 V to 6.0 V
•Excellent Line and Load Regulation
•High Accuracy Output Voltage of 2.5%
•Enable Can Be Driven Directly by 1.0 V Logic
•Typical RMS Noise Voltage 50 mV with No Bypass Capacitor
(BW = 10 Hz to 100 kHz)
•Very Small DFN 2x2.2 Package
•Pb−Free Packages are Available
Typical Applications
•Noise Sensitive Circuits − VCO’s, RF Stages, etc.
•SMPS Post−Regulation
•Hand−Held Instrumentation
•Camcorders and Cameras
Driver w/
Current
Limit
Vin Vout
Thermal
Shutdown
Enable
GND
OFF
ON
1 (3)
3 (1)
5 (4)
2 (2, 5)
Figure 1. Simplified Block Diagram
NOTE: Pin numbers in parenthesis indicate DFN package.
See detailed ordering and shipping information in the package
dimensions section on page 17 of this data sheet.
ORDERING INFORMATION
TSOP−5
SN SUFFIX
CASE 483
1
5
PIN CONNECTIONS AND
MARKING DIAGRAMS
1
3N/C
Vin
2GND
Enable 4
Vout
5
xxx = Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
G= Pb−Free Package
(Note: Microdot may be in either location)
(Top View)
TSOP−5
DFN 2x2.2 MM
SQL SUFFIX
CASE 506BA
1
3
N/C
Vin
2
GND
Enable
4Vout
5
6
GND
(Top View)
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xxM
*For additional information on our Pb−Free strategy
and soldering details, please download the ON
Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
xxxAYWG
G
DFN 2x2.2 mm
xx = Specific Device Code
M = Date Code
1
6
NCP500
http://onsemi.com
2
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
PIN FUNCTION DESCRIPTION
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
TSOP−5
Pin No.
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
DFN 2x2
Pin No.
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
Pin Name
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Description
ÁÁÁÁ
ÁÁÁÁ
1
ÁÁÁÁ
ÁÁÁÁ
3
ÁÁÁÁ
ÁÁÁÁ
Vin
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Positive power supply input voltage.
ÁÁÁÁ
ÁÁÁÁ
2
ÁÁÁÁ
ÁÁÁÁ
2, 5
ÁÁÁÁ
ÁÁÁÁ
GND
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Power supply ground.
ÁÁÁÁ
ÁÁÁÁ
3
ÁÁÁÁ
ÁÁÁÁ
1
ÁÁÁÁ
ÁÁÁÁ
Enable
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
This input is used to place the device into low−power standby. When this input is pulled to a logic
low, the device is disabled. If this function is not used, Enable should be connected to Vin.
ÁÁÁÁ
ÁÁÁÁ
4
ÁÁÁÁ
ÁÁÁÁ
6
ÁÁÁÁ
ÁÁÁÁ
N/C
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
No internal connection.
ÁÁÁÁ
ÁÁÁÁ
5
ÁÁÁÁ
ÁÁÁÁ
4
ÁÁÁÁ
ÁÁÁÁ
Vout
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Regulated output voltage.
MAXIMUM RATINGS
Rating Symbol Value Unit
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Input Voltage
ÁÁÁÁÁÁ
ÁÁÁÁÁÁ
Vin
ÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁ
0 to 6.0
ÁÁÁÁ
ÁÁÁÁ
V
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Enable Voltage
ÁÁÁÁÁÁ
ÁÁÁÁÁÁ
Von/off
ÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁ
−0.3 to Vin +0.3
ÁÁÁÁ
ÁÁÁÁ
V
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Output Voltage
ÁÁÁÁÁÁ
ÁÁÁÁÁÁ
Vout
ÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁ
−0.3 to Vin +0.3
ÁÁÁÁ
ÁÁÁÁ
V
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Output Short Circuit Duration
ÁÁÁÁÁÁ
ÁÁÁÁÁÁ
−
ÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁ
Infinite
ÁÁÁÁ
ÁÁÁÁ
−
Thermal Resistance, Junction−to−Ambient
TSOP−5
DFN (Note 3)
RqJA 250
225
°C/W
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Operating Junction Temperature
ÁÁÁÁÁÁ
ÁÁÁÁÁÁ
TJ
ÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁ
+125
ÁÁÁÁ
ÁÁÁÁ
°C
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Storage Temperature
ÁÁÁÁÁÁ
ÁÁÁÁÁÁ
Tstg
ÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁ
−65 to +150
ÁÁÁÁ
ÁÁÁÁ
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL−STD−883, Method 3015
Machine Model Method 200 V Latch up capability (85°C) "100 mA.
2. Device is internally limited to 160°C by thermal shutdown.
3. For more information, refer to application note, AND8080/D.
ELECTRICAL CHARACTERISTICS (Vin = 2.35 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25°C, for min and
max values TA = −40°C to 85°C, Tjmax = 125°C, unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
−1.8 V
Output Voltage (TA = −40°C to 85°C, Iout = 1.0 mA to 150 mA) Vout 1.755 1.8 1.845 V
Line Regulation (Vin = 2.3 V to 6.0 V, Iout = 1.0 mA) Regline −1.0 10 mV
Load Regulation (Iout = 1.0 mA to 150 mA) Regload −15 45 mV
Dropout Voltage (Measured at Vout −2.0%, TA = −40°C to 85°C)
(Iout = 1.0 mA)
(Iout = 75 mA)
(Iout = 150 mA)
Vin−Vout
−
−
−
2.0
140
270
10
200
350
mV
Output Short Circuit Current Iout(max) 200 540 700 mA
Ripple Rejection
(Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA)
RR −62 −dB
Quiescent Current
(Enable Input = 0 V)
(Enable Input = 0.9 V, Iout = 1.0 mA)
(Enable Input = 0.9 V, Iout = 150 mA)
IQ
−
−
−
0.01
175
175
1.0
300
300
mA
Enable Input Threshold Voltage
(Voltage Increasing, Output Turns On, Logic High)
(Voltage Decreasing, Output Turns Off, Logic Low)
Vth(EN)
0.9
−
−
−
−
0.15
V
Enable Input Bias Current IIB(EN) −3.0 100 nA
NCP500
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3
ELECTRICAL CHARACTERISTICS (continued) (Vin = 2.35 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25°C, for min and
max values TA = −40°C to 85°C, Tjmax = 125°C, unless otherwise noted)
Output Turn On Time (Enable Input = 0 V to Vin)− − 20 100 ms
Characteristic Symbol Min Typ Max Unit
−1.85 V
Output Voltage (TA = −40°C to 85°C, Iout = 1.0 mA to 150 mA) Vout 1.804 1.85 1.896 V
Line Regulation (Vin = 2.3 V to 6.0 V, Iout = 1.0 mA) Regline −1.0 10 mV
Load Regulation (Iout = 1.0 mA to 150 mA) Regload −15 45 mV
Dropout Voltage (Measured at Vout −2.0%, TA = −40°C to 85°C)
(Iout = 1.0 mA)
(Iout = 75 mA)
(Iout = 150 mA)
Vin−Vout
−
−
−
2.0
−
−
10
−
−
mV
Output Short Circuit Current Iout(max) 200 540 700 mA
Ripple Rejection
(Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA)
RR −62 −dB
Quiescent Current
(Enable Input = 0 V)
(Enable Input = 0.9 V, Iout = 1.0 mA)
(Enable Input = 0.9 V, Iout = 150 mA)
IQ
−
−
−
0.01
175
175
1.0
300
300
mA
Enable Input Threshold Voltage
(Voltage Increasing, Output Turns On, Logic High)
(Voltage Decreasing, Output Turns Off, Logic Low)
Vth(EN)
0.9
−
−
−
−
0.15
V
Enable Input Bias Current IIB(EN) −3.0 100 nA
Output Turn On Time (Enable Input = 0 V to Vin)− − 20 100 ms
ELECTRICAL CHARACTERISTICS (continued) (Vin = 3.0 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25°C, for min and max
values TA = −40°C to 85°C, Tjmax = 125°C, unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
−2.5 V
Output Voltage
(TA =−40°C to 85°C, Iout = 1.0 mA to 150 mA)
Vout
2.438 2.5 2.563
V
Line Regulation (Vin = 3.0 V to 6.0 V, Iout = 1.0 mA) Regline −1.0 10 mV
Load Regulation (Iout = 1.0 mA to 150 mA) Regload −15 45 mV
Dropout Voltage (Measured at Vout −2.0%, TA = −40°C to 85°C)
(Iout = 1.0 mA)
(Iout = 75 mA)
(Iout = 150 mA)
Vin−Vout
−
−
−
2.0
100
190
10
170
270
mV
Output Short Circuit Current Iout(max) 200 540 700 mA
Ripple Rejection
(Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA)
RR −62 −dB
Quiescent Current
(Enable Input = 0 V)
(Enable Input = 0.9 V, Iout = 1.0 mA)
(Enable Input = 0.9 V, Iout = 150 mA)
IQ
−
−
−
0.01
180
180
1.0
300
300
mA
Enable Input Threshold Voltage
(Voltage Increasing, Output Turns On, Logic High)
(Voltage Decreasing, Output Turns Off, Logic Low)
Vth(EN)
0.9
−
−
−
−
0.15
V
Enable Input Bias Current IIB(EN) −3.0 100 nA
Output Turn On Time (Enable Input = 0 V to Vin)− − 20 100 ms
NCP500
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4
ELECTRICAL CHARACTERISTICS (Vin = 3.1 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25°C, for min and max
values TA = −40°C to 85°C, Tjmax = 125°C, unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
−2.6 V
Output Voltage
(TA =−40°C to 85°C, Iout = 1.0 mA to 150 mA)
Vout
2.535 2.6 2.665
V
Line Regulation (Vin = 3.0 V to 6.0 V, Iout = 1.0 mA) Regline −1.0 10 mV
Load Regulation (Iout = 1.0 mA to 150 mA) Regload −15 45 mV
Dropout Voltage (Measured at Vout −2.0%, TA = −40°C to 85°C)
(Iout = 1.0 mA)
(Iout = 75 mA)
(Iout = 150 mA)
Vin−Vout
−
−
−
2.0
−
−
10
−
−
mV
Output Short Circuit Current Iout(max) 200 540 700 mA
Ripple Rejection
(Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA)
RR −62 −dB
Quiescent Current
(Enable Input = 0 V)
(Enable Input = 0.9 V, Iout = 1.0 mA)
(Enable Input = 0.9 V, Iout = 150 mA)
IQ
−
−
−
0.01
180
180
1.0
300
300
mA
Enable Input Threshold Voltage
(Voltage Increasing, Output Turns On, Logic High)
(Voltage Decreasing, Output Turns Off, Logic Low)
Vth(EN)
0.9
−
−
−
−
0.15
V
Enable Input Bias Current IIB(EN) −3.0 100 nA
Output Turn On Time (Enable Input = 0 V to Vin)− − 20 100 ms
ELECTRICAL CHARACTERISTICS (Vin = 3.2 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25°C, for min and max
values TA = −40°C to 85°C, Tjmax = 125°C, unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
−2.7 V
Output Voltage
(TA =−40°C to 85°C, Iout = 1.0 mA to 150 mA)
Vout
2.633 2.7 2.768
V
Line Regulation (Vin = 3.2 V to 6.0 V, Iout = 1.0 mA) Regline −1.0 10 mV
Load Regulation (Iout = 1.0 mA to 150 mA) Regload −15 45 mV
Dropout Voltage (Measured at Vout −2.0%, TA = −40°C to 85°C)
(Iout = 1.0 mA)
(Iout = 75 mA)
(Iout = 150 mA)
Vin−Vout
−
−
−
2.0
90
180
10
160
260
mV
Output Short Circuit Current Iout(max) 200 540 700 mA
Ripple Rejection
(Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA)
RR −62 −dB
Quiescent Current
(Enable Input = 0 V)
(Enable Input = 0.9 V, Iout = 1.0 mA)
(Enable Input = 0.9 V, Iout = 150 mA)
IQ
−
−
−
0.01
185
185
1.0
300
300
mA
Enable Input Threshold Voltage
(Voltage Increasing, Output Turns On, Logic High)
(Voltage Decreasing, Output Turns Off, Logic Low)
Vth(EN)
0.9
−
−
−
−
0.15
V
Enable Input Bias Current IIB(EN) −3.0 100 nA
Output Turn On Time (Enable Input = 0 V to Vin)− − 20 100 ms
NCP500
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5
ELECTRICAL CHARACTERISTICS (Vin = 3.3 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25°C, for min and max
values TA = −40°C to 85°C, Tjmax = 125°C, unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
−2.8 V
Output Voltage
(TA =−40°C to 85°C, Iout = 1.0 mA to 150 mA)
Vout
2.730 2.8 2.870
V
Line Regulation (Vin = 3.3 V to 6.0 V, Iout = 1.0 mA) Regline −1.0 10 mV
Load Regulation (Iout = 1.0 mA to 150 mA) Regload −15 45 mV
Dropout Voltage (Measured at Vout −2.0%, TA = −40°C to 85°C)
(Iout = 1.0 mA)
(Iout = 75 mA)
(Iout = 150 mA)
Vin−Vout
−
−
−
2.0
90
170
10
150
250
mV
Output Short Circuit Current Iout(max) 200 540 700 mA
Ripple Rejection
(Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA)
RR −62 −dB
Quiescent Current
(Enable Input = 0 V)
(Enable Input = 0.9 V, Iout = 1.0 mA)
(Enable Input = 0.9 V, Iout = 150 mA)
IQ
−
−
−
0.01
185
185
1.0
300
300
mA
Enable Input Threshold Voltage
(Voltage Increasing, Output Turns On, Logic High)
(Voltage Decreasing, Output Turns Off, Logic Low)
Vth(EN)
0.9
−
−
−
−
0.15
V
Enable Input Bias Current IIB(EN) −3.0 100 nA
Output Turn On Time (Enable Input = 0 V to Vin)− − 20 100 ms
ELECTRICAL CHARACTERISTICS (Vin = 3.5 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25°C, for min and max
values TA = −40°C to 85°C, Tjmax = 125°C, unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
−3.0 V
Output Voltage
(TA =−40°C to 85°C, Iout = 1.0 mA to 150 mA)
Vout
2.925 3.0 3.075
V
Line Regulation (Vin = 3.5 V to 6.0 V, Iout = 1.0 mA) Regline −1.0 10 mV
Load Regulation (Iout = 1.0 mA to 150 mA) Regload −15 45 mV
Dropout Voltage (Measured at Vout −2.0%, TA = −40°C to 85°C)
(Iout = 1.0 mA)
(Iout = 75 mA)
(Iout = 150 mA)
Vin−Vout
−
−
−
2.0
85
165
10
130
240
mV
Output Short Circuit Current Iout(max) 200 540 700 mA
Ripple Rejection
(Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA)
RR −62 −dB
Quiescent Current
(Enable Input = 0 V)
(Enable Input = 0.9 V, Iout = 1.0 mA)
(Enable Input = 0.9 V, Iout = 150 mA)
IQ
−
−
−
0.01
190
190
1.0
300
300
mA
Enable Input Threshold Voltage
(Voltage Increasing, Output Turns On, Logic High)
(Voltage Decreasing, Output Turns Off, Logic Low)
Vth(EN)
0.9
−
−
−
−
0.15
V
Enable Input Bias Current IIB(EN) −3.0 100 nA
Output Turn On Time (Enable Input = 0 V to Vin)− − 20 100 ms
NCP500
http://onsemi.com
6
ELECTRICAL CHARACTERISTICS (Vin = 3.8 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25°C, for min and max
values TA = −40°C to 85°C, Tjmax = 125°C, unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
−3.3 V
Output Voltage
(TA =−40°C to 85°C, Iout = 1.0 mA to 150 mA)
Vout
3.218 3.3 3.383
V
Line Regulation (Vin = 3.8 V to 6.0 V, Iout = 1.0 mA) Regline −1.0 10 mV
Load Regulation (Iout = 1.0 mA to 150 mA) Regload −15 45 mV
Dropout Voltage (Measured at Vout −2.0%, TA = −40°C to 85°C)
(Iout = 1.0 mA)
(Iout = 75 mA)
(Iout = 150 mA)
Vin−Vout
−
−
−
2.0
80
150
10
110
230
mV
Output Short Circuit Current Iout(max) 200 540 700 mA
Ripple Rejection
(Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA)
RR −62 −dB
Quiescent Current
(Enable Input = 0 V)
(Enable Input = 0.9 V, Iout = 1.0 mA)
(Enable Input = 0.9 V, Iout = 150 mA)
IQ
−
−
−
0.01
195
195
1.0
300
300
mA
Enable Input Threshold Voltage
(Voltage Increasing, Output Turns On, Logic High)
(Voltage Decreasing, Output Turns Off, Logic Low)
Vth(EN)
0.9
−
−
−
−
0.15
V
Enable Input Bias Current IIB(EN) −3.0 100 nA
Output Turn On Time (Enable Input = 0 V to Vin)− − 20 100 ms
NCP500
http://onsemi.com
7
ELECTRICAL CHARACTERISTICS (Vin = 5.5 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25°C, for min and max
values TA = −40°C to 85°C, Tjmax = 125°C, unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
−5.0 V
Output Voltage
(TA =−40°C to 85°C, Iout = 1.0 mA to 150 mA)
Vout
4.875 5.0 5.125
V
Line Regulation (Vin = 5.5 V to 6.0 V, Iout = 1.0 mA) Regline −1.0 10 mV
Load Regulation (Iout = 1.0 mA to 150 mA) Regload −15 45 mV
Dropout Voltage (Measured at Vout −2.0%, TA = −40°C to 85°C)
(Iout = 1.0 mA)
(Iout = 75 mA)
(Iout = 150 mA)
Vin−Vout
−
−
−
2.0
60
120
10
100
180
mV
Output Short Circuit Current Iout(max) 200 540 700 mA
Ripple Rejection
(Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA)
RR −62 −dB
Quiescent Current
(Enable Input = 0 V)
(Enable Input = 0.9 V, Iout = 1.0 mA)
(Enable Input = 0.9 V, Iout = 150 mA)
IQ
−
−
−
0.01
210
210
1.0
300
300
mA
Enable Input Threshold Voltage
(Voltage Increasing, Output Turns On, Logic High)
(Voltage Decreasing, Output Turns Off, Logic Low)
Vth(EN)
0.9
−
−
−
−
0.15
V
Enable Input Bias Current IIB(EN) −3.0 100 nA
Output Turn On Time (Enable Input = 0 V to Vin)− − 20 100 ms
4. Maximum package power dissipation limits must be observed.
PD +TJ(max) *TA
RqJA
5. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
NCP500
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8
230
190
250
170
210
150
270
290
310
330
350
160
−50
30
60
50
20
50
75250 100
Temperature (°C)
Vin − Vout, Dropout Voltage (mV)
10
40
0
−25
Temperature (°C)
Figure 2. Dropout Voltage vs. Temperature Figure 3. Dropout Voltage vs. Temperature
Vin − Vout, Dropout Voltage (mV)
−50
80
70
60
50
5025
0
40
30
20
10
0
−25 75 100 125
Figure 4. Dropout Voltage vs. Temperature
Temperature (°C)
Figure 5. Dropout Voltage vs. Temperature
Temperature (°C)
Vin − Vout, Dropout Voltage (mV)
Vin − Vout, Dropout Voltage (mV)
Figure 6. Dropout Voltage vs. Temperature
Temperature (°C)
Figure 7. Dropout Voltage vs. Temperature
Temperature (°C)
Vin − Vout, Dropout Voltage (mV)
Vin − Vout, Dropout Voltage (mV)
Vout(nom.) = 3.3 V
70
125
−50
120
100
60
80
50250
40
20
0
−25 75 100 125
−50 50 75250 100−25 125
160
120
180
100
140
80
200
−50 50 75250 100−25 125
120
180
100
140
80
200
220
−50 50 75250 100−25 125
Vout(nom.) = 2.8 V
Vout(nom.) = 1.8 V
Vout(nom.) = 3.3 V
Vout(nom.) = 2.8 V
Vout(nom.) = 1.8 V
50 mA Load
10 mA Load
1.0 mA Load
150 mA Load
120 mA Load
100 mA Load
150 mA Load
120 mA Load
100 mA Load
150 mA Load
120 mA Load
100 mA Load
50 mA Load
10 mA Load
1.0 mA Load
50 mA Load
10 mA Load
1.0 mA Load
NCP500
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9
25
2.804
2.802
2.8
2.798
2.796
2.794
2.792
2.790
1.804
1.8035
1.803
1.8025
1.802
1.8015
1.801
1.8005
225
200
175
150
125
100
75
50
0
25
210
200
190
180
170
160
150
−50
3.308
3.306
50
3.304
3.302
75250 100
Temperature (°C)
Vout, Output Voltage (V)
3.300
3.298
3.296
3.294
3.292 −25
Temperature (°C)
Figure 8. Output Voltage vs. Temperature Figure 9. Output Voltage vs. Temperature
Vout, Output Voltage (V)
Figure 10. Output Voltage vs. Temperature
Temperature (°C)
Figure 11. Quiescent Current vs. Temperature
Temperature (°C)
IQ, Quiescent Current (mA)
Vout, Output Voltage (V)
Figure 12. Quiescent Current vs. Input Voltage
Input Voltage (V)
Figure 13. Quiescent Current vs. Input Voltage
Input Voltage (V)
IQ, Quiescent Current (mA)
IQ, Quiescent Current (mA)
Vout(nom.) = 1.8 V
Iout = 0 mA
TA = 25°C
125 −50 50 75250 100−25 12
5
−50 50 75250 100−25 125 −50 50 75250 100−25 125
0
225
200
4.0
175
150
5.03.02.0 6.0
125
100
75
50
1.0
0
Vout(nom.) = 3.3 V
Iout = 0 mA
TA = 25°C
Vin = Vout(nom.) +0.5 V
Vout(nom.) = 3.3 V
IO = 1.0 mA
0 4.0 5.03.02.0 6.01.0
Vin = Vout(nom.) = + 0.5 V
IO = 0 mA
Vout(nom.) = 3.3 V
Vout(nom.) = 1.8 V
Vin = Vout(nom.) + 0.5 V
Vout(nom.) = 2.8 V
IO = 1.0 mA
Vin = Vout(nom.) + 0.5 V
Vout(nom.) = 1.8 V
IO = 1.0 mA
NCP500
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10
150
125
100
75
50
25
0
175
200
225
40
20
0
60
80
100
600
400
200
0
800
1000
400
300
200
100
0
500
600
150
125
100
75
50
25
0
175
200
225
Input Voltage (V)
Ground Pin Current (mA)
Input Voltage (V)
Figure 14. Ground Pin Current vs. Input Voltage Figure 15. Ground Pin Current vs. Input Voltage
Ground Pin Current (mA)
Figure 16. Current Limit vs. Input Voltage
Input Voltage (V)
Figure 17. Ripple Rejection vs. Frequency
f, Frequency (kHz)
RR, Ripple Rejection (dB)
Current Limit (mA)
10 mA
Figure 18. Output Noise Density
f, Frequency (kHz)
Figure 19. Line Transient Response
Time (ms)
Vout, Output Voltage Noise (nV/
Ǡ
HZ)
Vout(nom.) = 1.8 V
Iout = 50 mA
TA = 25°C
0 4.0 5.03.02.0 6.01.0 0 4.0 5.03.02.0 6.01.0
0 4.0 5.03.02.0 6.01.0 100100.1 1.0
0.01 100 1000101.00.1
100
0
−50 6040020
150
3.0
5.0
10080 120 140 160
4.0
200
50
Vout = 1.8 V
Vin = 2.8 V
Iout = 1 mA
Cout = 1 mF
Vout(nom.) = 3.3 V
Iout = 50 mA
TA = 25°C
60 mA
10 mA
Vout = 1.8 V
Vin = 2.8 VDC + 0.5 Vp−p
Cout = 1 mF
Output Voltage
Deviation (mV)
Vin, Input Voltage (V)
Vin = 3.8 V to 4.8 V
Vout = 3.3 V
Cout = 1.0 mF
Iout = 1.0 mA
Vout(nom.) = 3.3 V
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75
0
200
100
0
150
225
−100
−200
−300
3.0
200
150
100
50
4.0
5.0
0
−50
75
0
50
25
150
225
0
−25
−50
Time (ms) Time (ms)
Figure 20. Line Transient Response Figure 21. Load Transient Response
Figure 22. Load Transient Response
Time (ms)
Figure 23. Turn−off Response
Time (ms)
0 80 1006040 12020 140 160 0 40 503020 6010
040503020 6010 70 80 90
1.0
0
4.0
3.0
04020 60
2.0
3.0
2.0
1.0
0
12080 100
Output Voltage (V) Enable Voltage (V)
Output Voltage
Deviation (mV)
Iout, Output
Current (mA)
Output Voltage
Deviation (mV)
Vin, Input
Voltage (V)
Output Voltage
Deviation (mV)
Iout, Output
Current (mA)
Cout = 1.0 mF
Cout = 10 mF
Vin = 3.8 V to 4.8 V
Vout = 3.3 V
Cout = 1.0 mF
Iout = 10 mA
Vin = 3.8 V
Vout = 3.3 V
Cout = 1.0 mF
Cin = 1 mF
Vin = 3.8 V
Vout = 3.3 V
Cout = 10 mF
Cin = 1 mF
Vin = 3.8 V
Vout = 3.3 V
TA = 25°C
RL = 3.3 kW
Cin = 1 mF
NCP500
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2
1
2.5
0.5
1.5
0
3
0
1.2
1.8
4
1
1.6
5326
Vin, Input Voltage (V)
Vout, Output Voltage (V)
0.8
1.4
0.6
1
Vin, Input Voltage (V)
Vout, Output Voltage (V)
0
3.5
3
2.5
2
432
1.5
1
0.5
01567
Vin, Input Voltage (V)
Vout, Output Voltage (V)
Cin = 1 mF
Cout = 1 mF
TA = 25°C
VEnable = Vin
2
0453261
0.4
0.2
0
Cin = 1 mF
Cout = 1 mF
TA = 25°C
VEnable = Vin
Cin = 1 mF
Cout = 1 mF
TA = 25°C
VEnable = Vin
Figure 24. Output Voltage vs. Input Voltage Figure 25. Output Voltage vs. Input Voltage
Figure 26. Output Voltage vs. Input Voltage
NCP500
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13
DEFINITIONS
Load Regulation
The change in output voltage for a change in output load
current at a constant temperature.
Dropout Voltage
The input/output differential at which the regulator output
no longer maintains regulation against further reductions in
input voltage. Measured when the output drops 2% below its
nominal. The junction temperature, load current, and
minimum input supply requirements affect the dropout level.
Output Noise Voltage
This is the integrated value of the output noise over a
specified frequency range. Input voltage and output load
current are kept constant during the measurement. Results
are expressed in mVRMS or nV Hz
Ǹ.
Quiescent Current
The current which flows through the ground pin when the
regulator operates without a load on its output: internal IC
operation, bias, etc. When the LDO becomes loaded, this
term is called the Ground current. It is actually the difference
between the input current (measured through the LDO input
pin) and the output current.
Line Regulation
The change in output voltage for a change in input voltage.
The measurement is made under conditions of low
dissipation or by using pulse technique such that the average
chip temperature is not significantly affected.
Line Transient Response
Typical over and undershoot response when input voltage
is excited with a given slope.
Thermal Protection
Internal thermal shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
temperature is exceeded. When activated at typically 160°C,
the regulator turns off. This feature is provided to prevent
failures from accidental overheating.
Maximum Package Power Dissipation
The power dissipation level at which the junction
temperature reaches its maximum operating value, i.e.
125°C.
NCP500
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APPLICATIONS INFORMATION
The NCP500 series regulators are protected with internal
thermal shutdown and internal current limit. A typical
application circuit is shown in Figure 27.
Input Decoupling (C1)
A 1.0 mF capacitor either ceramic or tantalum is
recommended and should be connected close to the NCP500
package. Higher values and lower ESR will improve the
overall line transient response.
Output Decoupling (C2)
The NCP500 is a stable component and does not require
a minimum Equivalent Series Resistance (ESR) or a
minimum output current. The minimum decoupling value is
1.0 mF and can be augmented to fulfill stringent load
transient requirements. The regulator accepts ceramic chip
capacitors as well as tantalum devices. Larger values
improve noise rejection and load regulation transient
response. Figure 29 shows the stability region for a range of
operating conditions and ESR values.
Noise Decoupling
The NCP500 is a low noise regulator without the need of
an external bypass capacitor. It typically reaches a noise level
of 50 mVRMS overall noise between 10 Hz and 100 kHz. The
classical bypass capacitor impacts the start up phase of
standard LDOs. However, thanks to its low noise
architecture, the NCP500 operates without a bypass element
and thus offers a typical 20 ms start up phase.
Enable Operation
The enable pin will turn on or off the regulator. These
limits of threshold are covered in the electrical specification
section of this data sheet. The turn−on/turn−off transient
voltage being supplied to the enable pin should exceed a
slew rate of 10 mV/ms to ensure correct operation. If the
enable is not to be used then the pin should be connected
to Vin.
Thermal
As power across the NCP500 increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and the ambient temperature
effect the rate of junction temperature rise for the part. This
is stating that when the NCP500 has good thermal
conductivity through the PCB, the junction temperature will
be relatively low with high power dissipation applications.
The maximum dissipation the package can handle is
given by:
PD +TJ(max) *TA
RqJA
If TJ is not recommended to exceed 125°C, then the
NCP500 can dissipate up to 400 mW @ 25°C.
The power dissipated by the NCP500 can be calculated
from the following equation:
Ptot +ƪVin *I
gnd (Iout)ƫ)[Vin *Vout]*I
out
or
VinMAX +Ptot )Vout *Iout
Ignd )Iout
If a 150 mA output current is needed the ground current
is extracted from the data sheet curves: 200 mA @ 150 mA.
For a NCP500SN18T1 (1.8 V), the maximum input voltage
will then be 4.4 V, good for a 1 Cell Li−ion battery.
Hints
Please be sure the Vin and GND lines are sufficiently wide.
When the impedance of these lines is high, there is a chance
to pick up noise or cause the regulator to malfunction.
Set external components, especially the output capacitor,
as close as possible to the circuit, and make leads as short
as possible.
Package Placement
DFN packages can be placed using standard pick and
place equipment with an accuracy of "0.05 mm.
Component pick and place systems are composed of a vision
system that recognizes and positions the component and a
mechanical system which physically performs the pick and
place operation. Two commonly used types of vision
systems are: (1) a vision system that locates a package
silhouette and (2) a vision system that locates individual
bumps on the interconnect pattern. The latter type renders
more accurate place but tends to be more expensive and time
consuming. Both methods are acceptable since the parts
align due to a self−centering feature of the DFN solder joint
during solder re−flow.
Solder Paste
Type 3 or Type 4 solder paste is acceptable.
Re−flow and Cleaning
The DFN may be assembled using standard IR/IR
convection SMT re−flow processes without any special
considerations. As with other packages, the thermal profile
for specific board locations must be determined. Nitrogen
purge is recommended during solder for no−clean fluxes.
The DFN is qualified for up to three re−flow cycles at 235°C
peak (J−STD−020). The actual temperature of the DFN is a
function of:
•Component density
•Component location on the board
•Size of surrounding components
NCP500
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15
Figure 27. Typical Application Circuit
Vout
Battery or
Unregulated
Voltage C1
C2
OFF
ON
1
2
3
5
4
+
+
Figure 28. Typical Application Circuit
Vout
Battery or
Unregulated
Voltage +
C1
OFF
ON
1
3
2
4
5
6
+
C2
Output
R
1
2
3
5
4
Input
1.0 mF 1.0 mF
Output
1
2
3
5
4
Input
1.0 mF 1.0 mF
Q2
Q1
R3
R1
R2
The NCP500 series can be current boosted with a PNP transist-
or. Resistor R in conjunction with VBE of the PNP determines
when the pass transistor begins conducting; this circuit is not
short circuit proof. Input/Output differential voltage minimum is
increased by VBE of the pass resistor.
Short circuit current limit is essentially set by the VBE of Q2 and
R1. ISC = ((VBEQ2 − ib * R2) / R1) + IO(max) Regulator
Q1
0
10
1
755025
0.1
0.01 100 125 150
IO, Output Current (mA)
Output Capacitor ESR (W)
Cout = 1 mF to 10 mF
TA = 40°C to 125°C
Vin = up to 6.0 V
UNSTABLE
STABLE
Figure 29. Stability
Figure 30. Current Boost Regulator Figure 31. Current Boost Regulator with Short
Circuit Limit
NCP500
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16
Output
1
2
3
5
4
Input
1.0 mF1.0 mF
Q1
R
5.6 V
A regulated output can be achieved with input voltages that ex-
ceed the 6.0 V maximum rating of the NCP500 series with the
addition of a simple pre−regulator circuit. Care must be taken
to prevent Q1 from overheating when the regulated output
(Vout) is shorted to Gnd.
Output
1
2
3
5
4
Input
1.0 mF1.0 mF
Output
1
2
3
5
4
Enable
1.0 mF 1.0 mF
C0
3
3
80
2.5
2
904030 110
Time (ms)
Vout, Output Voltage (V)
2
1
1.5
20
4
1
0.5
010070605010
0
Enable Voltage (V)
TA = 25°C
Vin = 3.4 V
Vout = 2.8 V
R = 1.0 MW
C = 1.0 mF
R = 1.0 MW
C = 0.1 mF
No Delay
If a delayed turn−on is needed during power up of several
voltages then the above schematic can be used. Resistor R,
and capacitor C, will delay the turn−on of the bottom regulator.
A few values were chosen and the resulting delay can be seen
in Figure 33.
The graph shows the delay between the enable signal and
output turn−on for various resistor and capacitor values.
R
Figure 32. Delayed Turn−on Figure 33. Delayed Turn−on
Figure 34. Input Voltages Greater than 6.0 V
NCP500
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17
ORDERING INFORMATION
Device*
Nominal
Output Voltage Marking Package Shipping†
NCP500SN18T1
NCP500SN18T1G
NCP500SN185T1
NCP500SN185T1G
NCP500SN25T1
NCP500SN25T1G
NCP500SN26T1
NCP500SN26T1G
NCP500SN27T1
NCP500SN27T1G
NCP500SN28T1
NCP500SN28T1G
NCP500SN30T1
NCP500SN30T1G
NCP500SN33T1
NCP500SN33T1G
NCP500SN50T1
NCP500SN50T1G
1.8
1.8
1.85
1.85
2.5
2.5
2.6
2.6
2.7
2.7
2.8
2.8
3.0
3.0
3.3
3.3
5.0
5.0
LCS
LCS
LFL
LFL
LCT
LCT
LFM
LFM
LCU
LCU
LCV
LCV
LCW
LCW
LCX
LCX
LCY
LCY
TSOP−5
3000 Units/
7″ Tape & Reel
NCP500SQL18T1
NCP500SQL18T1G
NCP500SQL25T1
NCP500SQL25T1G
NCP500SQL27T1
NCP500SQL27T1G
NCP500SQL28T1
NCP500SQL28T1G
NCP500SQL30T1
NCP500SQL30T1G
NCP500SQL33T1
NCP500SQL33T1G
NCP500SQL50T1
NCP500SQL50T1G
1.8
1.8
2.5
2.5
2.7
2.7
2.8
2.8
3.0
3.0
3.3
3.3
5.0
5.0
LD
LD
LE
LE
LF
LF
LG
LG
LH
LH
LJ
LJ
LK
LK
DFN6 2x2.2
For availability of other output voltages, please contact your local ON Semiconductor Sales Representative.
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*The “G’’ suffix indicates Pb−Free package available.
NCP500
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18
PACKAGE DIMENSIONS
TSOP−5
SN SUFFIX
CASE 483−02
ISSUE E
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. A AND B DIMENSIONS DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A2.90 3.10 0.1142 0.1220
B1.30 1.70 0.0512 0.0669
C0.90 1.10 0.0354 0.0433
D0.25 0.50 0.0098 0.0197
G0.85 1.05 0.0335 0.0413
H0.013 0.100 0.0005 0.0040
J0.10 0.26 0.0040 0.0102
K0.20 0.60 0.0079 0.0236
L1.25 1.55 0.0493 0.0610
M0 10 0 10
S2.50 3.00 0.0985 0.1181
0.05 (0.002)
123
54
S
A
G
L
B
D
H
C
KM
J
__ _ _
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.7
0.028
1.0
0.039
0.95
0.037
2.4
0.094
1.9
0.074
ǒmm
inchesǓ
SCALE 10:1
NCP500
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19
PACKAGE DIMENSIONS
DFN6, 2x2.2, 0.65P
CASE 506BA−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.20 mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
ÉÉÉ
ÉÉÉ
A
B
E
D
D2
E2
BOTTOM VIEW
b
e
6X
0.10 B
0.05
AC
C
K
6X
NOTE 3
2X
0.10 C
PIN ONE
REFERENCE
TOP VIEW
2X
0.10 C
7X
A
A1
0.08 C
0.10 C
CSEATING
PLANE
SIDE VIEW
L
6X 13
46
DIM MIN MAX
MILLIMETERS
A0.80 1.00
A1 0.00 0.05
b0.20 0.30
D2.00 BSC
D2 1.10 1.30
E2.20 BSC
E2 0.70 0.90
e0.65 BSC
K0.20 −−−
L0.25 0.35
L1 0.00 0.10
L1
6X
0.58
1.36
0.96
1
0.35
0.65
PITCH
2.50
6X
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
L1
DETAIL A
L
ALTERNATE TERMINAL
CONSTRUCTIONS
ÉÉ
ÇÇ
ÇÇ
A1
A3
L
ÉÉ
ÉÉ
DETAIL B
MOLD CMPDEXPOSED Cu
ALTERNATE
CONSTRUCTIONS
DETAIL B
DETAIL A PACKAGE
OUTLINE
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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