LM3503-44
-+
VIN Sw
En1
En2
Fb
Cntrl
AGND PGND
VOUT1
VOUT2
L
22 PHD
CIN
4.7 PFCOUT
1 PF
R1
VSUPPLY
MAIN:
2 to 5
LEDs
SUB:
2 to 5
LEDs
Logic
Voltage
Signal
Inputs
LM3503
www.ti.com
SNVS329E JULY 2005REVISED MAY 2013
LM3503 Dual-Display Constant Current LED Driver with Analog Brightness Control
Check for Samples: LM3503
1FEATURES APPLICATIONS
2 Drives up to 4, 6, 8 or 10 White LEDs for Dual Dual Display Backlighting in Portable devices
Display Backlighting Cellular Phones and PDAs
>80% Peak Efficiency DESCRIPTION
Output Voltage Protection Options: 16V, 25V, The LM3503 is a white LED driver for lighting
35V & 44V applications. For dual display backlighting
Input Under-Voltage Protection applications, the LM3503 provides a complete
Internal Soft Start Eliminates Inrush Current solution. The LM3503 contains two internal white LED
current bypass FET (Field Effect Transistor) switches.
1 MHz Constant Switching Frequency The white LED current can be adjusted with a DC
Analog Brightness Control voltage from a digital to analog converter or RC
Wide Input Voltage Range: 2.5V to 5.5V filtered PWM (pulse-width-modulated) signal at the
Low Profile Packages: <1 mm Height Cntrl pin.
10 Bump DSBGA
16 Pin WQFN
Typical Application
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2005–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
A1
A2
A3
B1 B3
C1 C3
D1
D2
D3
1234
5
6
7
8
9 10 11 12
13
14
15
16
LM3503
SNVS329E JULY 2005REVISED MAY 2013
www.ti.com
DESCRIPTION (CONTINUED)
With no external compensation, cycle-by-cycle current limit, output over-voltage protection, input under-voltage
protection, and dynamic white LED current control capability, the LM3503 offers superior performance over other
step-up white LED drivers.
Connection Diagram
Figure 1. 10-Bump Thin DSBGA Package Figure 2. 16-Lead Thin WQFN Package
(YPA0010) (Top View) (RGH0016A) (Top View)
PIN DESCRIPTIONS
Bump # Pin # Name Description
A1 9 Cntrl White LED Current Control Connection
B1 7 Fb Feedback Voltage Connection
C1 6 VOUT2 Drain Connections of the NMOS and PMOS Field Effect Transistor (FET) Switches (Figure 3: N2 and
P1). Connect 100nF at VOUT2 node if VOUT2 is not used
D1 4 VOUT1 Over-Voltage Protection (OVP) and Source Connection of the PMOS FET Switch (Figure 3: P1)
D2 2 and 3 Sw Drain Connection of the Power NMOS Switch (Figure 3: N1)
D3 15 and 16 Pgnd Power Ground Connection
C3 14 Agnd Analog Ground Connection
B3 13 VIN Input Voltage Connection
A3 12 En2 NMOS FET Switch Control Connection
A2 10 En1 PMOS FET Switch Control Connection
1 NC No Connection
5 NC No Connection
8 NC No Connection
11 NC No Connection
DAP DAP Die Attach Pad (DAP), to be soldered to the printed circuit board’s ground plane for enhanced
thermal dissipation.
Cntrl (Bump A1): White LED current control pin. Use this pin to control the feedback voltage with an external
DC voltage.
Fb (Bump B1):Output voltage feedback connection.
VOUT2 (Bump C1):Drain connections of the internal PMOS and NMOS FET switches (Figure 3: P1 and N2). It is
recommended to connect 100nF at VOUT2 if VOUT2 is not used for LM3503-35V & LM3503-44V versions.
VOUT1(Bump D1):
Source connection of the internal PMOS FET switch (Figure 3: P1) and OVP sensing node. The output capacitor
must be connected as close to the device as possible, between the VOUT1 pin and ground plane. Also connect
the Schottky diode as close as possible to the VOUT1 pin to minimize trace resistance and EMI radiation.
Sw (Bump D2):
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Drain connection of the internal power NMOS FET switch (Figure 3: N1). Minimize the metal trace length and
maximize the metal trace width connected to this pin to reduce EMI radiation and trace resistance.
Pgnd (Bump D3): Power ground pin. Connect directly to the ground plane.
Agnd (Bump C3):Analog ground pin. Connect the analog ground pin directly to the Pgnd pin.
VIN (Bump B3): Input voltage connection pin. The CIN capacitor should be as close to the device as possible,
between the VIN pin and ground plane.
En2 (Bump A3): Enable pin for the internal NMOS FET switch (Figure 3: N2) during device operation. When
VEn2 is 1.4V, the internal NMOS FET switch turns off and the SUB display is turned on. The En2 pin has an
internal pull down circuit, thus the internal NMOS FET switch is normally in the on state of operation with the
SUB display turned off. When VEn2 is 0.3V, the internal NMOS FET switch turns on and the SUB display is
turned off. If both VEn1 and VEn2 are 0.3V the LM3503 will shutdown. If VOUT2 is not used, En2 must be floating
or grounded and En1 used to enable the device.
En1 (Bump A2): Enable pin for the internal PMOS FET switch (Figure 3: P1) during device operation. When
VEn1 is 0.3V, the internal PMOS FET switch turns on and the MAIN display is turned off. When VEn1 is 1.4V,
the internal PMOS FET switch turns off and the MAIN display is turned on. If both VEn1 and VEn2 are 0.3V the
LM3503 will shutdown. The En1 pin has an internal pull down circuit, thus the internal PMOS FET switch is
normally in the on state of operation with the MAIN display turned off. If VOUT2 is not used, En2 must be grounded
and En1 use to enable the device.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)
VIN Pin 0.3V to +5.5V
Sw Pin 0.3V to +48V
Fb Pin 0.3V to +5.5V
Cntrl Pin 0.3V to +5.5V
VOUT1Pin 0.3V to +48V
VOUT2 Pin 0.3V to VOUT1
En1 0.3V to +5.5V
En2 0.3V to +5.5V
Continuous Power Dissipation Internally Limited
Maximum Junction Temperature (TJ-MAX) +150°C
Storage Temperature Range 65°C to +150°C
ESD Rating(3) Human Body Model 2 kV
Machine Model 200V
(1) Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical characteristic specifications do not
apply when operating the device outside of its rated operating conditions.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
(3) The human body model is a 100 pF capacitor discharged through a 1.5 kresistor into each pin. The machine model is a 200 pF
capacitor discharged directly into each pin.
Operating Conditions(1)(2)
Junction Temperature (TJ) Range 40°C to +125°C
Ambient Temperature (TA) Range 40°C to +85°C
Supply Voltage, VIN Pin 2.5V to 5.5V
En1 and En2 Pins 0V to 5.5V
Cntrl Pin 0V to 3.5V
(1) Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical characteristic specifications do not
apply when operating the device outside of its rated operating conditions.
(2) All voltages are with respect to the potential at the GND pin.
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Thermal Properties(3)
Junction-to-Ambient Thermal Resistance (θJA)
DSBGA Package 65°C/W
WQFN Package 49°C/W
(3) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal
resistance, θJA, and the ambient temperature, TA. See Thermal Properties for the thermal resistance. The maximum allowable power
dissipation at any ambient temperature is calculated using: PD(MAX) = (TJ(MAX)–TA)/ θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature. For more information on this topic, please refer to Application Note 1187(An1187):
Leadless Leadframe Package (LLP) and Application Note 1112(AN1112) for DSBGA chip scale package.
Electrical Characteristics(1)(2)
Limits in standard typeface are for TJ= +25°C. Limits in bold typeface apply over the full operating junction temperature
range (40°C TJ+125°C). Unless otherwise specified,VIN = 2.5V.
Symbol Parameter Conditions Min Typ Max Units
VIN Input Voltage 2.5 5.5 V
IQNon-Switching Cntrl = 1.6V 0.5 1mA
Switching Fb = 0V, Sw Is Floating 1.9 3mA
Shutdown En1 = En2 = 0V 0.1 3µA
VFb Feedback Voltage Cntrl = 3.5V 0.5 0.55 0.6 V
ICL NMOS Power Switch 16, Fb = 0V 250 400 650
Current Limit 25, Fb = 0V 400 600 800 mA
35, Fb = 0V 450 750 1050
44,FB = 0V 450 750 1050
IFb Feedback Pin Output Fb = 0.25V, Cntrl = 1.6V 64 500 nA
Bias Current
FSSwitching Frequency 0.8 11.2 MHz
RDS(ON) NMOS Power Switch ON ISw = 500 mA(3)
Resistance 0.55 1.1
(Figure 3: N1)
RPDS(ON) PMOS ON Resistance IPMOS = 20 mA, En1 = 0V, En2 = 1.5V
Of VOUT1/VOUT2 Switch 5 10
(Figure 3: P1)
RNDS(ON) NMOS ON Resistance INMOS = 20 mA, En1 = 1.5V, En2 = 0V
Of VOUT2/Fb Switch 2.5 5
(Figure 3: N2)
DMAX Maximum Duty Cycle Fb = 0V 90 95 %
ISw Sw Pin Leakage Sw = 42V, En1 = En2 =0V 0.01 5µA
Current(4)
IVOUT1(OFF) VOUT1 Pin Leakage VOUT1 = 14V, En1 = En2 = 0V (16) 0.1 3
Current(4) VOUT1 = 23V, En1 = En2 = 0V (25) 0.1 3µA
VOUT1 = 32V, En1 = En2 = 0V (35) 0.1 3
VOUT1 = 42V, En1 = En2 = 0V (44) 0.1 3
IVOUT1(ON) VOUT1 Pin Bias VOUT1 = 14V, En1 = En1 = 1.5V (16) 40 80
Current(4) VOUT1 = 23V, En1 = En2 = 1.5V (25) 50 100 µA
VOUT1 = 32V, En1 = En2 = 1.5V (35) 50 100
VOUT1 = 42V, En1 = En2 = 1.5V (44) 85 140
IVOUT2 VOUT2Pin Leakage Fb = En1 = En2 = 0V, VOUT2 = VOUT1 = 42V 0.1 3µA
Current(4)
UVP Under-Voltage On Threshold 2.4 2.5 V
Protection Off Threshold 2.2 2.3
(1) All voltages are with respect to the potential at the GND pin.
(2) Min and Max limits are ensured by design, test, or statistical analysis. Typical numbers are not specified, but do represent the most
likely norm.
(3) NMOS Power On Resistance measured at ISW= 250mA for sixteen voltage version.
(4) Current flows into the pin.
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SNVS329E JULY 2005REVISED MAY 2013
Electrical Characteristics(1)(2) (continued)
Limits in standard typeface are for TJ= +25°C. Limits in bold typeface apply over the full operating junction temperature
range (40°C TJ+125°C). Unless otherwise specified,VIN = 2.5V.
Symbol Parameter Conditions Min Typ Max Units
OVP Over-Voltage On Threshold (16) 14.5 15.5 16.5
Protection(5) Off Threshold (16) 14.0 15 16.0
On Threshold (25) 22.5 24 25.5
F Off Threshold (25) 21.5 23 24.5 V
On Threshold (35) 32.0 34 35.0
Off Threshold (35) 31.0 33 34.0
On Threshold (44) 40.5 42 43.5
Off Threshold (44) 39.0 41 42.0
VEn1 PMOS FET Switch and Off Threshold 0.8 0.3
Device Enabling V
On Threshold 1.4 0.8
Threshold (Figure 3: P1)
VEn2 NMOS FET Switch and Off Threshold 0.8 0.3
Device Enabling V
On Threshold 1.4 0.8
Threshold (Figure 3: N2)
VCntrl VCntrl Range VIN = 3.6V 0.2 3.5 V
IEn1 En1 Pin Bias Current(6) En1 = 2.5V 7 14 µA
En1 = 0V 0.1
IEn2 En2 Pin Bias Current(6) En2 = 2.5V 7 14 µA
En2 = 0V 0.1
ICNTRL Cntrl Pin Bias Current(6) Cntrl = 2.5V 8 14 µA
(5) The on threshold indicates that the LM3503 is no longer switching or regulating LED current, while the off threshold indicates normal
operation.
(6) Current flows into the pin.
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 5
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Driver Logic
+
-
Oscillator
Current Sense
+
-
Thermal Shutdown
Duty Limit
Reference
Duty Limit
Comparator
Fb
UVP
Comparator
OVP
Comparator
PWM
Comparator
Light Load
Comparator
Light Load
Reference
VIN Sw
VOUT1
VOUT2
Fb
En2En1PGND
Cntrl
AGND
N1
N2
P1
Error
Amplifier
UVP
Reference OVP
Reference
Current Limit
Soft Start
9
15,16 1210
14
4
7
6
2,313
FET Logic
+
-
+
-
+
-
+
-
LM3503
SNVS329E JULY 2005REVISED MAY 2013
www.ti.com
Block Diagram
Figure 3. Block Diagram
Detailed Description of Operation
The LM3503 utilizes an asynchronous current mode pulse-width-modulation (PWM) control scheme to regulate
the feedback voltage over specified load conditions. The DC/DC converter behaves as a controlled current
source for white LED applications. The operation can best be understood by referring to the block diagram in
Figure 3 for the following operational explanation. At the start of each cycle, the oscillator sets the driver logic
and turns on the internal NMOS power device, N1, conducting current through the inductor and reverse biasing
the external diode. The white LED current is supplied by the output capacitor when the internal NMOS power
device, N1, is turned on. The sum of the error amplifier’s output voltage and an internal voltage ramp are
compared with the sensed power NMOS, N1, switch voltage. Once these voltages are equal, the PWM
comparator will then reset the driver logic, thus turning off the internal NMOS power device, N1, and forward
biasing the external diode. The inductor current then flows through the diode to the white LED load and output
capacitor. The inductor current recharges the output capacitor and supplies the current for the white LED load.
The oscillator then sets the driver logic again repeating the process. The output voltage of the error amplifier
controls the current through the inductor. This voltage will increase for larger loads and decrease for smaller
loads limiting the peak current in the inductor and minimizing EMI radiation. The duty limit comparator is always
operational, it prevents the internal NMOS power switch, N1, from being on for more than one oscillator cycle
and conducting large amounts of current. The light load comparator allows the LM3503 to properly regulate
light/small white LED load currents, where regulation becomes difficult for the LM3503’s primary control loop.
Under light load conditions, the LM3503 will enter into a pulse skipping pulse-frequency-mode (PFM) of operation
where the operational frequency will vary with the load. As a result of PFM mode operation, the output voltage
ripple magnitude will significantly increase.
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Product Folder Links: LM3503
-30
-20
-10 0102030405060708090
100
110
120
130
TEMPERATURE (oC)
0.93
0.94
0.95
0.96
0.97
0.98
0.99
1.00
1.01
1.02
1.03
FREQUENCY (MHz)
-40
VIN = 2.5V
3.0 3.5 4.0 4.5 5.0 5.5
INPUT VOLTAGE (V)
0.400
0.440
0.480
0.520
0.560
0.600
NON-SWITCHING IQ (mA)
2.5
-40oC
0.420
0.460
0.500
0.540
0.580
125oC
25oC
En1 En2
0.3V 0.3V
Result (See Figure 1 and Figure 2)
1.4V 0.3V
0.3V 1.4V
1.4V 1.4V
[P1ÆOFF N2ÆOFF N1ÆOFF] or [MAINÆOFF SUBÆOFF N1ÆOFF]
[P1ÆOFF N2ÆON N1ÆSwitching] or [MAINÆON SUBÆOFF N1ÆSwitching]
[P1ÆON N2ÆOFF N1ÆSwitching] or [MAINÆOFF SUBÆON N1ÆSwitching]
[P1ÆOFF N2ÆOFF N1ÆSwitching] or [MAINÆON SUBÆON N1ÆSwitching]
Shutdown
X
LM3503
www.ti.com
SNVS329E JULY 2005REVISED MAY 2013
The LM3503 has two control pins, En1 and En2, used for selecting which segment of a single white LED string
network is active for dual display applications. En1 controls the main display (MAIN) segment of the single string
white LED network between pins VOUT1 and VOUT2. En2 controls the sub display (SUB) segment of the single
string white LED network between the VOUT2 and Fb. If both VEn1 and VEn2 are 0.3V, the LM3503 will shutdown,
for further description of the En1 and En2 operation, see Figure 33. During shutdown the output capacitor
discharges through the string of white LEDs and feedback resistor to ground. The LED current can be
dynamically controlled by a DC voltage on the Cntrl pin. When VCntrl = 0V the white LED current may not be
equal to zero because of offsets within the LM3503 internal circuitry. To ensure zero white LED current the
LM3503 must be in shutdown mode operation.
The LM3503 has dedicated protection circuitry active during normal operation to protect the integrated circuit (IC)
and external components. Soft start circuitry is present in the LM3503 to allow for slowly increasing the current
limit to its steady-state value to prevent undesired high inrush current during start up. Thermal shutdown circuitry
turns off the internal NMOS power device, N1, when the internal semiconductor junction temperature reaches
excessive levels. The LM3503 has a under-voltage protection (UVP) comparator that disables the internal NMOS
power device when battery voltages are too low, thus preventing an on state where the internal NMOS power
device conducts large amounts of current. The over-voltage protection (OVP) comparator prevents the output
voltage from increasing beyond the protection limit when the white LED string network is removed or if there is a
white LED failure. OVP allows for the use of low profile ceramic capacitors at the output. The current through the
internal NMOS power device, N1, is monitored to prevent peak inductor currents from damaging the IC. If during
a cycle (cycle=1/switching frequency) the peak inductor current exceeds the current limit for the LM3503, the
internal NMOS power device will be turned off for the remaining duration of that cycle.
Figure 4. Operational Characteristics Table
Typical Performance Characteristics
(See Typical Application Circuit : L=DO1608C-223 and D=B150-13. Efficiency: η= POUT/ PIN = [(VOUT VFb ) * IOUT] / [VIN * IIN].
TA= +25°C, unless otherwise stated.)
IQ(Non-Switching) Switching Frequency
vs vs
VIN Temperature
Figure 5. Figure 6.
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0 4 8 12 16 20
20
30
40
50
60
70
80
90
EFFICIENCY (%)
LED CURRENT (mA)
VIN = 2.7V
2 6 10 14 18
VIN = 5.5V
VIN = 3.3V
VIN = 4.2V
VIN = 3V
0 4 8 12 16 20
20
30
40
50
60
70
80
90
EFFICIENCY (%)
LED CURRENT (mA)
VIN = 2.7V
2 6 10 14 18
VIN = 5.5V
VIN = 3.3V
VIN = 4.2V
VIN = 3V
2 4 6 8 10 12 14 16 18 20
LED CURRENT (mA)
10
20
30
40
50
60
70
80
90
EFFICIENCY (%)
0
VIN = 3V
VIN = 5.5V
VIN = 2.7V
VIN = 4.2V
VIN = 3.3V
-30
-20
-10 0102030405060708090
100
110
120
130
TEMPERATURE (oC)
1.75
1.95
SWITCHING IQ (mA)
-40
1.80
1.85
1.90 VIN = 2.5V
3.0 3.5 4.0 4.5 5.0 5.5
INPUT VOLTAGE (V)
1.50
2.00
2.50
3.00
3.50
4.00
SWITCHING IQ (mA)
2.5
25oC125oC
-40oC
LM3503
SNVS329E JULY 2005REVISED MAY 2013
www.ti.com
Typical Performance Characteristics (continued)
(See Typical Application Circuit : L=DO1608C-223 and D=B150-13. Efficiency: η= POUT/ PIN = [(VOUT VFb ) * IOUT] / [VIN * IIN].
TA= +25°C, unless otherwise stated.)
IQ(Switching) IQ(Switching)
vs vs
VIN Temperature
Figure 7. Figure 8.
10 LED Efficiency 8 LED Efficiency
vs vs
LED Current LED Current
Figure 9. Figure 10.
6 LED Efficiency 4 LED Efficiency
vs vs
LED Current LED Current
Figure 11. Figure 12.
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2.5 3.0 3.5 4.0 4.5 5.0 5.5
INPUT VOLTAGE (V)
300
400
500
600
700
800
900
1000
POWER NMOS RDS(ON) (m:)
125oC
INMOS = 400 mA
25oC
-40oC
8 16 24 32 40 48
VOUT1 PIN VOLTAGE (V)
0
20
40
60
80
100
120
140
160
VOUT1 PIN BIAS CURRENT (PA)
0
125oC
25oC
-40oC
EN2 PIN VOLTAGE (V)
0
2
4
6
8
10
12
14
16
18
EN2 PIN CURRENT (PA)
0.0 2.0 4.01.0 3.0 5.0
-40oC
125oC
25oC
EN1 PIN VOLTAGE (V)
EN1 PIN CURRENT (PA)
10
15
20
25
30
0.0 1.0 2.0 3.0 4.0 5.0
0
5
125oC
-40oC
25oC
-30
-20
-10 0102030405060708090
100
110
120
130
TEMPERATURE (oC)
94
98
MAX DUTY CYCLE (%)
-40
95
96
97 VIN = 2.5
0.0 0.5 1.0 1.5 2.0 2.5 3.0
CNTRL PIN VOLTAGE (V)
0
2
4
6
8
10
12
14
CNTRL PIN CURRENT (PA)
-40oC
125oC
25oC
LM3503
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SNVS329E JULY 2005REVISED MAY 2013
Typical Performance Characteristics (continued)
(See Typical Application Circuit : L=DO1608C-223 and D=B150-13. Efficiency: η= POUT/ PIN = [(VOUT VFb ) * IOUT] / [VIN * IIN].
TA= +25°C, unless otherwise stated.)
Cntrl Pin Current Maximum Duty Cycle
vs vs
Cntrl Pin Voltage Temperature
Figure 13. Figure 14.
En1 Pin Current En2 Pin Current
vs vs
En1 Pin Voltage En2 Pin Voltage
Figure 15. Figure 16.
VOUT1 Pin Current Power NMOS RDS(ON) (Figure 3: N1)
vs vs
VOUT1Pin Voltage VIN
Figure 17. Figure 18.
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-25 -10 5 20 35 50 65 80
TEMPERATURE (oC)
420
440
460
480
500
520
540
560
580
600
620
-25 CURRENT LIMIT (mA)
-40
VIN = 5.5V
VIN = 7.0V
VIN = 2.5V
3.0 3.5 4.0 4.5 5.0 5.5
INPUT VOLTAGE (V)
320
340
360
380
400
420
440
460
480
-16 CURRENT LIMIT (mA)
2.5
T = -40oC
T = 25oC
T = 85oC
0.3 0.5 0.7 0.9 1.1 1.3 1.5
CNTRL VOLTAGE (V)
0.00
0.04
0.08
0.12
0.16
0.20
0.24
0.28
FEEDBACK VOLTAGE (V)
VIN = 2.7V
VIN = 5.5V
-40 80
TEMPERATURE (oC)
-16 CURRENT LIMIT (mA)
-25 -10 5 20 35 50 65
320
340
360
380
400
420
440
VIN = 5.5V
VIN = 7.0V
VIN = 2.5V
2.0 12.0 22.0 32.0 42.0
3
4
5
6
7
8
9
10
PMOS SWITCH RDS(ON) (:)
VOUT1 PIN VOLTAGE (V)
125oC
IPMOS = 20 mA
25oC
-40oC
2.5 3.0 3.5 4.0 4.5 5.0 5.5
INPUT VOLTAGE (V)
0.00
0.50
1.00
1.50
2.00
2.50
3.00
3.50
NMOS SWITCH RDS(ON) (:)
-40oC
INMOS = 20 mA
125oC
25oC
LM3503
SNVS329E JULY 2005REVISED MAY 2013
www.ti.com
Typical Performance Characteristics (continued)
(See Typical Application Circuit : L=DO1608C-223 and D=B150-13. Efficiency: η= POUT/ PIN = [(VOUT VFb ) * IOUT] / [VIN * IIN].
TA= +25°C, unless otherwise stated.)
NMOS RDS(ON) (Figure 3: N2) PMOS RDS(ON) (Figure 3: P1)
vs vs
VIN VIN
Figure 19. Figure 20.
Feedback Voltage Current Limit (LM3503-16)
vs vs
Cntrl Pin Voltage Temperature
Figure 21. Figure 22.
Current Limit (LM3503-16) Current Limit (LM3503-25)
vs vs
VIN Temperature
Figure 23. Figure 24.
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Product Folder Links: LM3503
-40
TEMPERATURE (oC)
0.249
0.250
0.251
0.252
0.253
0.254
0.255
0.256
0.257
FEEDBACK VOLTAGE (V)
-30-20-10 010 20 30 40 50 60 70 80
VIN = 5.5V
CNTRL = 1.6V
VIN = 2.7V
-40
TEMPERATURE (oC)
0.119
0.120
0.121
0.122
0.123
0.124
0.125
0.126
0.127
FEEDBACK VOLTAGE (V)
-30-20-10 010 20 30 40 50 60 70 80
VIN = 2.7V
CNTRL = 0.8V
VIN = 5.5V
5.0
INPUT VOLTAGE (V)
690
700
710
720
730
740
750
760
770
780
CURRENT LIMIT (mA)
5.54.54.03.53.02.5
85oC
-40oC
25oC
5.0
INPUT VOLTAGE (V)
440
460
480
500
520
540
560
580
600
620
-25 CURRENT LIMIT (mA)
5.54.54.03.53.02.5
T = -40oC
T = 25oC
T = 85oC
-40 80
TEMPERATURE (oC)
-35/44 CURRENT LIMIT (mA)
-25 -10 5 20 35 50 65
VIN = 7.0V
690
700
710
720
730
740
750
760
780
770
VIN = 2.5V
LM3503
www.ti.com
SNVS329E JULY 2005REVISED MAY 2013
Typical Performance Characteristics (continued)
(See Typical Application Circuit : L=DO1608C-223 and D=B150-13. Efficiency: η= POUT/ PIN = [(VOUT VFb ) * IOUT] / [VIN * IIN].
TA= +25°C, unless otherwise stated.)
Current Limit (LM3503-25) Current Limit (LM3503-35/44)
vs vs
VIN Temperature
Figure 25. Figure 26.
Current Limit (LM3503-35/44) Feedback Voltage (VCntrl = 0.8V)
vs vs
VIN Temp
Figure 27. Figure 28.
Feedback Voltage (VCntrl = 1.6V)
vs
Temp VIN = 3.6V at 15mA & 4 Leds
Figure 29. Figure 30.
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Links: LM3503
LED CURRENT (mA)
0.00
5.00
10.00
15.00
20.00
25.00
30.00
35.00
40.00
10 20 30 40 50 60 70
80 90
DUTY CYCLE (%)
50 kHz
10 kHz
1 kHz 500 Hz
200 Hz
LM3503
SNVS329E JULY 2005REVISED MAY 2013
www.ti.com
Typical Performance Characteristics (continued)
(See Typical Application Circuit : L=DO1608C-223 and D=B150-13. Efficiency: η= POUT/ PIN = [(VOUT VFb ) * IOUT] / [VIN * IIN].
TA= +25°C, unless otherwise stated.) Dimming Duty Cycle vs LED Current
VIN = 3.6V at 15mA & 2 Leds VIN=3.6V, 2LEDs on Main & Sub Display
Figure 31. Figure 32.
12 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM3503
FPWM > 10 x FRC
FRC = 1
2 x S x R x C
R1
R
X
C
YLM3503
VIN Sw
En1
En2 Fb
Cntrl
AGND PGND
VOUT1
VOUT2
PWM Signal
ILED =R1
VFb
VFB = (0.156) x (VCntrl)
LM3503
www.ti.com
SNVS329E JULY 2005REVISED MAY 2013
APPLICATION INFORMATION
WHITE LED CURRENT SETTING
The white LED current is controlled by a DC voltage at the Cntrl pin.
The relationship between the Cntrl pin voltage and Fb pin voltage can be computed with the following:
VCntrl: Cntrl Pin Voltage. Voltage Range: 0.2V VCntrl 3.5V.
VFb: Feedback Pin Voltage. (1)
LED CURRENT
The LED current is set using the following equation:
(2)
To determine the maximum output current capability of the device, it is best to estimate using equations on page
16 and the minimum peak current limit of the device (see electrical table). Note the current capability will be
higher with less LEDs in the application.
WHITE LED DIMMING
Figure 33. If VOUT2 is not used, En2 must be grounded
Aside from varying the DC voltage at the Cntrl pin, white LED dimming can be accomplished through the RC
filtering of a PWM signal. The PWM signal frequency should be at least a decade greater than the RC filter
bandwidth. WHITE LED DIMMING is how the LM3503 should be wired for PWM filtered white LED dimming
functionality. When using PWM dimming, it is recommended to add 1-2ms delay between the Cntrl signal and the
main Enable sginal (En1) to allow time for the output to discharge. This will prevent potential flickering especially
if the Sub display is compose of 2 LEDs or less.
The equations below are guidelines for choosing the correct RC filter values in relation to the PWM signal
frequency.
Equation:
(3)
Equation: (4)
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: LM3503
IL (avg)
Time
Inductor Current
'iL
TS
tON = DTS
(Vin - Vout)/L
Vin/L
LM3503
SNVS329E JULY 2005REVISED MAY 2013
www.ti.com
FRC:RC Filter Bandwidth Cutoff Frequency.
FPWM:PWM Signal Frequency.
R: Chosen Filter Resistor.
C: Chosen Filter Capacitor.
For example, using the above equations to determine the proper RC values. Assume the following condition:VIN=
3.6V, C=0.01µF and FPWM = 500Hz, then FRC= 50Hz by relation to equation 2. By rearranging equation 1 to solve
for R; R = 318.5K ohms (standard value, R = 316K).
PWM Dimming Duty Cycle vs. LED Current
The results are based on the 2LEDs on Main display and 2LEDs on Sub display
Duty 200Hz 500Hz 1KHz 10KHz 50KHz 100kHz
(%) R = 787k ohms R =316k ohms R = 158kohms R=16.2k ohms R=3.16k ohms R=1.62k ohms
10 0.78mA 1.59mA 2.23mA 3.42mA 3.58mA 3.61mA
20 1.85mA 3.46mA 4.78mA 7.09mA 7.41mA 7.48mA
30 2.88mA 5.35mA 7.33mA 10.77mA 11.25mA 11.34mA
40 3.96mA 7.24mA 9.88mA 14.48mA 15.12mA 15.24mA
50 5.05mA 9.12mA 12.45mA 19.1mA 19.06mA 19.16mA
60 6.08mA 11.03mA 15.03mA 21.86mA 22.98mA 23.10mA
70 7.13mA 12.94mA 17.61mA 25.71mA 26.9mA 27.05mA
80 8.17mA 14.83mA 20.20mA 29.53mA 30.83mA 31.00mA
90 9.24mA 16.73mA 22.79mA 33.32mA 34.78mA 35.00mA
Figure 34. Inductor Current Waveform
CONTINUOUS AND DISCONTINUOUS MODES OF OPERATION
Since the LM3503 is a constant frequency pulse-width-modulated step-up regulator, care must be taken to make
sure the maximum duty cycle specification is not violated. The duty cycle equation depends on which mode of
operation the LM3503 is in. The two operational modes of the LM3503 are continuous conduction mode (CCM)
and discontinuous conduction mode (DCM). Continuous conduction mode refers to the mode of operation where
during the switching cycle, the inductor current never goes to and stays at zero for any significant amount of time
during the switching cycle. Discontinuous conduction mode refers to the mode of operation where during the
switching cycle, the inductor current goes to and stays at zero for a significant amount of time during the
switching cycle. Figure 34 illustrates the threshold between CCM and DCM operation. In Figure 34 the inductor
current is right on the CCM/DCM operational threshold. Using this as a reference, a factor can be introduced to
calculate when a particular application is in CCM or DCM operation. R is a CCM/DCM factor we can use to
compute which mode of operation a particular application is in. If R is 1, then the application is operating in
CCM. Conversely, if R is < 1, the application is operating in DCM. The R factor inequalities are a result of the
components that make up the R factor. From Figure 34, the R factor is equal to the average inductor current,
IL(avg), divided by half the inductor ripple current, ΔiL. Using Figure 34, the following equation can be used to
compute R factor:
14 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM3503
D = [2 * IOUT * L * (VOUT - VIN) * Fs]
[(VIN)2 * Eff]
tON
TS
D =
D = [VOUT]
[VOUT - VIN]
tON
TS
D =
R = [2 * IOUT * L * Fs * (VOUT)2]
[(VIN)2 * Eff * (VOUT - VIN)]
'iL = [VIN * D]
[L * Fs]
IL (avg) = [IOUT]
[(1-D) * Eff]
R = 'iL
2 * IL (avg)
LM3503
www.ti.com
SNVS329E JULY 2005REVISED MAY 2013
(5)
(6)
(7)
(8)
VIN:Input Voltage.
VOUT:Output Voltage.
Eff: Efficiency of the LM3503.
Fs: Switching Frequency.
IOUT:White LED Current/Load Current.
L: Inductance Magnitude/Inductor Value.
D: Duty Cycle for CCM operation.
ΔiL:Inductor Ripple Current.
IL(avg): Average Inductor Current.
For CCM operation, the duty cycle can be computed with:
(9)
(10)
D: Duty Cycle for CCM Operation.
VOUT:Output Voltage.
VIN :Input Voltage.
For DCM operation, the duty cycle can be computed with:
(11)
(12)
D: Duty Cycle for DCM Operation.
VOUT:Output Voltage.
VIN :Input Voltage.
IOUT:White LED Current/Load Current.
Fs: Switching Frequency.
L: Inductor Value/Inductance Magnitude.
INDUCTOR SELECTION
In order to maintain inductance, an inductor used with the LM3503 should have a saturation current rating larger
than the peak inductor current of the particular application. Inductors with low DCR values contribute decreased
power losses and increased efficiency. The peak inductor current can be computed for both modes of operation:
CCM and DCM.
The cycle-by-cycle peak inductor current for CCM operation can be computed with:
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: LM3503
[VIN * RDS(ON) * ((D/) - 1)]
[1.562 * Fs]
L >
[VIN * D]
[L * Fs]
IPeak
|
[IOUT]
[(1 - D) * Eff] +[VIN * D]
[2 * L * Fs]
IPeak
|
IPeak IL (avg) +
|
'iL
2
LM3503
SNVS329E JULY 2005REVISED MAY 2013
www.ti.com
(13)
(14)
VIN:Input Voltage.
Eff: Efficiency of the LM3503.
Fs: Switching Frequency.
IOUT:White LED Current/Load Current.
L: Inductance Magnitude/Inductor Value.
D: Duty Cycle for CCM Operation.
IPEAK:Peak Inductor Current.
ΔiL:Inductor Ripple Current.
IL(avg): Average Inductor Current.
The cycle-by-cycle peak inductor current for DCM operation can be computed with:
(15)
VIN:Input Voltage.
Fs: Switching Frequency.
L: Inductance Magnitude/Inductor Value.
D: Duty Cycle for DCM Operation.
IPEAK:Peak Inductor Current.
The minimum inductance magnitude/inductor value for the LM3503 can be calculated using the following, which
is only valid when the duty cycle is > 0.5:
(16)
D: Duty Cycle.
D’: 1-D.
RDS(ON):NMOS Power Switch ON Resistance.
Fs: Switching Frequency.
VIN:Input Voltage.
L: Inductance Magnitude/Inductor Value.
This equation gives the value required to prevent subharmonic oscillations. The result of this equation and the
inductor ripple currents should be accounted for when choosing an inductor value.
Some recommended Inductor manufactures included but are not limited to:
DO1608C-223
Coilcraft www.coilcraft.com
DT1608C-223
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Product Folder Links: LM3503
LM3503
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SNVS329E JULY 2005REVISED MAY 2013
CAPACITOR SELECTION
Multilayer ceramic capacitors are the best choice for use with the LM3503. Multilayer ceramic capacitors have
the lowest equivalent series resistance (ESR). Applied voltage or DC bias, temperature, dielectric material type
(X7R, X5R, Y5V, etc), and manufacturer component tolerance have an affect on the true or effective capacitance
of a ceramic capacitor. Be aware of how your application will affect a particular ceramic capacitor by analyzing
the aforementioned factors of your application. Before selecting a capacitor always consult the capacitor
manufacturer’s data curves to verify the effective or true capacitance of the capacitor in your application.
INPUT CAPACITOR SELECTION
The input capacitor serves as an energy reservoir for the inductor. In addition to acting as an energy reservoir for
the inductor the input capacitor is necessary for the reduction in input voltage ripple and noise experienced by
the LM3503. The reduction in input voltage ripple and noise helps ensure the LM3503’s proper operation, and
reduces the effect of the LM3503 on other devices sharing the same supply voltage. To ensure low input voltage
ripple, the input capacitor must have an extremely low ESR. As a result of the low input voltage ripple
requirement multilayer ceramic capacitors are the best choice. A minimum capacitance of 2.0 µF is required for
normal operation, so consult the capacitor manufacturer’s data curves to verify whether the minimum
capacitance requirement is going to be achieved for a particular application.
OUTPUT CAPACITOR SELECTION
The output capacitor serves as an energy reservoir for the white LED load when the internal power FET switch
(Figure 3: N1) is on or conducting current. The requirements for the output capacitor must include worst case
operation such as when the load opens up and the LM3503 operates in over-voltage protection (OVP) mode
operation. A minimum capacitance of 0.5 µF is required to ensure normal operation. Consult the capacitor
manufacturer’s data curves to verify whether the minimum capacitance requirement is going to be achieved for a
particular application.
Some recommended capacitor manufacturers included but are not limited to:
Taiyo-Yuden GMK212BJ105MD (0805/35V) www.t-yuden.com
muRata GRM40-035X7R105K (0805/50V) www.murata.com
TDK C3216X7R1H105KT (1206/50V) www.tdktca.com
C3216X7R1C475K (1206/16V)
AVX 08053D105MAT (0805/25V) www.avxcorp.com
08056D475KAT (0805/6.3V)
1206ZD475MAT (1206/10V)
DIODE SELECTION
To maintain high efficiency it is recommended that the average current rating (IFor IO) of the selected diode
should be larger than the peak inductor current (ILpeak). At the minimum the average current rating of the diode
should be larger than the maximum LED current. To maintain diode integrity the peak repetitive forward current
(IFRM) must be greater than or equal to the peak inductor current (ILpeak). Diodes with low forward voltage ratings
(VF) and low junction capacitance magnitudes (CJor CTor CD) are conducive to high efficiency. The chosen
diode must have a reverse breakdown voltage rating (VRand/or VRRM) that is larger than the output voltage
(VOUT). No matter what type of diode is chosen, Schottky or not, certain selection criteria must be followed:
1. VRand VRRM > VOUT
2. IFor IOILOAD or IOUT
3. IFRM ILpeak
Some recommended diode manufacturers included but are not limited to:
Vishay SS12(1A/20V) www.vishay.com
SS14(1A/40V)
SS16(1A/60V)
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: LM3503
LM3503
SNVS329E JULY 2005REVISED MAY 2013
www.ti.com
On Semiconductor MBRM120E (1A/20V) www.onsemi.com
MBRS1540T3 (1.5A/40V)
MBR240LT (2A/40V)
Central Semiconductor CMSH1-40M (1A/40V) www.centralsemi.com
SHUTDOWN AND START-UP
On startup, the LM3503 contains special circuitry that limits the peak inductor current which prevents large
current spikes from loading the battery or power supply. The LM3503 is shutdown when both En1 and En2
signals are less than 0.3V. During shutdown the output voltage is a diode drop below the supply voltage. When
shutdown, the softstart is reset to prevent inrush current at the next startup.
THERMAL SHUTDOWN
The LM3503 stops regulating when the internal semiconductor junction temperature reaches approximately
140°C. The internal thermal shutdown has approximately 20°C of hysteresis which results in the LM3503 turning
back on when the internal semiconductor junction temperature reaches 120°C. When the thermal shutdown
temperature is reached, the softstart is reset to prevent inrush current when the die temperature cools.
UNDER VOLTAGE PROTECTION
The LM3503 contains protection circuitry to prevent operation for low input supply voltages. When Vin drops
below 2.3V, typically, the LM3503 will no longer regulate. In this mode, the output voltage will be one diode drop
below Vin and the softstart will be reset. When Vin increases above 2.4V, typically, the device will begin
regulating again.
OVER VOLTAGE PROTECTION
The LM3503 contains dedicated ciruitry for monitoring the output voltage. In the event that the LED network is
disconnected from the LM3503, the output voltage will increase and be limited to 15.5V(typ.) for the 16V version,
24V(typ.) for the 25V version, 34V(typ.) for 35V version and 42V(typ.) for the 44V version. (see electrical table for
more details). In the event that the network is reconnected regulation will resume at the appropriate output
voltage.
LAYOUT CONSIDERATIONS
All components, except for the white LEDs, must be placed as close as possible to the LM3503. The die attach
pad (DAP) must be soldered to the ground plane.
The input bypass capacitor CIN, as shown in the Typical Application Circuit, must be placed close to the IC and
connect between the VIN and Pgnd pins. This will reduce copper trace resistance which effects input voltage
ripple of the IC. For additional input voltage filtering, a 100 nF bypass capacitor can be placed in parallel with CIN
to shunt any high frequency noise to ground. The output capacitor, COUT, must be placed close to the IC and be
connected between the VOUT1 and Pgnd pins. Any copper trace connections for the COUT capacitor can increase
the series resistance, which directly effects output voltage ripple and efficiency. The current setting resistor, R1,
should be kept close to the Fb pin to minimize copper trace connections that can inject noise into the system.
The ground connection for the current setting resistor network should connect directly to the Pgnd pin. The Agnd
pin should be tied directly to the Pgnd pin. Trace connections made to the inductor should be minimized to
reduce power dissipation and increase overall efficiency while reducing EMI radiation. For more details regarding
layout guidelines for switching regulators, refer to Applications Note AN-1149.
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LM3503
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SNVS329E JULY 2005REVISED MAY 2013
REVISION HISTORY
Changes from Revision D (May 2013) to Revision E Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 18
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 19
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PACKAGE OPTION ADDENDUM
www.ti.com 16-Oct-2015
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM3503ITL-25/NOPB LIFEBUY DSBGA YPA 10 250 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 SBJB
LM3503ITL-35/NOPB LIFEBUY DSBGA YPA 10 250 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 SBKB
LM3503ITL-44/NOPB LIFEBUY DSBGA YPA 10 250 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 SDNB
LM3503SQ-16/NOPB LIFEBUY WQFN RGH 16 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 L00045B
LM3503SQ-25/NOPB LIFEBUY WQFN RGH 16 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 L00046B
LM3503SQ-35 LIFEBUY WQFN RGH 16 1000 TBD Call TI Call TI -40 to 85 L00047B
LM3503SQ-35/NOPB LIFEBUY WQFN RGH 16 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 L00047B
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Oct-2015
Addendum-Page 2
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM3503ITL-25/NOPB DSBGA YPA 10 250 178.0 8.4 2.03 2.21 0.76 4.0 8.0 Q1
LM3503ITL-35/NOPB DSBGA YPA 10 250 178.0 8.4 2.03 2.21 0.76 4.0 8.0 Q1
LM3503ITL-44/NOPB DSBGA YPA 10 250 178.0 8.4 2.03 2.21 0.76 4.0 8.0 Q1
LM3503SQ-16/NOPB WQFN RGH 16 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1
LM3503SQ-25/NOPB WQFN RGH 16 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1
LM3503SQ-35 WQFN RGH 16 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1
LM3503SQ-35/NOPB WQFN RGH 16 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 2-Sep-2015
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM3503ITL-25/NOPB DSBGA YPA 10 250 210.0 185.0 35.0
LM3503ITL-35/NOPB DSBGA YPA 10 250 210.0 185.0 35.0
LM3503ITL-44/NOPB DSBGA YPA 10 250 210.0 185.0 35.0
LM3503SQ-16/NOPB WQFN RGH 16 1000 210.0 185.0 35.0
LM3503SQ-25/NOPB WQFN RGH 16 1000 210.0 185.0 35.0
LM3503SQ-35 WQFN RGH 16 1000 210.0 185.0 35.0
LM3503SQ-35/NOPB WQFN RGH 16 1000 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 2-Sep-2015
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
16X 0.3
0.2
2.6 0.1
12X 0.5
16X 0.5
0.3
4X
1.5
0.8 MAX
A
4.1
3.9
B4.1
3.9
0.3
0.2
0.5
0.3
(0.1)
TYP
4214978/A 10/2013
WQFN - 0.8 mm max heightRGH0016A
WQFN
PIN 1 INDEX AREA
SEATING PLANE
1
49
12
58
16 13
(OPTIONAL)
PIN 1 ID
DETAIL
SEE TERMINAL
NOTES:
1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
0.1 C A B
0.05 C
SCALE 3.500
DETAIL
OPTIONAL TERMINAL
TYPICAL
www.ti.com
EXAMPLE BOARD LAYOUT
( 2.6)
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
16X (0.6)
16X (0.25)
(3.8)
(3.8)
5X ( )
VIA
0.2
12X (0.5)
(0.25) TYP
(1)
(1)
4214978/A 10/2013
WQFN - 0.8 mm max heightRGH0016A
WQFN
SYMM
SEE DETAILS
1
4
58
9
12
13
16
SYMM
LAND PATTERN EXAMPLE
SCALE:15X
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see QFN/SON PCB application report
in literature No. SLUA271 (www.ti.com/lit/slua271).
SOLDER MASK
OPENING
METAL
SOLDER MASK
DEFINED
METAL
SOLDER MASK
OPENING
SOLDER MASK DETAILS
NON SOLDER MASK
DEFINED
(PREFERRED)
www.ti.com
EXAMPLE STENCIL DESIGN
(3.8)
16X (0.6)
16X (0.25)
4X (1.15)
(0.25) TYP
12X (0.5)
(3.8)
(0.675)
(0.675)
4214978/A 10/2013
WQFN - 0.8 mm max heightRGH0016A
WQFN
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
SYMM
TYP
METAL
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD
78% PRINTED SOLDER COVERAGE BY AREA
SCALE:15X
1
4
58
9
12
13
16
SYMM
MECHANICAL DATA
YPA0010
www.ti.com
TLP10XXX (Rev D)
A
. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
4215069/A 12/12
NOTES:
0.600
±0.075
E
D
D: Max =
E: Max =
2.124 mm, Min =
1.946 mm, Min =
2.063 mm
1.885 mm
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