April 2001
PRELIMINARY
2001 Fairc hild Semic onduc tor Corporation Si3441DV Rev A ( W)
Si3441DV
P-Channel 2.5V Specified PowerTrench
MOSFET
General Description
This P-Channel 2.5V specified MOSFET uses
Fairchild’s low voltage PowerTrench process. It has
been optimized for battery power management
applicat i ons.
Applications
• Battery management
• Load switch
• Battery protecti on
Features
• –3.5 A, –20 V . RDS(ON) = 80 mΩ @ VGS = –4.5 V
RDS(ON) = 110 m Ω @ V GS = –2.5 V
• Low gate charge
• High performance trenc h technology f or extremely
low RDS(ON)
D
D
D
S
D
G
SuperSOT -6
TM
6
5
4
1
2
3
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol Parameter Ratings Units
VDSS Drain-Source V ol tage –20 V
VGSS Gate-Source Voltage ±8 V
ID Drain Current – Continuous (Note 1a) –3.5 A
– Pulsed –20
Maximum Power Dissipation (Note 1a) 1.6 W PD (Note 1b) 0.8
TJ, TSTG Operating and St orage Junction Temperature Range –55 t o +150 °C
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
RθJC Thermal Resistanc e, Juncti on-to-Case (Note 1) 30 °C/W
Package Marking and Ordering Information
Device Marki ng Device Reel Siz e Tape width Quantity
.441 Si3441DV 7’’ 8mm 3000 units
Si3441DV
Si3441DV Rev A ( W)
Electrical Characteristics TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS Drain–Sourc e Breakdown Voltage VGS = 0 V, ID = –250 µA –20 V
∆BVDSS
∆TJ Breakdown Voltage Temperature
Coefficient ID = –250 µA, Referenced to 25°C –12
mV/°C
IDSS Zero Gate Volt age Drai n Current VDS = –16 V, VGS = 0 V –1 µA
IGSSF Gate–Body Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA
IGSSR Gate–Body Leakage, Reverse VGS = –8 V VDS = 0 V –100 nA
On Characteristics (Note 2)
VGS(th) Gate Threshold V ol t age VDS = VGS, ID = –250 µA –0.4 –0.8 –1.5 V
∆VGS(th)
∆TJ Gate Threshold Vol tage
Temperature Coeffici ent ID = –250 µA, Referenced to 25°C
3
mV/°C
RDS(on) Static Drain–Source
On–Resistance VGS = –4.5 V, ID = –3.5 A
VGS = –2.5 V, ID = –3.1 A
VGS = –4.5 V, ID = –3.5A,TJ=125°C
60
82
77
80
110
112
mΩ
ID(on) On–State Drain Current VGS = –4. 5 V , VDS = –5 V –10 A
gFS Forward Transconductance VDS = –5 V, ID = –3.5 A 11 S
Dynamic Characteristics
Ciss Input Capacitance 779 pF
Coss Output Capacitance 121 pF
Crss Reverse Transfer Capacitance
VDS = –10 V, V GS = 0 V,
f = 1.0 MHz 56 pF
Switching Characteristics (Note 2)
td(on) Turn–On Delay Time 10 20 ns
tr Turn–On Rise Time 9 19 ns
td(off) Turn–Off Delay Time 27 43 ns
tf Turn–Off Fall Time
VDD = –10 V, ID = –1 A,
VGS = –4.5 V, RGEN = 6 Ω
11 20 ns
Qg Total Gate Charge 7.2 10 nC
Qgs Gate–Source Charge 1.7 nC
Qgd Gate–Drain Charge
VDS = –10 V, ID = –3.5 A,
VGS = –4.5 V
1.5 nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Cont i nuous Drain–Source Di ode Forward Current –1.3 A
VSD Drain–Source Diode Forward
Voltage VGS = 0 V, IS = –1.3 A (Note 2) –0.8 –1.2 V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defi ned as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 78°C/W when
mounted on a 1in2 pad
of 2 oz copper
b) 156°C/W when mounted
on a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
Si3441DV
Si3441DV Rev A ( W)
Typical Characteristics
0
3
6
9
12
15
01234
-VDS, DRAIN TO SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
VGS = -4.5V
-3.5V -3.0V
-1.5V
-2.0V
-2.5V
0.8
1
1.2
1.4
1.6
1.8
2
03691215
-ID, DRAIN CURRE NT (A)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
VGS=-2.0V
-3.0V
-2.5V
-3.5V -4.5V
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANC
E
ID = -3.5 A
VGS = -4.5V
0.02
0.06
0.1
0.14
0.18
0.22
12345
-VGS, GATE TO SOURCE VOLTAGE (V)
R
DS(ON)
, ON-RESISTANCE (OHM)
ID = -1.8A
TA = 125oC
TA = 25oC
Figure 3. On-Resistance Variation with
Temperature. Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
2
4
6
8
10
0.511.522.5
-VGS, GATE TO SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
TA = -55 oC25oC
125oC
VDS = -5V
0.0001
0.001
0.01
0.1
1
10
00.20.40.60.811.2
-VSD, BO DY DIODE FORWARD VOL TAGE (V)
-I
S
, REVERSE DRAIN CURRENT (A
)
VGS = 0V
TA = 125oC
25oC
-55oC
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
Si3441DV
Si3441DV Rev A ( W)
Typical Characteristics
0
1
2
3
4
5
0123456789
Qg, GATE CHARGE (nC)
-V
GS
, GATE-SOURCE VOLTAGE (V)
ID = -3.5A VDS = -5V -10V
-15V
0
200
400
600
800
1000
0 5 10 15 20
-VDS, DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
CISS
COSS
CRSS
f = 1 MHz
VGS = 0 V
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
0.01
0.1
1
10
100
0.1 1 10 100
-VDS, DRAIN-SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
DC
1s100ms
100µsRDS(ON) LIMIT
VGS = -10V
SINGLE PULSE
RθJA = 156oC/W
TA = 25oC
10ms
1ms
0
2
4
6
8
10
0.01 0.1 1 10 100
t1, TIME (sec)
P(pk), PEAK TRANSIENT POWER (W)
SINGLE PULSE
RθJA = 156°C/W
TA = 25°C
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
0.001
0.01
0.1
1
0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
RθJA(t) = r(t) + RθJA
RθJA = 156oC/W
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
P
(p
k
)
t1t2
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
Si3441DV
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT ST A TUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
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