Precision, Very Low Noise,
Low Input Bias Current, Wide
Bandwidth JFET Operational Amplifiers
AD8610/AD8620
Rev. F
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FEATURES
Low noise: 6 nV/√Hz
Low offset voltage: 100 μV maximum
Low input bias current: 10 pA maximum
Fast settling: 600 ns to 0.01%
Low distortion
Unity gain stable
No phase reversal
Dual-supply operation: ±5 V to ±13 V
APPLICATIONS
Photodiode amplifiers
ATE
Instrumentation
Sensors and controls
High performance filters
Fast precision integrators
High performance audio
PIN CONFIGURATIONS
NC = NO CONNECT
AD8610
TOP VIEW
(Not to Scale)
NULL 1
–IN 2
+IN 3
V– 4
NC
V+
OUT
NULL
8
7
6
5
02730-001
Figure 1. 8-Lead MSOP and 8-Lead SOIC_N
AD8620
TOP VIEW
(Not to Scale)
OUTA
1
–INA
2
+INA
3
V–
4
V+
OUTB
–INB
+INB
0
2730-002
8
7
6
5
Figure 2. 8-Lead SOIC_N
GENERAL DESCRIPTION
The AD8610/AD8620 are very high precision JFET input ampli-
fiers featuring ultralow offset voltage and drift, very low input
voltage and current noise, very low input bias current, and wide
bandwidth. Unlike many JFET amplifiers, the AD8610/AD8620
input bias current is low over the entire operating temperature
range. The AD8610/AD8620 are stable with capacitive loads of
over 1000 pF in noninverting unity gain; much larger capacitive
loads can be driven easily at higher noise gains. The AD8610/
AD8620 swing to within 1.2 V of the supplies even with a 1 kΩ
load, maximizing dynamic range even with limited supply volt-
ages. Outputs slew at 50 V/μs in either inverting or noninverting
gain configurations, and settle to 0.01% accuracy in less than
600 ns. Combined with high input impedance, great precision,
and very high output drive, the AD8610/AD8620 are ideal
amplifiers for driving high performance ADC inputs and
buffering DAC converter outputs.
Applications for the AD8610/AD8620 include electronic instru-
ments; ATE amplification, buffering, and integrator circuits;
CAT/MRI/ultrasound medical instrumentation; instrumentation
quality photodiode amplification; fast precision filters (including
PLL filters); and high quality audio.
The AD8610/AD8620 are fully specified over the extended
industrial temperature range (−40°C to +125°C). The AD8610
is available in the narrow 8-lead SOIC and the tiny 8-lead MSOP
surface-mount packages. The AD8620 is available in the narrow
8-lead SOIC package. The 8-lead MSOP packaged devices are
avail-able only in tape and reel.
AD8610/AD8620
Rev. F | Page 2 of 24
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Pin Configurations ........................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Specifications ............................................................... 4
Absolute Maximum Ratings ............................................................5
ESD Caution...................................................................................5
Typical Performance Characteristics ..............................................6
Theory of Operation ...................................................................... 13
Functional Description .............................................................. 13
Outline Dimensions ....................................................................... 22
Ordering Guide .......................................................................... 22
REVISION HISTORY
5/08—Rev. E to Rev. F
Changes to Figure 17 ........................................................................ 8
Changes to Functional Description Section ............................... 13
Changes to THD Readings vs. Common-Mode Voltage
Section .............................................................................................. 17
Changes to Output Current Capability Section ......................... 18
Changes to Figure 66 and Figure 67 ............................................. 19
Changes to Figure 68 ...................................................................... 20
Replaced Second-Order Low-Pass Filter Section ....................... 20
11/06—Rev. D to Rev. E
Updated Format .................................................................. Universal
Changes to Table 1 ............................................................................ 3
Changes to Table 2 ............................................................................ 4
Changes to Outline Dimensions ................................................... 21
Changes to Ordering Guide .......................................................... 21
2/04—Rev. C to Rev. D.
Changes to Specifications ................................................................. 2
Changes to Ordering Guide ............................................................. 4
Updated Outline Dimensions ....................................................... 17
10/02—Rev. B to Rev. C.
Updated Ordering Guide ................................................................. 4
Edits to Figure 15 ............................................................................ 12
Updated Outline Dimensions ....................................................... 16
5/02—Rev. A to Rev. B
Addition of Part Number AD8620 ................................... Universal
Addition of 8-Lead SOIC (R-8 Suffix) Drawing ............................ 1
Changes to General Description ..................................................... 1
Additions to Specifications .............................................................. 2
Change to Electrical Specifications ................................................. 3
Additions to Ordering Guide ........................................................... 4
Replace TPC 29 .................................................................................. 8
Add Channel Separation Test Circuit Figure ................................. 9
Add Channel Separation Graph ...................................................... 9
Changes to Figure 26 ...................................................................... 15
Addition of High-Speed, Low Noise Differential Driver
section .............................................................................................. 16
Addition of Figure 30 ..................................................................... 16
AD8610/AD8620
Rev. F | Page 3 of 24
SPECIFICATIONS
@ VS = ±5.0 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage (AD8610B) VOS 45 100 μV
−40°C < TA < +125°C 80 200 μV
Offset Voltage (AD8620B) VOS 45 150 μV
−40°C < TA < +125°C 80 300 μV
Offset Voltage (AD8610A/AD8620A) VOS 85 250 μV
25°C < TA < 125°C 90 350 μV
−40°C < TA < +125°C 150 850 μV
Input Bias Current IB −10 +2 +10 pA
−40°C < TA < +85°C −250 +130 +250 pA
−40°C < TA < +125°C −2.5 +1.5 +2.5 nA
Input Offset Current IOS −10 +1 +10 pA
−40°C < TA < +85°C −75 +20 +75 pA
−40°C < TA < +125°C −150 +40 +150 pA
Input Voltage Range −2 +3 V
Common-Mode Rejection Ratio CMRR VCM = –1.5 V to +2.5 V 90 95 dB
Large Signal Voltage Gain AVO RL = 1 kΩ, VO = −3 V to +3 V 100 180 V/mV
Offset Voltage Drift (AD8610B) ΔVOS/ΔT −40°C < TA < +125°C 0.5 1 μV/°C
Offset Voltage Drift (AD8620B) ΔVOS/ΔT −40°C < TA < +125°C 0.5 1.5 μV/°C
Offset Voltage Drift (AD8610A/AD8620A) ΔVOS/ΔT −40°C < TA < +125°C 0.8 3.5 μV/°C
OUTPUT CHARACTERISTICS
Output Voltage High VOH RL = 1 kΩ, −40°C < TA < +125°C 3.8 4 V
Output Voltage Low VOL RL = 1 kΩ, −40°C < TA < +125°C −4 −3.8 V
Output Current IOUT VOUT > ±2 V ±30 mA
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = ±5 V to ±13 V 100 110 dB
Supply Current per Amplifier ISY VO = 0 V 2.5 3.0 mA
−40°C < TA < +125°C 3.0 3.5 mA
DYNAMIC PERFORMANCE
Slew Rate SR RL = 2 kΩ 40 50 V/μs
Gain Bandwidth Product GBP 25 MHz
Settling Time tS AV = +1, 4 V step, to 0.01% 350 ns
NOISE PERFORMANCE
Voltage Noise en p-p 0.1 Hz to 10 Hz 1.8 μV p-p
Voltage Noise Density en f = 1 kHz 6 nV/√Hz
Current Noise Density in f = 1 kHz 5 fA/√Hz
Input Capacitance CIN
Differential Mode 8 pF
Common Mode 15 pF
Channel Separation CS
f = 10 kHz 137 dB
f = 300 kHz 120 dB
AD8610/AD8620
Rev. F | Page 4 of 24
ELECTRICAL SPECIFICATIONS
@ VS = ±13 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage (AD8610B) VOS 45 100 μV
−40°C < TA < +125°C 80 200 μV
Offset Voltage (AD8620B) VOS 45 150 μV
−40°C < TA < +125°C 80 300 μV
Offset Voltage (AD8610A/AD8620A) VOS 85 250 μV
25°C < TA < 125°C 90 350 μV
−40°C < TA < +125°C 150 850 μV
Input Bias Current IB −10 +3 +10 pA
−40°C < TA < +85°C −250 +130 +250 pA
−40°C < TA < +125°C −3.5 +3.5 nA
Input Offset Current IOS −10 +1.5 +10 pA
−40°C < TA < +85°C −75 +20 +75 pA
−40°C < TA < +125°C −150 +40 +150 pA
Input Voltage Range −10.5 +10.5 V
Common-Mode Rejection Ratio CMRR VCM = −10 V to +10 V 90 110 dB
Large Signal Voltage Gain AVO RL = 1 kΩ, VO = −10 V to +10 V 100 200 V/mV
Offset Voltage Drift (AD8610B) ΔVOS/ΔT −40°C < TA < +125°C 0.5 1 μV/°C
Offset Voltage Drift (AD8620B) ΔVOS/ΔT −40°C < TA < +125°C 0.5 1.5 μV/°C
Offset Voltage Drift (AD8610A/AD8620A) ΔVOS/ΔT −40°C < TA < +125°C 0.8 3.5 μV/°C
OUTPUT CHARACTERISTICS
Output Voltage High VOH RL = 1 kΩ, −40°C < TA < +125°C +11.75 +11.84 V
Output Voltage Low VOL RL = 1 kΩ, −40°C < TA < +125°C −11.84 −11.75 V
Output Current IOUT VOUT > 10 V ±45 mA
Short-Circuit Current ISC ±65 mA
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = ±5 V to ±13 V 100 110 dB
Supply Current per Amplifier ISY VO = 0 V 3.0 3.5 mA
−40°C < TA < +125°C 3.5 4.0 mA
DYNAMIC PERFORMANCE
Slew Rate SR RL = 2 kΩ 40 60 V/μs
Gain Bandwidth Product GBP 25 MHz
Settling Time tS AV = +1, 10 V step, to 0.01% 600 ns
NOISE PERFORMANCE
Voltage Noise en p-p 0.1 Hz to 10 Hz 1.8 μV p-p
Voltage Noise Density en f = 1 kHz 6 nV/√Hz
Current Noise Density in f = 1 kHz 5 fA/√Hz
Input Capacitance CIN
Differential Mode 8 pF
Common Mode 15 pF
Channel Separation CS
f = 10 kHz 137 dB
f = 300 kHz 120 dB
AD8610/AD8620
Rev. F | Page 5 of 24
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage 27.3 V
Input Voltage VS− to VS+
Differential Input Voltage ±Supply voltage
Output Short-Circuit Duration to GND Indefinite
Storage Temperature Range –65°C to +150°C
Operating Temperature Range –40°C to +125°C
Junction Temperature Range –65°C to +150°C
Lead Temperature (Soldering, 10 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 4. Thermal Resistance
Package Type θJA1 θ
JC Unit
8-Lead MSOP (RM) 190 44 °C/W
8-Lead SOIC (R) 158 43 °C/W
1 θJA is specified for worst-case conditions, that is, θJA is specified for a device
soldered in circuit board for surface-mount packages.
ESD CAUTION
AD8610/AD8620
Rev. F | Page 6 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
–250 –150 –50 50 150 250
02730-003
NUMBER OF AMPLIFIERS
INPUT OFFSET VOLTAGE (µV)
14
8
6
4
2
10
12
0
V
S
= ±13V
Figure 3. Input Offset Voltage
–40 25 85 125
02730-004
INPUT OFFSET VOLTAGE (µV)
TEMPERATURE (°C)
600
0
–200
–400
200
400
–600
V
S
= ±13V
Figure 4. Input Offset Voltage vs. Temperature at ±13 V (300 Amplifiers)
02730-005
14
8
6
4
2
10
12
0
16
18
–250 –150 –50 50 150 250
NUMBER OF AMPLIFIERS
INPUT OFFSET VOLTAGE (µV)
V
S
= ±5V
Figure 5. Input Offset Voltage
–40 25 85 125
02730-006
INPUT OFFSET VOLTAGE (µV)
TEMPERATURE (°C)
600
0
–200
–400
200
400
–600
VS = ±5V
Figure 6. Input Offset Voltage vs. Temperature at ±5 V (300 Amplifiers)
0 0.2 0.6 1.0 1.4 1.8 2.2 2.6
02730-007
NUMBER OF AMPLIFIERS
TCVOS (µV/°C)
14
0
12
10
8
6
4
2
VS = ±5V OR ±13V
Figure 7. Input Offset Voltage Drift
3.6
3.4
2.0
2.8
2.6
2.4
2.2
3.2
3.0
10–10 5–5 0
02730-008
INPUT BIAS CURRENT (pA)
COMMON-MODE VOLTAGE (V)
VS = ±13V
Figure 8. Input Bias Current vs. Common-Mode Voltage
AD8610/AD8620
Rev. F | Page 7 of 24
3.0
0
2.0
1.5
1.0
0.5
2.5
0321 4 5 6 7 8 9 10 11 12 13
02730-009
SUPPLY CURRENT (mA)
SUPPLY VOLTAGE (±V)
Figure 9. Supply Current vs. Supply Voltage
3.05
2.55
2.85
2.75
2.65
2.95
–40 1258525
02730-010
SUPPLY CURRENT (mA)
TEMPERATURE (°C)
V
S
= ±13V
Figure 10. Supply Current vs. Temperature
2.65
2.30
2.35
2.40
2.45
2.50
2.55
2.60
–40 1258525
02730-011
SUPPLY CURRENT (mA)
TEMPERATURE (°C)
V
S
= ±5V
Figure 11. Supply Current vs. Temperature
1.8
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
100 10k 100k1k 1M 10M 100M
02730-012
OUTPUT VOLTAGE TO SUPPLY RAIL (V)
RESISTANCE LOAD (Ω)
V
S
= ±13V
Figure 12. Output Voltage to Supply Rail vs. Resistance Load
4.25
3.95
4.00
4.05
4.10
4.15
4.20
25 85–40 125
02730-013
OUTPUT VOLTAGE HIGH (V)
TEMPERATURE (°C)
V
S
= ±5V
R
L
= 1kΩ
Figure 13. Output Voltage High vs. Temperature
–4.30
–4.25
–
3.95
–4.00
–4.05
–4.10
–4.15
–4.20
25 85–40 125
02730-014
OUTPUT VOLTAGE LOW (V)
TEMPERATURE (°C)
V
S
= ±5V
R
L
= 1kΩ
Figure 14. Output Voltage Low vs. Temperature
AD8610/AD8620
Rev. F | Page 8 of 24
11.80
12.05
12.00
11.95
11.90
11.85
25 85–40 125
02730-015
OUTPUT VOLTAGE HIGH (V)
TEMPERATURE (°C)
V
S
= ±13V
R
L
= 1kΩ
Figure 15. Output Voltage High vs. Temperature
–12.05
–
11.80
–12.00
–11.95
–11.90
–11.85
25 85–40 125
02730-016
OUTPUT VOLTAGE LOW (V)
TEMPERATURE (°C)
V
S
= ±13V
R
L
= 1kΩ
Figure 16. Output Voltage Low vs. Temperature
120
100
80
60
40
20
0
–20
1kHz 10kHz 100kHz 1MHz 10MHz 50MHz
FREQUENCY
GAIN AND PHASE (dB AND DEGREES)
02730-017
AD8610
V
S
= ±13V
C
L
= 20pF
Figure 17. Open-Loop Gain and Phase vs. Frequency
–40
60
40
20
0
–20
1k 10k 100k 1M 10M 100M
02730-018
CLOSED-LOOP GAIN (dB)
FREQUENCY (Hz)
G = +100
G = +10
G = +1
VS= ±13V
RL = 2kΩ
CL = 20pF
Figure 18. Closed-Loop Gain vs. Frequency
100
120
140
160
180
200
220
240
260
–40 25 85 125
02730-019
A
VO
(V/mV)
TEMPERATURE (°C)
V
S
= ±13V
V
O
= ±10V
R
L
= 1kΩ
Figure 19. AVO vs. Temperature
100
110
120
130
140
150
160
170
180
190
–40 25 85 125
02730-020
AVO (V/mV)
TEMPERATURE (°C)
VS= ±5V
VO = ±3V
RL = 1kΩ
Figure 20. AVO vs. Temperature
AD8610/AD8620
Rev. F | Page 9 of 24
+PSRR
–PSRR
–40
–20
0
20
40
60
80
100
120
140
160
02730-021
PSRR (dB)
FREQUENCY (Hz)
V
S
= ±13V
100 10k 100k1k 1M 10M 60M
Figure 21. PSRR vs. Frequency
+PSRR
–PSRR
–40
–20
0
20
40
60
80
100
120
140
160
02730-022
PSRR (dB)
FREQUENCY (Hz)
V
S
= ±5V
100 10k 100k1k 1M 10M 60M
Figure 22. PSRR vs. Frequency
122
116
117
118
119
120
121
25 85–40 125
02730-023
PSRR (dB)
TEMPERATURE (°C)
Figure 23. PSRR vs. Temperature
0
20
40
60
80
100
120
140
02730-024
CMRR (dB)
FREQUENCY (Hz)
10 100 10k 100k1k 1M 10M 60M
V
S
= ±13V
Figure 24. CMRR vs. Frequency
V
IN
0V
0V
V
OUT
CH
2
= 5V/DIV
02730-025
VOLTAGE (300mV/DIV)
TIME (4µs/DIV)
V
S
= ±13V
V
IN
= –300mV p-p
A
V
= –100
R
L
= 10kΩ
Figure 25. Positive Overvoltage Recovery
V
IN
0V
V
OUT
CH
2
= 5V/DIV
02730-026
VOLTAGE (300mV/DIV)
TIME (4µs/DIV)
V
S
= ±13V
V
IN
= 300mV p-p
A
V
= –100
R
L
= 10kΩ
C
L
= 0pF
0V
Figure 26. Negative Overvoltage Recovery
AD8610/AD8620
Rev. F | Page 10 of 24
V
S
= ±13V
V
IN
p-p = 1.8µV
PEAK-TO-PEAK VOLTAGE NOISE (1µV/DIV)
TIME (1s/DIV)
02730-027
Figure 27. 0.1 Hz to 10 Hz Input Voltage Noise
1
10
100
1000
02730-028
VOLTAGE NOISE DENSITY (nV/ Hz)
FREQUENCY (Hz)
V
S
= ±13V
1 10 100 10k 100k1k 1M
Figure 28. Input Voltage Noise Density vs. Frequency
0
10
20
30
40
50
60
70
80
90
100
02730-029
Z
OUT
(Ω)
FREQUENCY (Hz)
10k 100k1k 100M10M1M
GAIN = +10
GAIN = +100
GAIN = +1
V
S
= ±13V
Figure 29. ZOUT vs. Frequency
0
10
20
30
40
50
60
70
80
90
100
02730-030
Z
OUT
(Ω)
FREQUENCY (Hz)
10k 100k1k 100M10M1M
GAIN = +10
GAIN = +100
GAIN = +1
V
S
= ±5V
Figure 30. ZOUT vs. Frequency
0
500
1000
1500
2000
2500
3000
02730-031
I
B
(pA)
TEMPERATURE (°C)
025 12585
Figure 31. Input Bias Current vs. Temperature
0
5
10
15
20
25
40
30
35
02730-032
SMALL SIGNAL OVERSHOOT (%)
CAPACITANCE (pF)
0 10 100 10k1k
+OS –OS
V
S
= ±13V
R
L
= 2kΩ
V
IN
= 100mV p-p
Figure 32. Small Signal Overshoot vs. Load Capacitance
AD8610/AD8620
Rev. F | Page 11 of 24
0
5
10
15
20
25
40
30
35
02730-033
SMALL SIGNAL OVERSHOOT (%)
CAPACITANCE (pF)
0 10 100 10k1k
+OS –OS
V
S
= ±5V
R
L
= 2kΩ
V
IN
= 100mV
Figure 33. Small Signal Overshoot vs. Load Capacitance
02730-034
VOLTAGE (5V/DIV)
TIME (400µs/DIV)
VS = ±13V
VIN = ±14V
AV = +1
FREQ = 0.5kHz
VIN
VOUT
Figure 34. No Phase Reversal
02730-035
VOLTAGE (5V/DIV)
TIME (1µs/DIV)
V
S
= ±13V
V
IN
p-p = 20V
A
V
= +1
R
L
= 2kΩ
C
L
= 20pF
Figure 35. Large Signal Response at G = +1
02730-036
VOLTAGE (5V/DIV)
TIME (400ns/DIV)
V
S
= ±13V
V
IN
p-p = 20V
A
V
= +1
R
L
= 2kΩ
C
L
= 20pF
Figure 36. +Slew Rate at G = +1
02730-037
VOLTAGE (5V/DIV)
TIME (400ns/DIV)
V
S
= ±13V
V
IN
p-p = 20V
A
V
= +1
R
L
= 2kΩ
C
L
= 20pF
Figure 37. –Slew Rate at G = +1
02730-038
VOLTAGE (5V/DIV)
TIME (1µs/DIV)
V
S
= ±13V
V
IN
p-p = 20V
A
V
= –1
R
L
= 2kΩ
C
L
= 20pF
Figure 38. Large Signal Response at G = −1
AD8610/AD8620
Rev. F | Page 12 of 24
02730-039
VOLTAGE (5V/DIV)
TIME (400ns/DIV)
V
S
= ±13V
V
IN
p-p = 20V
A
V
= –1
R
L
= 2kΩ
SR = 55V/µs
C
L
= 20pF
Figure 39. +Slew Rate at G = −1
02730-040
VOLTAGE (5V/DIV)
TIME (400ns/DIV)
V
S
= ±13V
V
IN
p-p = 20V
A
V
= –1
R
L
= 2kΩ
SR = 50V/µs
C
L
= 20pF
Figure 40. –Slew Rate at G = −1
AD8610/AD8620
Rev. F | Page 13 of 24
THEORY OF OPERATION
+
–
VIN
2
0V p-
p
3
2
U1
+13V
–13V
R4
2kΩ
R2
2kΩ
R1
20kΩ
R3
2kΩU2
5
6
7
V+
V–
V–
V+
CS (dB) = 20 log (VOUT / 10 × VIN)
0
2730-041
Figure 41. Channel Separation Test Circuit
FUNCTIONAL DESCRIPTION
The AD8610/AD8620 are manufactured on the Analog Devices,
Inc., XFCB (eXtra fast complementary bipolar) process. XFCB
is fully dielectrically isolated (DI) and used in conjunction with
N-channel JFET technology and thin film resistors (that can be
trimmed) to create the JFET input amplifier. Dielectrically isolated
NPN and PNP transistors fabricated on XFCB have an fτ > 3 GHz.
Low TC thin film resistors enable very accurate offset voltage and
offset voltage temperature coefficient trimming. These process
breakthroughs allow Analog Devices IC designers to create an
amplifier with faster slew rate and more than 50% higher band-
width at half of the current consumed by its closest competition.
The AD8610/AD8620 are unconditionally stable in all gains,
even with capacitive loads well in excess of 1 nF. The AD8610B
grade achieves less than 100 V of offset and 1 V/°C of offset
drift, numbers usually associated with very high precision bipolar
input amplifiers. The AD8610 is offered in the tiny 8-lead MSOP
as well as narrow 8-lead SOIC surface-mount packages and is
fully specified with supply voltages from ±5.0 V to ±13 V. The
very wide specified temperature range, up to 125°C, guarantees
superior operation in systems with little or no active cooling.
The unique input architecture of the AD8610/AD8620 features
extremely low input bias currents and very low input offset voltage.
Low power consumption minimizes the die temperature and
maintains the very low input bias current. Unlike many competi-
tive JFET amplifiers, the AD8610/AD8620 input bias currents are
low even at elevated temperatures. Typical bias currents are less
than 200 pA at 85°C. The gate current of a JFET doubles every
10°C, resulting in a similar increase in input bias current over
temperature. Give special care to the PC board layout to minimize
leakage currents between PCB traces. Improper layout and
board handling generates a leakage current that exceeds the bias
current of the AD8610/AD8620.
138
136
120
128
126
124
122
132
130
134
02730-042
CS (dB)
FREQUENCY (kHz)
0 100 150 20050 250 300 350
Figure 42. AD8620 Channel Separation Graph
Power Consumption
A major advantage of the AD8610/AD8620 in new designs is
the power saving capability. Lower power consumption of the
AD8610/AD8620 makes them much more attractive for portable
instrumentation and for high density systems, simplifying thermal
management, and reducing power-supply performance require-
ments. Compare the power consumption of the AD8610 vs. the
OPA627 in Figure 43.
8
7
2
6
5
4
3
02730-043
SUPPLY CURRENT (mA)
TEMPERATURE (°C)
–75 –25 0 25–50 50 75 100 125
OPA627
AD8610
Figure 43. Supply Current vs. Temperature
AD8610/AD8620
Rev. F | Page 14 of 24
Driving Large Capacitive Loads
The AD8610/AD8620 have excellent capacitive load driving
capability and can safely drive up to 10 nF when operating with
a ±5.0 V supply. Figure 44 and Figure 45 compare the AD8610/
AD8620 against the OPA627 in the noninverting gain configu-
ration driving a 10 k resistor and 10,000 pF capacitor placed
in parallel on its output, with a square wave input set to a frequency
of 200 kHz. The AD8610/AD8620 have much less ringing than
the OPA627 with heavy capacitive loads.
02730-044
VOLTAGE (20mV/DIV)
TIME (2µs/DIV)
V
S
= ±5V
R
L
= 10kΩ
C
L
= 10,000pF
Figure 44. OPA627 Driving CL = 10,000 pF
02730-045
VOLTAGE (20mV/DIV)
TIME (2µs/DIV)
V
S
= ±5V
R
L
= 10kΩ
C
L
= 10,000pF
Figure 45. AD8610/AD8620 Driving CL = 10,000 pF
The AD8610/AD8620 can drive much larger capacitances
without any external compensation. Although the AD8610/
AD8620 are stable with very large capacitive loads, remember
that this capacitive loading limits the bandwidth of the amplifier.
Heavy capacitive loads also increase the amount of overshoot
and ringing at the output. Figure 47 and Figure 48 show the
AD8610/AD8620 and the OPA627 in a noninverting gain of +2
driving 2 F of capacitance load. The ringing on the OPA627 is
much larger in magnitude and continues 10 times longer than
the AD8610/AD8620.
V
IN
= 50mV
2kΩ2kΩ
–5V
+5
V
2µF
3
2
7
4
02730-046
Figure 46. Capacitive Load Drive Test Circuit
02730-047
VOLTAGE (50mV/DIV)
TIME (20µs/DIV)
V
S
= ±5V
R
L
= 10kΩ
C
L
= 2µF
Figure 47. OPA627 Capacitive Load Drive, AV = +2
02730-048
VOLTAGE (50mV/DIV)
TIME (20µs/DIV)
V
S
= ±5V
R
L
= 10kΩ
C
L
= 2µF
Figure 48. AD8610/AD8620 Capacitive Load Drive, AV = +2
AD8610/AD8620
Rev. F | Page 15 of 24
Slew Rate (Unity Gain Inverting vs. Noninverting)
Amplifiers generally have a faster slew rate in an inverting unity
gain configuration due to the absence of the differential input
capacitance. Figure 49 through Figure 52 show the performance
of the AD8610/AD8620 configured in a unity gain of –1 compared
to the OPA627. The AD8610/AD8620 slew rate is more symme-
trical, and both the positive and negative transitions are much
cleaner than in the OPA627.
02730-049
VOLTAGE (5V/DIV)
TIME (400ns/DIV)
V
S
= ±13V
R
L
= 2kΩ
G= –1
SR = 54V/µs
Figure 49. +Slew Rate of AD8610/AD8620 in Unity Gain of –1
02730-050
VOLTAGE (5V/DIV)
TIME (400ns/DIV)
V
S
= ±13V
R
L
= 2kΩ
G= –1
SR = 42.1V/µs
Figure 50. +Slew Rate of OPA627 in Unity Gain of –1
02730-051
VOLTAGE (5V/DIV)
TIME (400ns/DIV)
V
S
= ±13V
R
L
= 2kΩ
G= –1
SR = 54V/µs
Figure 51. –Slew Rate of AD8610/AD8620 in Unity Gain of –1
02730-052
VOLTAGE (5V/DIV)
TIME (400ns/DIV)
V
S
= ±13V
R
L
= 2kΩ
G= –1
SR = 56V/µs
Figure 52. –Slew Rate of OPA627 in Unity Gain of –1
The AD8610/AD8620 have a very fast slew rate of 60 V/s even
when configured in a noninverting gain of +1. This is the toughest
condition to impose on any amplifier because the input common-
mode capacitance of the amplifier generally makes its SR appear
worse. The slew rate of an amplifier varies according to the voltage
difference between its two inputs. To observe the maximum SR,
a voltage difference of about 2 V between the inputs must be
ensured. This is required for virtually any JFET op amp so that
one side of the op amp input circuit is completely off, thus maxi-
mizing the current available to charge and discharge the internal
compensation capacitance. Lower differential drive voltages
produce lower slew rate readings. A JFET input op amp with a
slew rate of 60 V/s at unity gain with VIN = 10 V may slew at
20 V/s if it is operated at a gain of +100 with VIN = 100 mV.
AD8610/AD8620
Rev. F | Page 16 of 24
The slew rate of the AD8610/AD8620 is double that of the
OPA627 when configured in a unity gain of +1 (see Figure 53
and Figure 54).
02730-053
VOLTAGE (5V/DIV)
TIME (400ns/DIV)
V
S
= ±13V
R
L
= 2kΩ
G= +1
SR = 85V/µs
Figure 53. +Slew Rate of AD8610/AD8620 in Unity Gain of +1
02730-054
VOLTAGE (5V/DIV)
TIME (400ns/DIV)
V
S
= ±13V
R
L
= 2kΩ
G= +1
SR = 23V/µs
Figure 54. +Slew Rate of OPA627 in Unity Gain of +1
The slew rate of an amplifier determines the maximum frequency
at which it can respond to a large signal input. This frequency
(known as full power bandwidth or FPBW) can be calculated
for a given distortion (for example, 1%) from the equation
()
PEAK
V
SR
FPBW
×π
=
2
02730-055
VOLTAGE (10V/DIV)
TIME (400ns/DIV)
CH
1
= 20.8V p-p
CH
2
= 19.4V p-p
0V
0V
Figure 55. AD8610 FPBW
Input Overvoltage Protection
When the input of an amplifier is driven below VEE or above VCC
by more than one VBE, large currents flow from the substrate
through the negative supply (V–) or the positive supply (V+),
respectively, to the input pins and can destroy the device. If the
input source can deliver larger currents than the maximum
forward current of the diode (>5 mA), a series resistor can be
added to protect the inputs. With its very low input bias and
offset current, a large series resistor can be placed in front of the
AD8610/AD8620 inputs to limit current to below damaging
levels. Series resistance of 10 k generates less than 25 V of offset.
This 10 k allows input voltages more than 5 V beyond either
power supply. Thermal noise generated by the resistor adds
7.5 nV/√Hz to the noise of the AD8610/AD8620. For the AD8610/
AD8620, differential voltages equal to the supply voltage do not
cause any problems (see Figure 55). In this context, note that the
high breakdown voltage of the input FETs eliminates the need to
include clamp diodes between the inputs of the amplifier, a practice
that is mandatory on many precision op amps. Unfortunately,
clamp diodes greatly interfere with many application circuits,
such as precision rectifiers and comparators. The AD8610/
AD8620 are free from these limitations.
V1
–13V
3
2
7
4
+13
V
14V
0
6
AD8610
02730-056
Figure 56. Unity Gain Follower
No Phase Reversal
Many amplifiers misbehave when one or both of the inputs are
forced beyond the input common-mode voltage range. Phase
reversal is typified by the transfer function of the amplifier,
effectively reversing its transfer polarity. In some cases, this can
cause lockup and even equipment damage in servo systems and
can cause permanent damage or no recoverable parameter shifts
to the amplifier itself. Many amplifiers feature compensation
circuitry to combat these effects, but some are only effective for
the inverting input. The AD8610/AD8620 are designed to prevent
phase reversal when one or both inputs are forced beyond their
input common-mode voltage range.
02730-057
VOLTAGE (5V/DIV)
TIME (400µs/DIV)
V
OUT
V
IN
Figure 57. No Phase Reversal
AD8610/AD8620
Rev. F | Page 17 of 24
THD Readings vs. Common-Mode Voltage
Total harmonic distortion of the AD8610/AD8620 is well below
0.0006% with any load down to 600 . The AD8610 outperforms
the OPA627 for distortion, especially at frequencies above 20 kHz.
10 100 1k 10k 80k
02730-058
THD + N (%)
FREQUENCY (Hz)
0.1
0.01
0.001
0.0001
OPA627
AD8610
V
S
= ±13V
V
IN
= 5V rms
BW = 80kHz
Figure 58. AD8610 vs. OPA627 THD + Noise @ VCM = 0 V
10 100 1k 10k 20k
02730-059
THD + N (%)
FREQUENCY (Hz)
0.1
0.01
0.001
4V rms
6V rms
2V rms
V
S
= ±13V
R
L
= 600Ω
Figure 59. THD + Noise vs. Frequency
Noise vs. Common-Mode Voltage
The AD8610/AD8620 noise density varies only 10% over the
input range, as shown in Table 5.
Table 5. Noise vs. Common-Mode Voltage
VCM at f = 1 kHz (V) Noise Reading (nV/√Hz)
−10 7.21
−5 6.89
0 6.73
+5 6.41
+10 7.21
Settling Time
The AD8610/AD8620 have a very fast settling time, even to a
very tight error band, as can be seen from Figure 60. The AD8610/
AD8620 are configured in an inverting gain of +1 with 2 k input
and feedback resistors. The output is monitored with a 10×,
10 M, 11.2 pF scope probe.
0.001 0.01 0.1 1 10
02730-060
SETTLING TIME (ns)
ERROR BAND (%)
1.2k
1.0k
800
600
400
200
0
Figure 60. AD8610/AD8620 Settling Time vs. Error Band
OPA627
0.001 0.01 0.1 1 10
02730-061
SETTLING TIME (ns)
ERROR BAND (%)
1.2k
1.0k
800
600
400
200
0
Figure 61. OPA627 Settling Time vs. Error Band
AD8610/AD8620
Rev. F | Page 18 of 24
The AD8610/AD8620 maintain this fast settling time when
loaded with large capacitive loads, as shown in Figure 62.
0 500 1000 1500 2000
02730-062
SETTLING TIME (µs)
C
L
(pF)
3.0
2.5
2.0
1.5
1.0
0.5
0
ERROR BAND = ±0.01%
Figure 62. AD8610/AD8620 Settling Time vs. Load Capacitance
0 500 1000 1500 2000
02730-063
SETTLING TIME (µs)
C
L
(pF)
3.0
2.5
2.0
1.5
1.0
0.5
0
ERROR BAND = ±0.01%
Figure 63. OPA627 Settling Time vs. Load Capacitance
Output Current Capability
The AD8610/AD8620 can drive very heavy loads due to its
high output current. It is capable of sourcing or sinking 45 mA
at ±10 V output. The short-circuit current is quite high and the
part is capable of sinking about 95 mA and sourcing over 60 mA
while operating with supplies of ±13 V. Figure 64 and Figure 65
compare the output voltage vs. load current of AD8610/
AD8620 and OPA627.
0.00001 0.0001 0.001 0.01 0.1 1
02730-064
DELTA FROM RESPECTIVE RAIL (V)
LOAD CURRENT (A)
10
1
0.1
V
CC
V
EE
Figure 64. AD8610/AD8620 Dropout from ±13 V vs. Load Current
0.00001 0.0001 0.001 0.01 0.1 1
02730-065
DELTA FROM RESPECTIVE RAIL (V)
LOAD CURRENT (A)
10
1
0.1
V
EE
V
CC
Figure 65. OPA627 Dropout from ±15 V vs. Load Current
Although operating conditions imposed on the AD8610/AD8620
(±13 V) are less favorable than the OPA627 (±15 V), it can be
seen that the AD8610/AD8620 have much better drive capability
(lower headroom to the supply) for a given load current.
Operating with Supplies Greater than ±13 V
The AD8610/AD8620 maximum operating voltage is specified
at ±13 V. When ±13 V is not readily available, an inexpensive
LDO can provide ±12 V from a nominal ±15 V supply.
AD8610/AD8620
Rev. F | Page 19 of 24
Input Offset Voltage Adjustment
Offset of AD8610 is very small and normally does not require
additional offset adjustment. However, the offset adjust pins can
be used as shown in Figure 66 to further reduce the dc offset. By
using resistors in the range of 50 k, offset trim range is ±3.3 mV.
R1
V
+
V
OUT
V–
AD8610
02730-066
7
6
1
5
4
3
2
Figure 66. Offset Voltage Nulling Circuit
Programmable Gain Amplifier (PGA)
The combination of low noise, low input bias current, low input
offset voltage, and low temperature drift make the AD8610/
AD8620 a perfect solution for programmable gain amplifiers.
PGAs are often used immediately after sensors to increase the
dynamic range of the measurement circuit. Historically, the large
on resistance of switches (combined with the large IB currents
of amplifiers) created a large dc offset in PGAs. Recent and
improved monolithic switches and amplifiers completely remove
these problems. A PGA discrete circuit is shown in Figure 67.
In Figure 67, when the 10 pA bias current of the AD8610 is
dropped across the (<5 ) RON of the switch, it results in a
negligible offset error.
When high precision resistors are used, as in the circuit of
Figure 67, the error introduced by the PGA is within the
½ LSB requirement for a 16-bit system.
V
IN
V
OUT
AD8610
7
4
6
5
1
2
3
IN1
S1
D1 10kΩ
10kΩ
1kΩ
+5
V
–5V
IN2
S2
D2
IN3
S3
D3
IN4
S4
D4
ADG452
3
2
14
15
11
10
6
7
V
L
V
DD
1312
1
16
9
8
74HC139 V
SS
4
GND
5
1kΩ
100Ω
11Ω
5pF
G = +1
G = +10
G = +100
G = +1000
+5V+5V
–5V
Y
0
Y
1
Y
2
Y
3
G
A
B
A
0
A
1
02730-067
100Ω
Figure 67. High Precision PGA
1. Room temperature error calculation due to RON and IB
ΔVOS = IB × RON = 2 pA × 5 = 10 pV
Total Offset = AD8610 (Offset) + ΔVOS
Total Offset = AD8610 (Offset_Trimmed) + ΔVOS
Total Offset = 5 µV + 10 pV ≈ 5 µV
2. Full temperature error calculation due to RON and IB
ΔVOS (@ 85°C) = IB (@ 85°C) × RON (@ 85°C) =
250 pA × 15 = 3.75 nV
3. The temperature coefficient of switch and AD8610/AD8620
combined is essentially the same as the TCVOS of the
AD8610/AD8620.
VOS/T(total) = VOS/ΔT(AD8610/AD8620) +
VOS/T(IB × RON)
VOS/ΔT(total) = 0.5 µV/°C + 0.06 nV/°C ≈ 0.5 µV/°C
AD8610/AD8620
Rev. F | Page 20 of 24
High Speed Instrumentation Amplifier
The 3-op-amp instrumentation amplifiers shown in Figure 68 can
provide a range of gains from unity up to 1000 or higher. The
instrumentation amplifier configuration features high common-
mode rejection, balanced differential inputs, and stable, accurately
defined gain. Low input bias currents and fast settling are achieved
with the JFET input AD8610/AD8620. Most instrumentation
amplifiers cannot match the high frequency performance of this
circuit. The circuit bandwidth is 25 MHz at a gain of 1, and close to
5 MHz at a gain of 10. Settling time for the entire circuit is 550 ns to
0.01% for a 10 V step (gain = 10). Note that the resistors around
the input pins need to be small enough in value so that the RC
time constant they form in combination with stray circuit capaci-
tance does not reduce circuit bandwidth.
02730-068
1/2 AD8620
+INB
R2
1kΩ
C2
10pF
R4
2kΩC4
15pF
V
OUT
R8
2kΩ
R7
2kΩ
R1
1kΩ
C5
10pF
V–
V+
AD8610
U2
C3
15pF
R5
2kΩ
R6
2kΩ
+INA
V–
V
+
1/2 AD8620
U1
RG
5
6
7
U1
7
4
6
3
2
8
4
1
3
2
Figure 68. High Speed Instrumentation Amplifier
High Speed Filters
The four most popular configurations are Butterworth, Elliptical,
Bessel (Thompson), and Chebyshev. Each type has a response
that is optimized for a given characteristic, as shown in Table 6.
In active filter applications using operational amplifiers, the dc
accuracy of the amplifier is critical to optimal filter performance.
The offset voltage and bias current of the amplifier contribute to
output error. Input offset voltage is passed by the filter and can
be amplified to produce excessive output offset. For low frequency
applications requiring large value input resistors, bias and offset
currents flowing through these resistors also generate an offset
voltage.
At higher frequencies, the dynamic response of the amplifier
must be carefully considered. In this case, slew rate, bandwidth,
and open-loop gain play a major role in amplifier selection.
The slew rate must be both fast and symmetrical to minimize
distortion. The bandwidth of the amplifier, in conjunction with the
gain of the filter, dictates the frequency response of the filter. The
use of high performance amplifiers, such as the AD8610/AD8620,
minimizes both dc and ac errors in all active filter applications.
Second-Order, Low-Pass Filter
Figure 69 shows the AD8610 configured as a second-order,
Butterworth, low-pass filter. With the values as shown, the
design corner was 1 MHz, and the bench measurement was
974 kHz. The wide bandwidth of the AD8610/AD8620 allows
corner frequencies into the megahertz range, but the input
capacitances should be taken into account by making C1 and
C2 smaller than the calculated values. The following equations
can be used for component selection:
R1 = R2 = User Selected (Typical Values = 10 k to 100 k)
()
()
()
R1f
C1
CUTOFF
π
2
414.1
=
()
()
()
R1f
C2
CUTOFF
π
2
707.0
=
where C1 and C2 are in farads.
VIN
VOUT
AD8610
7
4
6
1
5
2
3
+13V
–13V
C2
110pF
C1
220pF
02730-069
R2
1020Ω
R1
1020Ω
U1
Figure 69. Second-Order, Low-Pass Filter
Table 6. Filter Types
Type Sensitivity Overshoot Phase Amplitude (Pass Band)
Butterworth Moderate Good Maximum flat
Chebyshev Good Moderate Nonlinear Equal ripple
Elliptical Best Poor Equal ripple
Bessel (Thompson) Poor Best Linear
AD8610/AD8620
Rev. F | Page 21 of 24
High Speed, Low Noise Differential Driver
The AD8620 is a perfect candidate as a low noise differential
driver for many popular ADCs. There are also other applica-
tions (such as balanced lines) that require differential drivers.
The circuit of Figure 70 is a unique line driver widely used in
industrial applications. With ±13 V supplies, the line driver can
deliver a differential signal of 23 V p-p into a 1 k load. The
high slew rate and wide bandwidth of the AD8620 combine to
yield a full power bandwidth of 145 kHz while the low noise
front end produces a referred-to-input noise voltage spectral
density of 6 nV/√Hz. The design is a balanced transmission system
without transformers, where output common-mode rejection of
noise is of paramount importance. Like the transformer-based
design, either output can be shorted to ground for unbalanced
line driver applications without changing the circuit gain of 1.
This allows the design to be easily set to noninverting, inverting,
or differential operation.
3
2
V–
3
2
V–
V+
5
6
V+
1/2 AD8620
U2
AD8610
1/2 AD8620
U3
6
7
0
1
0
02730-070
R3
1kΩ
R4
1kΩ
R13
1kΩ
R5
1kΩ
R6
10kΩ
R7
1kΩ
R1
1kΩ
R12
1kΩ
R2
1kΩ
R10
50Ω
R11
50Ω
R8
1kΩ
R9
1kΩ
VO2
VO1
VO2 – VO1 = VIN
V–
V+
Figure 70. Differential Driver
AD8610/AD8620
Rev. F | Page 22 of 24
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-187-AA
0.80
0.60
0.40
8°
0°
4
8
1
5
PIN 1
0.65 BSC
SEATING
PLANE
0.38
0.22
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.08
3.20
3.00
2.80
5.15
4.90
4.65
0.15
0.00
0.95
0.85
0.75
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-A A
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 71. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Figure 72. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
AD8610AR −40°C to +125°C 8-Lead SOIC_N R-8
AD8610AR-REEL −40°C to +125°C 8-Lead SOIC_N R-8
AD8610AR-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8
AD8610ARZ1 −40°C to +125°C 8-Lead SOIC_N R-8
AD8610ARZ-REEL1 −40°C to +125°C 8-Lead SOIC_N R-8
AD8610ARZ-REEL71 −40°C to +125°C 8-Lead SOIC_N R-8
AD8610ARM-REEL −40°C to +125°C 8-Lead MSOP RM-8 B0A
AD8610ARM-R2 −40°C to +125°C 8-Lead MSOP RM-8 B0A
AD8610ARMZ-REEL1 −40°C to +125°C 8-Lead MSOP RM-8 B0A#
AD8610ARMZ-R21 −40°C to +125°C 8-Lead MSOP RM-8 B0A#
AD8610BR −40°C to +125°C 8-Lead SOIC_N R-8
AD8610BR-REEL −40°C to +125°C 8-Lead SOIC_N R-8
AD8610BR-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8
AD8610BRZ1 −40°C to +125°C 8-Lead SOIC_N R-8
AD8610BRZ-REEL1 −40°C to +125°C 8-Lead SOIC_N R-8
AD8610BRZ-REEL71 −40°C to +125°C 8-Lead SOIC_N R-8
AD8620AR −40°C to +125°C 8-Lead SOIC_N R-8
AD8620AR-REEL −40°C to +125°C 8-Lead SOIC_N R-8
AD8620AR-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8
AD8620ARZ1 −40°C to +125°C 8-Lead SOIC_N R-8
AD8620ARZ-REEL1 −40°C to +125°C 8-Lead SOIC_N R-8
AD8620ARZ-REEL71 −40°C to +125°C 8-Lead SOIC_N R-8
AD8620BR −40°C to +125°C 8-Lead SOIC_N R-8
AD8620BR-REEL −40°C to +125°C 8-Lead SOIC_N R-8
AD8620BR-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8
AD8620BRZ1 −40°C to +125°C 8-Lead SOIC_N R-8
AD8620BRZ-REEL1 −40°C to +125°C 8-Lead SOIC_N R-8
AD8620BRZ-REEL71 −40°C to +125°C 8-Lead SOIC_N R-8
1 Z = RoHS Compliant Part, # denotes RoHs-compliant product can be top or bottom marked.
AD8610/AD8620
Rev. F | Page 23 of 24
NOTES
AD8610/AD8620
Rev. F | Page 24 of 24
NOTES
©2001–2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02730-0-5/08(F)
