SLUS184A - FEBRUARY 1999 - REVISED OCTOBER 2001 FEATURES D Integrated 0.15- Power MOSFET D 7-V to 15-V Operation D Digital Programmable Current Limit D D D D D D DESCRIPTION The UCC39151 programmable hot swap power manager provides complete power management, hot swap capability, and circuit breaker functions. The only external component required to operate the device, other than power supply bypassing, is the fault timing capacitor, CT. All control and housekeeping functions are integrated, and externally programmable. These include the fault current level, maximum output sourcing current, maximum fault time, and start-up delay. In the event of a constant fault, the internal fixed 2% duty cycle ratio limits average output power. from 0 A to 3 A Programmable On-Time Programmable Start Delay Fixed 2% Duty Cycle Thermal Shutdown Fault Output Indicator Power SOIC and TSSOP, Low ThermalResistance Packaging The internal 4-bit DAC allows programming of the fault level current from 0 A to 3 A with 0.25 A resolution. The IMAX control pin sets the maximum sourcing current to 1 A above the trip level or to a full 4 A of output current for fast output capacitor charging. TYPICAL APPLICATION HEATSINK GROUND PINS 4 12 13 5 GND GND GND GND V IN C IN R1 D1 2 VIN 3 VIN VOUT 14 VOUT 15 C OUT RL R SD UCC39151 (16-Pin Package) LED 16 +5V SHTDWN FAULT V IN 1 S6 C SD 11 CT CT B0 B1 B2 B3 9 8 7 6 IMAX 10 V IN S1 S2 S3 S4 S5 } DIP SWITCH UDG-98176 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2001, Texas Instruments Incorporated ! " #$%! " &$'(# ! ) !%* )$#!" # ! "&%## !" &% !+% !%" %, " "!$%!" "! ) ) - !.* )$#! &#%""/ )%" ! %#%"" (. #($)% !%"!/ (( & %!%"* www.ti.com 1 SLUS184A - FEBRUARY 1999 - REVISED OCTOBER 2001 description (continued) When the output current is below the fault level, the output MOSFET is switched on with a nominal on-resistance of 0.15 . When the output current exceeds the fault level, but is less than the maximum sourcing level, the output remains switched on but the fault timer starts, charging CT. Once CT charges to a preset threshold, the switch is turned off, and remains off for 50 times the programmed fault time. When the output current reaches the maximum sourcing level, the MOSFET transitions from a switch to a constant current source. absolute maximum ratings PWP PACKAGE (TOP VIEW) Input voltage, VIN . . . . . . . . . . . . . . . . . . . . 15.5 V (VOUT - VIN) . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V FAULT sink current . . . . . . . . . . . . . . . . . . . 50 mA FAULT voltage . . . . . . . . . . . . . . . . . . . -0.3 to 8 V Output current, VOUT . . . . . . . . . . . . Self limiting TTL input voltage . . . . . . . . . . . . . . . . -0.3 to VIN Storage temperature . . . . . . . . . -65C to 150C Junction temperature . . . . . . . . -55C to 150C Lead temperature (soldering 10 seconds) 300C SHTDWN VIN VIN NC GND* GND* GND* GND* EGND* B3 B2 B1 Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Currents are positive into, negative out of the specified terminal. 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 FAULT VOUT VOUT NC GND* GND* GND* GND* NC CT IMAX B0 NC = no connection DIL (N) or SOIC (DP) PACKAGE (TOP VIEW) SHTDWN VIN VIN GND* EGND* B3 B2 B1 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 FAULT VOUT VOUT GND* GND* CT IMAX B0 * Pin 5 on the N and DP packages (and pin 9 on the PWP package) serves as the lowest impedance to the electrical ground. Pins 4, 12 and 13 on the DP package (and pins 5, 6, 7, 8, 17, 18, 19, and 20 on the PWP package) serve as heatsink/ground. These pins should be connected to large etch areas to help dissipate heat. On the N package, pins 4, 12 and 13 are not connected. AVAILABLE OPTIONS PACKAGES TA SOIC (DP){ DIL (N) TSSOP (PWP){ 0C to 70C UCC39151DP UCC39151N UCC39151PWP The DP and PWP packages are available taped and reeled. Add TR suffix to device type (e.g. UCC39151DPTR) to order quantities of 2500 (DP) or 2000 (PWP) devices per reel. 2 www.ti.com SLUS184A - FEBRUARY 1999 - REVISED OCTOBER 2001 electrical characteristics over recommended operating virtual junction temperature range, TA = 0C to 70C, VIN = 12 V, IMAX = 0.4 V, SHTDWN = 2.4 V, TA = TJ (unless otherwise noted) supply PARAMETER TEST CONDITIONS Input voltage range MIN TYP 7.0 Supply current Sleep mode current SHTDWN = 0.2 V, No load Output leakage SHTDWN = 0.2 V MAX UNITS 15.0 V 1.0 2.0 mA 100 150 A 20 mA output PARAMETER TEST CONDITIONS TYP MAX 10 V VIN 12 V 0.15 0.3 10 V VIN 12 V 0.3 0.6 IOUT = 3 A, IOUT = 1 A, 10 V VIN 12 V 0.45 0.9 7 V VIN 15 V 0.2 0.4 IOUT = 2 A,, IOUT = 3 A, , 7 V VIN 15 V 0.4 0.8 7 V VIN 12 V(max) 0.6 1.2 IOUT = 1 A, IOUT = 2 A, Voltage drop MIN UNITS V Initial startup time See Note 1 100 s Short circuit response time See Note 1 100 ns Thermal shutdown temperature See Note 1 165 Thermal hysteresis See Note 1 10 C DAC PARAMETER TEST CONDITIONS MIN TYP MAX Code = 0100 0.07 0.25 0.45 Code = 0101 0.32 0.50 0.7 Code = 0110 0.50 0.75 0.98 Code = 0111 0.75 1.00 1.3 Code = 1000 1.0 1.25 1.6 Code = 1001 1.25 1.50 1.85 Code = 1010 1.5 1.75 2.15 Code = 1011 1.70 2.00 2.4 Code = 1100 1.90 2.25 2.7 Code = 1101 2.1 2.50 2.95 Code = 1110 2.30 2.75 3.25 Code = 1111 2.50 3.0 3.5 0.35 1.0 1.65 3.0 4.0 5.2 MIN TYP MAX UNITS 250 A 0.8 V Code = 0000 to 0011, Trip current Tri UNITS (device off) Maximum output current over trip level (current source mode) Code = 0100 to 1111, IMAX = 0 V Maximum output current (current source mode) Code = 0100 to 1111, IMAX = 2.4 V A open drain output (FAULT) PARAMETER TEST CONDITIONS High-level output current FAULT = 5 V Low-level output voltage IOUT = 5 mA 0.2 NOTE 1: Ensured by design. Not production tested. www.ti.com 3 SLUS184A - FEBRUARY 1999 - REVISED OCTOBER 2001 electrical characteristics over recommended operating virtual junction temperature range, TA = 0C to 70C, VIN = 12 V, IMAX = 0.4 V, SHTDWN = 2.4 V, TA = TJ (unless otherwise noted) fault timer PARAMETER MIN TYP MAX -83 -62 -47 CT discharge current VCT = 1.0 V VCT = 1.0 V TEST CONDITIONS 0.8 1.2 1.8 Output duty cycle VOUT = 0 V CT charge current 1.0% 1.9% 3.3% CT fault threshold voltage 1.2 1.5 1.7 CT reset threshold voltage 0.4 0.5 0.6 MIN TYP MAX 1.1 1.5 1.9 UNITS A A V SHTDWN PARAMETER TEST CONDITIONS Shutdown threshold voltage Shutdown hysteresis 150 Input current 100 500 TYP MAX UNITS V mV nA TTL input dc characteristics PARAMETER TEST CONDITIONS MIN TTL high-level input voltage UNITS 2.0 V TTL low-level input voltage TTL high-level input current VIH = 2.4 V VIL = 0.4 V TTL low-level input current 3 0.8 V 10 A 1 A block diagram (16-pin package) REVERSE VOLTAGE COMPARATOR + MAXIMUM CURRENT LEVEL H=4A IMAX 10 VOUT 4A VIN CURRENT SENSE LINEAR CURRENT AMPLIFIER 14 VOUT 15 VOUT ON-TIME CONTROL 2% DUTY CYCLE + CURRENT FAULT LEVEL 0A TO 3 A 1.5 V OVERCURRENT COMPARATOR 0A TO 3 A 0.25 RES 3 POWER FET + 1 A ABOVE FAULT VIN 30 mV + CHARGE PUMP 2 + THERMAL SHUTDOWN 1 SHTDWN INTERNAL BIAS 6 B3 7 8 9 B2 B1 B0 4-BIT DAC Pin numbers refer to N and DP packages. 4 5 EGND 4 13 12 GND GND GND HEATSINK/GROUND 11 16 CT FAULT UDG-01044 www.ti.com SLUS184A - FEBRUARY 1999 - REVISED OCTOBER 2001 Terminal Functions TERMINAL NAME PACKAGE I/O DP N PWP B0 9 9 13 I B1 8 8 12 I B2 7 7 11 I B3 6 6 10 I CT 11 11 15 I/O DESCRIPTION Provides digital in input ut to the DAC, which sets the fault current threshold. These can be used to provide a digital g soft-start and adaptive current limiting. g Capacitor connects to ground and sets the maximum fault time. EGND 5 5 9 - Serves as lowest impedance to the electrical ground. FAULT 16 16 24 O Open-drain output, which pulls low upon any fault or interrupt condition, or thermal shutdown. GND 4, 12, 13 - 5, 6, 7, 8, 17, 18, 19, 20 - IMAX 10 10 14 I When this pin is set low, the maximum sourcing current is 1 A above the programmed fault level. When set high, the maximum sourcing current is a constant 4 A for applications which require fast charging of load capacitance. SHTDWN 1 1 1 I When this pin is brought low, the device is put into a sleep mode drawing typically less than 100 A of ICC (with VOUT unloaded). The input threshold is hysteretic, allowing the user to program a start-up delay with an external RC circuit. VIN 2, 3 2, 3 2, 3 I Input voltage. The recommended voltage range is 7 V to 15 V. Both VIN pins should be connected together and connected to power source. VOUT 14, 15 14, 15 22, 23 O Output voltage.VOUT must not exceed VIN by more than 0.3 V. Heat sink/ground pins. These pins should be connected to large etch areas to help dissipate heat. detailed pin descriptions CT: A capacitor connected to ground sets the maximum fault time. The maximum fault time must be more than the time required to charge the external capacitance in one cycle. The maximum fault time is defined as: t FAULT 10 3 + 16.1 C T (1) Once the fault time is reached the output shuts down for a time given by: t SD 10 3 + 833 C T (2) This equates to a 1.9% duty cycle. VOUT: Output voltage from the UCC39151. Both VOUT pins should be connected together and connected to the load. When switched: V OUT ^V IN * 0.15 W I OUT (3) VOUT must not exceed VIN by more than 0.3V. www.ti.com 5 SLUS184A - FEBRUARY 1999 - REVISED OCTOBER 2001 APPLICATION INFORMATION protecting the UCC39151 from voltage transients The parasitic inductance associated with the power distribution can cause a voltage spike at VIN if the load current is suddenly interrupted by the UCC39151. It is important to limit the peak of this spike to less than 15 V to prevent damage to the UCC39151. This voltage spike can be minimized by: * * * Reducing the power distribution inductance (e.g., twist the positive (+) and negative (-) leads of the power supply feeding VIN, locate the power supply close to the UCC39151 or use PCB power and ground planes). Decoupling VIN with a capacitor, CIN (refer to Typical Application diagram), located close to the VIN pins. This capacitor is typically 1 F or less to limit the inrush current. Clamping the voltage at VIN below 15 V with a Zener diode, D1 (refer to Typical Application diagram), located close to the VIN pins. estimating maximum load capacitance For hot swap applications, the rate at which the total output capacitance can be charged depends on the maximum output current available and the nature of the load. For a constant-current, current-limited application, the output comes up if the load asks for less than the maximum available short-circuit current. To guarantee recovery of a duty-cycle from a short-circuited load condition, there is a maximum total output capacitance which can be charged for a given unit on-time (fault-time). The design value of on-time or fault-time can be adjusted by changing the timing capacitor CT. UDG-94138 Figure 1. Output Waveforms Under Fault Conditions 6 www.ti.com SLUS184A - FEBRUARY 1999 - REVISED OCTOBER 2001 APPLICATION INFORMATION For worst-case constant-current load of value just less than the trip limit; COUT(max) can be estimated from: C OUT(max) MAX * ILOAD [ I 10 3 16.1 V OUT C T (4) Where VOUT is the output voltage. For a resistive load of value RL, the value of COUT(max) can be estimated from: C [ OUT(max) RL 16.1 10 3 C T 1 n 1* VOUT I R MAX L (5) Long CT times must consider the maximum temperature. Thermal shutdown protection may be the limiting fault-time. safety recommendations Although the UCC39151 is designed to provide system protection for all fault conditions, all integrated circuits can ultimately fail short. For this reason, if the UCC39151 is intended for use in safety critical applications where UL or some other safety rating is required, a redundant safety device such as a fuse should be placed in series with the device. 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