REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Convert to standardized military drawing format. Technical changes to table I. Editorial changes throughout. 89-11-16 M. A. Frye B Technical changes in 1.4 and table I. Editorial changes throughout. 91-12-16 M. A. Frye C Corrected title on sheet 1 to reflect actual device function. Update boilerplate to MIL-PRF-38535 requirements. - jak 01-12-20 Thomas M. Hess D Update boilerplate to MIL-PRF-38535 requirements. - LTG 07-12-17 Thomas M. Hess Current CAGE CODE is 67268 REV SHEET REV SHEET REV STATUS REV D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Monica L. Poelking STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http://www.dscc.dla.mil CHECKED BY Monica L. Poelking APPROVED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE Michael A. Frye DRAWING APPROVAL DATE MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR, MONOLITHIC SILICON 87-01-14 AMSC N/A REVISION LEVEL D SIZE CAGE CODE A 14933 SHEET DSCC FORM 2233 APR 97 1 OF 5962-86847 13 5962-E139-08 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-86847 01 E A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 01 02 Circuit function 54HC123 54HC123A Dual retriggerable monostable multivibrator Dual retriggerable monostable multivibrator 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter E 2 Descriptive designator GDIP1-T16 or CDIP2-T16 CQCC1-N20 Terminals Package style 16 20 Dual-in-line Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) .................................................................................. -0.5 V dc to +7.0 V dc DC input voltage range ........................................................................................ -0.5 V dc to VCC +0.5 V dc DC output voltage range ...................................................................................... -0.5 V dc to VCC +0.5 V dc DC input diode current ......................................................................................... 20 mA DC output diode current....................................................................................... 20 mA DC output current (per pin) .................................................................................. 25 mA DC VCC or GND current (per pin) ......................................................................... 50 mA Maximum power dissipation (PD) ........................................................................ 500 mW 2/ Lead temperature (soldering, 10 seconds)........................................................... +260C Thermal resistance, junction-to-case (JC) ........................................................... See MIL-STD-1835 Junction temperature (TJ) ................................................................................... +175C Storage temperature range (TSTG) ....................................................................... -65C to +150C 1.4 Recommended operating conditions. Supply voltage range (VCC) .................................................................................. +2.0 V dc to +6.0 V dc Input voltage range (VIN) ...................................................................................... 0.0 V dc to VCC Output voltage range (VOUT)................................................................................. 0.0 V dc to VCC Case operating temperature range (TC) ............................................................... -55C to +125C Input rise or fall time: VCC = 2.0 V ........................................................................................................ 0 to 1000 ns VCC = 4.5 V ........................................................................................................ 0 to 500 ns VCC = 6.0 V ........................................................................................................ 0 to 400 ns 1/ 2/ Unless otherwise specified, all voltages are referenced to ground. For TC = +100C to +125C, derate linearly at 12 mW/C. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86847 A REVISION LEVEL D SHEET 2 1.4 Recommended operating conditions - Continued. Minimum triggering pulse width, An Bn or CLRn (tw1): TC = +25C: VCC = 2.0 V ........................................................................................................ 123 ns VCC = 4.5 V ........................................................................................................ 30 ns VCC = 6.0 V ........................................................................................................ 21 ns TC = -55C/+125C: VCC = 2.0 V ........................................................................................................ 157 ns VCC = 4.5 V ........................................................................................................ 42 ns VCC = 6.0 V ........................................................................................................ 30 ns Minimum output pulse width (tw2): Device type 01, TC = +25C, CEXT = 10 nF: VCC = 5.0 V dc, REXT = 10k ............................................................................. 40 s to 50 s Device type 02, TC = +25C, CEXT = 28 pF: VCC = 2.0 V dc, REXT = 6 k .............................................................................. 0.85 s VCC = 4.5 V dc, REXT = 2 k .............................................................................. 220 ns VCC = 6.0 V dc, REXT = 2 k .............................................................................. 170 ns Minimum removal time, CLRn to An, CLRn to Bn (tREM): Device type 01, TC = -55C/+125C: VCC = 2.0 V ........................................................................................................ 75 ns VCC = 4.5 V ........................................................................................................ 15 ns VCC = 6.0 V ........................................................................................................ 13 ns Device type 02, TC = -55C/+125C: VCC = 2.0 V ........................................................................................................ 0 ns VCC = 4.5 V ........................................................................................................ 0 ns VCC = 6.0 V ........................................................................................................ 0 ns 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or http://assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86847 A REVISION LEVEL D SHEET 3 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for nonJAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. 3.5.1 Certification/compliance mark. A compliance indicator "C" shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator "C" shall be replaced with a "Q" or "QML" certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86847 A REVISION LEVEL D SHEET 4 TABLE I. Electrical performance characteristics. Test High-level output voltage Symbol VOH VIN = VIH or VIL | IO | 20 A 2/ Low-level output voltage VOL VIN = VIH or VIL | IO | 4.0 mA VIN = VIH or VIL | IO | 5.2 mA VIN = VIH or VIL | IO | 20 A 2/ VIN = VIH or VIL | IO | 4.0 mA VIN = VIH or VIL | IO | 5.2 mA High-level input voltage Low-level input voltage Device type Test conditions -55C TC +125C 1/ unless otherwise specified VIH 3/ VCC = 2.0 V 1, 2, 3 Limits Min 1.9 VCC = 4.5 V 4.4 VCC = 6.0 V 5.9 VCC = 4.5 V 3.7 VCC = 6.0 V 5.2 VCC = 2.0 V All VCC = 6.0 V 0.1 VCC = 4.5 V 0.4 VCC = 6.0 V 0.4 All 1, 2, 3 3.15 VCC = 6.0 V 4.2 01 0.5 1, 2, 3 VCC = 4.5 V Active supply current (per monostable) ICC2 V 1.35 1.8 02 0.3 1, 2, 3 VCC = 4.5 V 0.9 VCC = 6.0 V 1.2 VCC = 6.0 V All 1, 2, 3 160 A VCC = 2.0 V 01 1, 2, 3 130 A VCC = 4.5 V 1.6 mA VCC = 6.0 V 3.2 IOUT = 0 A VIN = VCC or GND R/CEXT = VCC/4 4/ 5/ VIN = VCC or GND R/CEXT = 0.5 VCC Input current V V 1.5 VCC = 4.5 V VCC = 2.0 V VIN = VCC or GND V 0.1 VCC = 2.0 V ICC1 Max 0.1 1, 2, 3 VCC = 6.0 V Quiescent supply current (standby) Unit VCC = 4.5 V VCC = 2.0 V VIL 3/ All Group A subgroups IIN Functional tests VIN = VCC (R/CEXT) 6/ 130 A VCC = 4.5 V 1.6 mA VCC = 6.0 V 3.2 VCC = 2.0 V VCC = 6.0 V 02 1, 2, 3 1, 2, 3 5.0 VIN = GND (R/CEXT) 6/ -5.0 VIN = VCC (all other pins) 1.0 VIN = GND (all other pins) -1.0 See 4.3.1d A 7 See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86847 A REVISION LEVEL D SHEET 5 TABLE I. Electrical performance characteristics - Continued. Test Trigger propagation delay time, (An to Qn, Bn to Qn, CLRn to Qn) Symbol tPLH1 Test conditions -55C TC +125C 1/ unless otherwise specified CL = 50 pF minimum VCC = 2.0 V See figure 4 2/ Device type Group A subgroups 01 9 300 10, 11 450 9 169 10, 11 210 9 60 10, 11 90 9 42 10, 11 57 9 51 10, 11 76 9 32 10, 11 44 9 320 10, 11 480 9 197 10, 11 250 02 VCC = 4.5 V 01 02 VCC = 6.0 V 01 02 Trigger propagation delay time, (An to Qn, Bn to Qn, CLRn to Qn) tPHL1 CL = 50 pF minimum See figure 4 VCC = 2.0 V 2/ 01 02 VCC = 4.5 V 01 Unit 9 64 10, 11 96 02 VCC = 6.0 V Limits 9 48 10, 11 67 9 54 10, 11 82 9 38 10, 11 51 01 02 ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86847 A REVISION LEVEL D SHEET 6 TABLE I. Electrical performance characteristics - Continued. Test Symbol Device type Test conditions -55C TC +125C 1/ unless otherwise specified Group A subgroups Limits Min Propagation delay time, CLRn to Qn) tPLH2 CL = 50 pF minimum See figure 4 VCC = 2.0 V 2/ 9 Max 215 10, 11 325 9 114 10, 11 143 9 43 10, 11 65 9 34 10, 11 45 01 02 VCC = 4.5 V 01 02 VCC = 6.0 V 01 9 37 10, 11 55 9 28 10, 11 36 9 215 10, 11 325 02 Propagation delay time, CLRn to Qn) tPHL2 CL = 50 pF minimum See figure 4 VCC = 2.0 V 2/ 01 02 VCC = 4.5 V 9 116 10, 11 147 9 43 10, 11 65 9 36 10, 11 46 9 37 10, 11 55 9 29 10, 11 37 01 02 VCC = 6.0 V Unit 01 02 ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86847 A REVISION LEVEL D SHEET 7 TABLE I. Electrical performance characteristics - Continued. Test Output pulse width (standby) Output rise and fall time Symbol tWQ 2/, 5/ tTHL, tTLH Device type Test conditions -55C TC +125C 1/ unless otherwise specified CL = 50 pF minimum REXT = 10 k, CEXT = 0.1 F See figure 4 CL = 50 pF minimum See figure 4 VCC = 5.0 V VCC = 4.5 V VCC = 2.0 V Group A subgroups 9 Max 0.5 10, 11 0.38 0.52 9 0.9 1.2 10, 11 0.70 1.15 01 02 9 75 10, 11 110 All 9 15 10, 11 22 9 13 10, 11 19 4 20 VCC = 6.0 V Maximum input capacitance CIN R/CEXT, See 4.3.1c Unit Min 0.4 VCC = 4.5 V 5/ Limits All Other inputs, See 4.3.1c ns pF 10 1/ For a power supply of 5.0 V 10% the worst-case output voltage (VOH and VOL) occur for HC at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst case VIN and VIL occur at VCC = 5.5 V and 4.5 V, respectively. (The VIH value at VCC = 5.5 V is 3.85 V.) The worst case leakage current (IIN and ICC) occur for CMOS at the higher voltage so the 6.0 V values should be used. 2/ Testing at VCC = 2.0 V and VCC = 6.0 V shall be guaranteed, if not tested, to the specified limit in table I. 3/ VIH and VIL tests are not required if applied as forcing functions for the VOH and VOL tests. 4/ Limit current to IOL or use a suitable series resistor 500; perform test while Q is high. 5/ Guaranteed, if not tested, to the limits specified in table I. 6/ When testing IIL, the Q output must be high, if Q is low (device not triggered) the pull-up P device will be on and the low resistance path from VDD to the test pin will cause a current far exceeding the specification. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 ms SIZE 5962-86847 A REVISION LEVEL D SHEET 8 Device types 01 and 02 Case outlines E Terminal number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 2 Terminal symbol A1 B1 CLR1 Q1 Q2 CEXT2 REXT2,CEXT GND A2 B2 CLR2 Q2 Q1 CEXT1 REXT1, CEXT VCC --------- NC A1 B1 CLR1 Q1 NC Q2 CEXT2 REXT2,CEXT GND NC A2 B2 CLR2 Q2 NC Q1 CEXT1 REXT1, CEXT VCC FIGURE 1. Terminal connections. CLRn L X X H Inputs An X H X L L H Outputs Qn Qn L H L H L H Bn X X L H H H = High voltage level L = Low voltage level X = Irrelevant = High to low clock transition = Low to high clock transition = One high level pulse = One low level pulse FIGURE 2. Truth table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86847 A REVISION LEVEL D SHEET 9 FIGURE 3. Logic diagram. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86847 A REVISION LEVEL D SHEET 10 NOTES: 1. CL = 50 pF minimum or equivalent (includes test jig and probe capacitance). 2. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50, tr = 6.0 ns, tf = 6.0 ns. 3. The outputs are measured one at a time with one input transition per measurement. FIGURE 4. Switching waveforms and test circuit. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86847 A REVISION LEVEL D SHEET 11 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Interim electrical parameters (method 5004) Final electrical test parameters (method 5004) Group A test requirements (method 5005) Groups C and D end-point electrical parameters (method 5005) Subgroups (in accordance with MIL-STD-883, method 5005, table I) 1 1, 2, 3, 7, 9 1/ 1, 2, 3, 4, 7, 9, 10, 11 2/ 1, 2, 3 1/ PDA applies to subgroup 1. 2/ Subgroups 10 and 11, if not tested, shall be guaranteed to the specified limits in table I. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5, 6 and 8 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (CIN measurement) shall be measured only for the initial test and after process or design changes which may affect input capacitance. d. Subgroup 7 shall include verification of the truth table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86847 A REVISION LEVEL D SHEET 12 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA = +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing. 6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.4 Record of users. Military and industrial users shall inform Defense Supply Center Columbus (DSCC) when a system application requires configuration control and the applicable SMD. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43218-3990, or telephone (614) 692-0547. 6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86847 A REVISION LEVEL D SHEET 13 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 07-12-17 Approved sources of supply for SMD 5962-86847 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current sources of supply at http://www.dscc.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ 5962-8684701EA 5962-8684702EA 5962-86847022A Vendor CAGE number 01295 0C7V7 0C7V7 Vendor similar PIN 2/ CD54HC123F3A MM54HC123AJ/883 MM54HC123AE/883 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed, contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. Vendor CAGE number Vendor name and address 01295 Texas Instruments Incorporated Semiconductor Group 8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 0C7V7 QP Semiconductor 2945 Oakmead Village Court Santa Clara, CA 95051 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.