INTEGRATED CIRCUITS DATA SEE TDA8702 8-bit video digital-to-analog converter Product specification 1996 Aug 23 Supersedes data of April 1993 File under Integrated Circuits, |CO2 Philips Semiconductors PHILIPSPhilips Semiconductors errr rere errr reer 8-bit video digital-to-analog converter FEATURES supply) 8-bit resolution Conversion rate up to 30 MHz TTL input levels Internal reference voliage generator Two complementary analog voltage outputs No deglitching circuit required Internal input register Low power dissipation Internal 75 Q output load (connected to the analog Very few external components required. APPLICATIONS Product specification TDA8702 * High-speed digital-to-analog conversion Digital TV including: field progressive scan line progressive scan * Digital VCRs. Subscriber TV decoders Saiellite TV decoders GENERAL DESCRIPTION The TDA8702 is an 8-bit Digital-to-Analog Converter (DAC) for video and other applications. lt converts the digital input signal into an analog voltage output at a maximum conversion rate of 30 MHz. No external reference voltage is required and all digital inputs are TTL compatible. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Voca analog supply voltage A5 5.0 5.6 V Vico digital supply voltage A5 5.0 5.5 V loca analog supply current note 1 - 26 32 mA lecp digital supply current note 1 - 23 30 mA Vout - Vout | full-scale analog output voltage note 2 {peak-to-peak value) Z, = 10 kQ -1.45 |-1.60 /-1.75 |V 7. = 75kO -0.72 |-0.80 |-0.88 |V ILE DC integral linearity error - - +1/2 LSB DLE DC differential linearity error - - +1/2 LSB ick maximum conversion rate - - 30 MHz B 3 dB analog bandwidih fork = 30 MHz; note 3 - 150 - MHz Prot total power dissipation - 250 340 mW Note 1. DO to D7 connected to Vecp and CLK connected to DGND. 2. The analog output voltages (Vout and Vaut) are negative with respect to Voca (see Table 1). The output resistance between Voca and each of these outputs is typically 75 Q. oo code transition (code 0 to 255). 1996 Aug 23 The -3 dB analog output bandwidth is determined by real time analysis of the output transient at a maximum inputPhilips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 ORDERING INFORMATION TYPE PACKAGE NUMBER NAME DESCRIPTION VERSION TDA8702 DIP16 plastic dual in-line package; 16 leads (300 mil}; long bady SOT38-1 TDA8702T $016 plastic small outline package; 16 leads; body width 7.5 mm SOT162-1 BLOCK DIAGRAM 5 REF 7 oo nF 1 BAND-GAP Ly CURRENT REFERENCE x alah . , 7 DGND | CURRENT 6} Voca acno 42-4 GENERATORS os os To 2 ye 5 Va ax }f gegneet |p gL ne Ltt TDA8702/ REGISTERS TDA8702T TTT tT . (LSB) DO : > + Veco D4 a 3 | Os 4 > DATA 10 INPUT oe 9 4 INTERFACE os [8 (MSB) D7 > Fig.1 Black diagram. MSA659 1996 Aug 23Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 PINNING SYMBOL | PIN DESCRIPTION REF 1 | voltage reference (decoupling) AGND 2 | analog ground D2 3 | data input; bit 2 D3 4 | data vapul bit 3 cr] YF vcs CLK 5 | clock input aenn [2] 15] Vour DGND 6 | digital ground be [a 14] Your D7 7 | data input; bit 7 03 [4] syaszos [3] Yoco D 8 | data input; bit 6 CLK [5] PDA8?702T 2] D0 D5 9 | data input; bit & pen Le, ra] 01 D4 10 | data input; bit 4 v7 [F Fa] ba D1 11. | data input; bit 1 BO 12 | data inpui; bit 0 Pele [3] os Vecp 13 | positive supply voltage for digital MSAGSE circuits 445 V) Vout 14 | analog voltage output Vout 15 | complementary analog voltage culput Voca 16 | positive supply voltage for analog Fig.2 Pin configuration. circuits (+5 V) 1996 Aug 23Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER MIN. MAX. UNIT Voca analog supply voliage -0.3 +7.0 Vv Vecp digital supply voliage -0.3 47.0 Vv Voeca - Vecp supply voltage differential 0.5 40.5 V AGND - DGND | ground voltage differential -0.1 +0.1 V Vi input voltage (pins 3 to 5 and 7 to 12) -0.3 Veep Vv lour/lout total output current (pins 14 and 15) -5 +26 mA Tstg slorage temperature 55 4150 C Tamb operating ambient temperature 0 +70 C Tj junction temperature - 4125 C HANDLING Inpuis and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. THERMAL RESISTANCE SYMBOL PARAMETER VALUE UNIT Rth ja from junction to ambient in free air SOT38-1 70 KiW SOT162-1 90 KAW 1996 Aug 23Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 CHARACTERISTICS Voca = Vie Va = 4.5 V to 5.5 Vi Vocp = Via Ve = 4.5 V to 5.5 V; Veca- Vocp = 0.5 V to +0.5 V; Veer decoupled to AGND by a 100 nF capacitor; Tamp = 0 C to +70 C; AGND and DGND shorted together; unless ctherwise specified (typical values measured at Voca = Vocp = 5 V and Tamb = 25C). SYMBOL PARAMETER CONDITIONS MIN. | TYP. | MAX. | UNIT Supply Veca analog supply voltage A5 5.0 5.5 Vv Vecp digital supply voltage A5 5.0 5.5 Vv loca analog supply current note 1 - 26 32 mA loeb digital supply current note 1 - 23 30 mA AGND DGND | ground voltage differential -0.1 |- 40.1 |V Inputs DIGITAL INPUTS (D7 TO DO) AND CLOCK INPUT (CLK) ViL LOW level input voltage 0 - 0.8 Vv Vin HIGH level input voltage 2.0 - Veep | V lie LOW level input current V,-0.4V - -0.3 |-0.4 |mA hy HIGH level input current Vi=2.7V - 0.01 20 HA foik maximum clack frequency - - 30 MHz Outputs (note 2; referenced to Veca) Vout - Vout full-scale analog output voltages Z, = 10 kz -1.45 |-1.60 |-1.75 |V (peak-to-peak value) Z,=752 -0.72 |-0.80 | -0.88 | V Vos analog offset output voltage code =0 - -3 -25 mv Vour/TC full-scale analog output voltage - - 200 pLV/K temperature coefficient Vos/TC analog offset output voltage - - 20 pV/K temperature coefficient B -3 dB analog bandwidth note 3; fo_~ = 30 MHz - 150 - MHz Gaitt differential gain - 0.6 - % Daitt differential phase - 1 - deg Zo output impedance - 75 - Q Transfer function (fe__. = 30 MHz) ILE DC integral linearity error - - +1/2 | LSB DLE DC differential linearity error - - t1/2 | LSB 1996 Aug 23Phil ips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 SYMBOL PARAMETER CONDITIONS MIN. | TYP. | MAX. | UNIT Switching characteristics (fe_x = 30 MHz); notes 4 and 5; see Figs 3, 4 and 5 tSU-DAT data set-up time -0.3 [- - ns tHD:DAT data hold time 2.0 - - ns tep propagation delay time - - 1.0 ns ts1 settling time 10% to 90% full-scale - 1.1 1.5 ns change ta +1 LSB tgo settling time 10% to 90% full-scale - 6.5 8.0 ns change ta +1 LSB iq input to 50% output delay time - 3.0 5.0 ns Output transients (glitches; (feL~ = 30 MHz); note 6; see Fig.6 Eg glitch energy from cade transition 127 to 128 |- | - | 30 | LSB.ns Note 1. DO to D7 are connected to Vecp, CLK is connected to DGND. 2. 199 The analog output voltages (Veyr and Vopr are negative with respect to Voc, (see Table 1). The output resistance between Veca and each of these ouipuis is 75 Q (typ.). The -3 dB analog output bandwidth is determined by real time analysis of the output transient at a maximum input cade transition (code 0 to 255). The worst case characteristics are obiained at the transition from input code 0 to 255 and if an external load impedance greater than 75 is connected between Vout or Vout and Voca. The specified values have been measured with an active probe between Vou; and AGND. No further load impedance between Voy7 and AGND has been applied. All input data is latched at the rising edge of the clock. The output voltage remains stable (independent of input data variations) during the HIGH level of the clack (CLK = HIGH). During a LOW-to-HIGH transition of the clock (CLK = LOW}, the DAC operates in the transparent made (input data will be directly transferred to their corresponding analog output voltages (see Fig.5). The data set-up (tsu-pat) is the minimum period preceding the rising edge of the clock that the input data must be stable in order to be correctly registered. A negative set-up time indicates that the data may be initiated after the rising edge of the clock and still be recognized. The data hold time (typ-pat) is the minimum period following the rising edge of the clack that the input data must be stable in order to be correctly registered. A negative hald time indicates that the data may be released prior to the rising edge of the clock and still be recognized. The definition of glitch energy and the measurement set-up are shown in Fig.6. The glitch energy is measured at the input transition between code 127 to 128 and on the falling edge of the clock. 6 Aug 23 7Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 Table 1 = Input coding and output voltages (typical values; referenced to Vcca, regardless of the offset voltage) DAC OUTPUT VOLTAGES INPUT DATA CODE (D7 To Db) 2, =10KQ 27,2752 Vout Vout Vout Vout 0 000 00 00 0 -1.6 0 -0.8 1 000 000 01 -0.006 -1.594 -0.003 -0.797 128 100 000 00 -0.8 -0.8 -0.4 -0.4 254 111 111 10 1.594 0.006 0.797 0.003 255 141111 11 -1.6 0 -0.8 0 p+ tsu; BAT *| __ THD: DAT input data CLK \ 7 stable LLG tov _ OV 3.0 Fig.3 Data set-up and hold times. 1.3V ov MBCST2 The shaded areas indicate when the input data may change and be correctly registered. Data input update must be completed within 0.3 ns after the first rising edge of the clock (tgu-paT is negative; -0.3 ns). Data must be held at least 2 ns after the rising edge (typ:paT = +2 ns). 1996 Aug 23Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 code 255 input data 13V (example of a code 0 full-scale input transition) Voca (code 0) | | | | | | Vout ! Veca-1.6V | (code 255) : ts 1 LSB he tpp > tgo MBC9t3 Fig.4 Switching characteristics. CLK transparent latched 13V input codes VOUT N analog output mode (stable output) transparent made MBC914 -1 | | | | voltage | | Uy | | | | | | | | transparent | latched mode | beginning of | | | | During the transparent mode (GLK = LOW), any change of input data will be seen at the output. During the latched mode (GLK = HIGH), the analog output remains stable regardless of any change at the input. A change of input data during the latched mode will be seen on the falling edge of the clock (beginning of the transparent mode}. Fig.6 Latched and transparent mode. 1996 Aug 23 9Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 1996 Aug 23 HP8082A HP8082A PULSE toLKao TEK P6201 TEK7104 and TEK7A26 GENERATOR > D7 MSB (SLAVE) (2) VOUT DYNAMIC OSCILLO- D6 Vout PROBE SCOPE D5 PULSE f R= 100k0 bandwidth = 20 MHz GENERATOR | CLK 10 D4 G23 pF (SLAVE) ay p3 TDA8702/ TDA8702T D2 DIVIDER Om (10) Do (LSB) clack a foi PULSE GENERATOR 3) (MASTER) 1 | | | | MODEL EH107 1 LSB 2 i ee ee code 127 code 128 liming diagram VouT The value of the glitch energy is the sum of the shaded area measured in LSB.ns. 10 Fig.6 Glitch energy measurement. MSAGEOPhilips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 INTERNAL PIN CONFIGURATIONS Voca ~ VREF D1 . output current . generators regulation loo REF a P a AGND MBGOTT -7 Fig.7 Reference voltage generator decoupling. VGCA * a y DGND DO 1o D7, le = CLK 4 a = x AGND _ vv substrate MBC908 AGND MBC 370 Fig.8 AGND and DGND. Fig.9 D7 to BO and CLK. 1996 Aug 23 11Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 Yocp bho rr DGND MBC307 Fig.10 Digital supply. VOCA aA A ral rsa Vout VOUT hI al | bal re AGND MBC909 -1 bit bit switches and current generators Fig.11 Analog outputs. CCA | rr AGND MBC 906 Fig.12 Analog supply. 1996 Aug 23 12Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 APPLICATION INFORMATION Additional application information will be supplied upon request (please quote number FTV/8901). 100 nF? U pt REF = Voca AGND = Vout - Yo VouT -0 TDA8702/ TD A8702T _ jp. MSA661 (1) This is arecommended value for decoupling pin 1. Fig.13 Analog output voltage without external load (Vo = Vaur; see Table 1, 2; = 10 kQ}. 100 nF U ptr REF Veca AGND /- Z, | Vol4./ (4,475) Your TD A8702/ | TWAsTb2T [| _ pe MSAGEZ (1) This is arecommended value for decoupling pin 1. Fig.14 Analog cutput voltage with external load (external load 7, = 76 Q to ce), 1996 Aug 23 13Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 5 AGND too nF) U VOCA REF 100 pF __ + VOUT 1 75 al] TDA8702/ TDas7oz = oT oO ~ | _ MSAG63 (1) This is arecommended value for decoupling pin 1. Fig.15 Analog output with AGND as reference. AGND TDA8702 Vout (pin 15) or Vout (pin 14) 100 pF + 390 & 10 pH 27 pF 7 39 pF 109 pF | 6 pF 12 pH 390 O + Vo [3904780+75)] MSAGE65 Fig.16 Example of anti-aliasing filter (analog output referenced to AGND). 1996 Aug 23 14Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 MSAG57 (dB) 20 40 60 80 100 30 40 t; (MHz) Characteristics Order 5; adapted CHEBYSHEV. Ripple ats 0.1 dB. fig dB) = 6.7 MHz. fiwoTeH) = 9.7 MHz and 13.3 MHz. Fig.17 Frequency response for filter shown in Fig. 16. 100 nF? UJ 5 REF AGND VouT Vout 1Tpas7o2/ / 2 X Vg (R2/R1) TDA8702T R2 | AGND MSAG64 (1) This is arecommended value for decoupling pin 1. Fig.18 Differential mode (improved supply voltage ripple rejection). 1996 Aug 23 15Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 PACKAGE OUTLINES DIP16: plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 |~ seating plane | pin 1 index - - - E | 1 8 0 5 10mm ee ee scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) A Ay Aa (1) (1) z% UNIT max. min. max. b by e D E e e1 L Me Mn w max. 1.40 0.53 0.32 218 6.48 3.9 8.25 9.5 mmo) 47 | 081 | 37 |) 444 | o38 | o23 | a4 | 620 | 2 | 78 | 34 | 7g | ag | O84 | 22 . 0.055 0.021 0.013 0.86 0.26 0.15 0.32 0.37 hi . : : : : : inches | 0.19 | 0.020 | 0.18 | g'o45 | 0.015 | 0.009 | 084 | o24 | &19 | 93 | O43 | ast | agg | O01 | 0.087 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN VERSION Ec IEDEC FAL PROJECTION SOT38-1 o50G09 MO-001AE } ce anny ISSUE DATE 1996 Aug 23 16Philips Semiconductors Product specification TDA8702 8-bit video digital-to-analog converter $016: plastic small outline package; 16 leads; body width 7.5 mm $0T162-1 D - Epa] I | = = ; y | _J _ - aS So Se Cc 7 if a He == sala op * = fev OIA ler 16 9 Il \ 28 awe _ _ _ _ Ap ? | Ay \' Ny A pin 1 index j sh a el Lo ft f / \ P yf ' 8 [eet p 0 5 10 mm 1 1 1 1 J} scale DIMENSIONS (inch dimensions are derived from the orlginal mm dimensions) A UNIT | ax. | At As | Ag ba c pM | eM] He L Ly Q v w 2% | 6 0.30 | 2.45 049 | 0.32 | 105 | 7.6 10.65 14 14 03 mm | 265) o49 | 225 | 925) o36 | o23) 101] 74 | 127 | 40.00] 14 | o4 | to | O25] 975) OT | gg | gc o . 0.012 | 0.096 0.019 | 0.013) 0.414 | 0.30 0.42 0.043 | 0.043 0.035) inches | 0-19 | 504) 0.089 | 9-91 | o1o14| 0.009 | 0.40 | 0.29 | 9-959} 9:39 | 9-955 | o.016 | o.0a9) 991 | 9-01 | 0.004 | gore Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES VERSION PROJECTION | ISSUE DATE IEC JEDEC EIAJ 9244 SOT162-1 075E03 MS-013AA Ee} 95-01-24 1996 Aug 23 17Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounied ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives avery brief insight to a complex technology. Amore in-depth account cf soldering ICs can be found in our"IC Package Databook" (order code 9398 652 90011). DIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body musi not exceed the specified maximum storage temperature (Tsig max). li the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low voltage soldering iran (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. so REFLOW SOLDERING Reflow saldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. 1996 Aug 23 18 Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at AB C. WAVE SOLDERING Wave soldering techniques can be used for all SO packages if the following conditions are observed: A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. The longitudinal axis of the package footprint must be parallel to the solder flow. The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder ternperaiure is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonally- opposite end leads. Use only a low voltage saldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for praduct development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134}. Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, itis advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1996 Aug 23 19