LTC1700
1
1700fa
FEATURES
DESCRIPTIO
U
APPLICATIO S
U
TYPICAL APPLICATIO
U
■
High Efficiency: Up to 95%
■
No Current Sense Resistor Required
■
Constant Frequency 530kHz Operation Allows
Small Size, Surface Mount Inductors
■
OPTI-LOOP
®
Compensation Minimizes C
OUT
■
Selectable Burst Mode
®
Operation
■
Minimum Start-Up Voltage as Low as 0.9V
■
Synchronizable Between 400kHz and 750kHz
■
Micropower Shutdown: 10µA
■
Current Mode Operation for Excellent Line and Load
Transient Response
■
Soft-Start Reduces Supply Current Transients
■
1.5% Output Voltage Accuracy
■
Uses Low Value, Small Size, Surface Mount Inductors
■
Available in 10-Lead MSOP Package
The LTC
®
1700 is a current mode synchronous step-up
DC/DC controller that drives external N-channel and
P-channel power MOSFETs using a constant frequency
PWM architecture. Current limiting is provided by sensing
the voltage drop across the main MOSFET, eliminating the
need of a sense resistor. This No R
SENSE
TM
technique helps
the LTC1700 maintain high efficiency at heavy loads while
Burst Mode operation ensures high efficiency at light loads,
thus providing high efficiencies over a wide range of load
currents.
The LTC1700 operates at a minimum input voltage as low as
0.9V. The device boasts a ±1.5% output voltage accuracy and
consumes only 200µA of quiescent current. In shutdown, it
only draws 10µA.
To prevent inductor current runaway, the duty cycle is limited
to 90%. Overvoltage protection is also provided which shuts
both the external MOSFETs off when tripped.
High constant operating frequency of 530kHz allows the use
of small inductors and output capacitors. The LTC1700 can
also be synchronized between 400kHz to 750kHz. Burst
Mode operation is inhibited when the device is externally
clocked or when the SYNC/MODE pin is pulled low to reduce
noise and RF interference.
■
Cellular Telephones
■
Wireless Modems
■
RF Communications
■
2.5V to 3.3V, 2.5V to 5V Converters
■
Battery-Powered Equipment
■
Telecom/Network Systems
No R
SENSE
Synchronous
Step-Up DC/DC Controller
Figure 1. High Efficiency Step-Up Converter
Efficiency, Power Loss vs Load Current
I
TH
RUN/SS
SGND
V
FB
SYNC/MODE
SW
BG
PGND
TG
V
OUT
LTC1700
2
4
1
3
5
10
8
9
6
7
+
L1
1.8µH
C3
220pF
C6
10µF
+C7
330µF
6V
C2
68µF
6.3V
C4
0.1µF
C1
22µF
R3
2200Ω
R1
316k
R2
100k
M2
M1
V
IN
3.3V to 4.2V
5V
2A
1700 • F01a
C5
220pF
C1: CERAMIC TAIYO YUDEN LMK432BJ226MM
C2: AVX TAJB686K006R
L1: TOKO 919AS-IR8N (D104C TYPE)
C6: CERAMIC TAIYO YUDEN JMK316BJ106ML
C7: SANYO POSCAP 6TPB330M
M1: SILICONIX Si9804
M2: SILICONIX Si9803
LOAD CURRENT
EFFICIENCY (%)
100
90
80
70
60
50
40
30
20
10
0
0.001 0.1 1 2
1700 F01b
0.01
4.2V EFFICIENCY
3.3V EFFICIENCY
4.2V POWER
3.3V POWER
1.0
0.1
0.01
0.001
POWER LOSS (W)
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode, OPTI-LOOP are registered trademarks of Linear Technology Corporation.
No R
SENSE
is a trademark of Linear Technology Corporation.
LTC1700
2
1700fa
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
SOP
Start-Up Minimum Operating Voltage (Note 4) 0.9 1.8 V
V
OP
Minimum Operating Voltage (Note 5) V
OUT
Ramping Up 2.34 2.6 V
Hysteresis 90 mV
I
S
Input DC Supply Current (Note 6)
Normal Mode V
FB
= 1.6V, V
MODE
= 0V, V
RUN/SS
= 3V 536 620 µA
Sleep Mode V
FB
= 1.6V, V
MODE
= 3V, V
RUN/SS
= 3V 179 210 µA
Start-Up Mode V
FB
= 0V, V
MODE
, V
RUN/SS,
V
OUT
= 1.8V 35 45 µA
Shutdown V
FB
= 0V, V
MODE
= 3V, V
RUN/SS
= 0V 10 14 µA
I
VFB
Feedback Current V
FB
= 1.20V 1 50 nA
V
FB
Regulated Output Voltage (Note 7) ●1.187 1.205 1.223 V
∆V
OSENS
Reference Voltage Line Regulation V
IN
= 2.7V to 5V (Note 7) 0.0106 0.080 %/V
V
LOADREG
Output Voltage Load Regulation Measured in Servo Loop; V
ITH
= 0.3V to 0.9V 0.036 0.065 %
V
OVL
Output Overvoltage Lockout Reference to Nominal V
FB
2.5 4.8 9 %
V
RUN/SS
Shutdown Threshold V
RUN/SS
Ramping Up ●0.7 1.09 1.2 V
I
RUN/SS
Soft-Start Current Source V
RUN/SS
= 0V 2 3.79 6 µA
f
OSC
Oscillator Frequency V
OUT
= 4.2V ●460 530 680 kHz
Start-Up Oscillator Frequency V
OUT
= 1.8V, V
RUN/SS
= 1.8V, V
SW
= 1.1V 150 225 kHz
V
SYNC/MODE
SYNC/MODE Threshold V
SYNC/MODE
Ramping Down from 1.2V 1.03 1.13 1.25 V
DC MAX Maximum Duty Cycle f
OSC
= 550kHz 84 88 92 %
∆V
SENSE(MAX)
Maximum Current Sense Voltage ●55 78 100 mV
63 mV
I
LIMIT
Current Limit At Start-Up V
OUT
= 1.8V 40 60 mA
g
m
Transconductance of Error Amplifier V
FB
= V
REF
± 10mV 0.65 0.9 1.30
ORDER PART
NUMBER
MS PART
MARKING
T
JMAX
= 125°C, θ
JA
= 150°C/W
LTLC
LTC1700EMS
ABSOLUTE AXI U RATI GS
W
WW
U
PACKAGE/ORDER I FOR ATIO
UUW
(Note 1)
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25
°
C.
VOUT = 3V unless otherwise specified.
Output Supply Voltage (V
OUT
) .....................–0.3V to 6V
RUN/SS, V
FB
Voltages ..............................–0.3V to 2.4V
SYNC/MODE, I
TH
Voltages ...........................– 0.3V to 6V
SWITCH Voltage (SW) ..............................–0.3V to 6.5V
TG, BG Peak Output Current (<10µs)......................... 1A
Operating Temperature Range (Note 2) ...–40°C to 85°C
Junction Temperature (Note 3)............................. 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
1
2
3
4
5
SGND
ITH
VFB
RUN/SS
SYNC/MODE
10
9
8
7
6
SW
PGND
BG
VOUT
TG
TOP VIEW
MS PACKAGE
10-LEAD PLASTIC MSOP
Ω
m
Consult LTC Marketing for parts specified with wider operating temperature ranges.
LTC1700
3
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SUPPLY VOLTAGE (V)
1.5
QUIESCENT CURRENT (µA)
250
200
150
100
50
02.5 3.5 4.0 6.0
1700 G03
2.0 3.0 4.5 5.0 5.5
SUPPLY VOLTAGE (V)
1.5
SHUTDOWN CURRENT (µA)
20
18
16
14
12
10
8
6
4
2
02.5 3.5 4.0 6.0
1700 G02
2.0 3.0 4.5 5.0 5.5
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
TG Transition Time
TG t
r
TG Gate Drive Rise Time C
LOAD
= 3000pF, 10% to 90% 60 100 ns
TG t
f
TG Gate Drive Fall Time C
LOAD
= 3000pF, 90% to 10% 60 100 ns
BG Transition Time
BG t
r
BG Gate Drive Rise Time C
LOAD
= 3000pF, 10% to 90% 80 100 ns
BG t
f
BG Gate Drive Fall Time C
LOAD
= 3000pF, 90% to 10% 50 70 ns
Dead Time
t
dll
BG and TG Gates Go Low C
LOAD
= 3000pF on BG and TG 88 110 ns
t
dhh
BG and TG Gates Go High C
LOAD
= 3000pF on TG and BG 66 90 ns
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
VOUT = 3V unless otherwise specified.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LTC1700E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
according to the following formula:
T
J
= T
A
+ (P
D
• 150°C/W)
Note 4: At an input supply less than 2.3V, only the start-up circuitry of the
LTC1700 is active. This test ensures the start-up circuitry is working.
Note 5: An input supply at or above this minimum operating voltage
activates the main control loop. Start-up circuitry of the LTC1700 is
shut off.
Note 6: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 7: The LTC1700 is tested in a feedback loop that servos V
FB
to the
feedback point for the error amplifier (V
ITH
= 0.6V)
TYPICAL PERFORMANCE CHARACTERISTICS
UW
Reference Voltage vs
Temperature
Quiescent Current vs Supply
Voltage
Shutdown Current vs Supply
Voltage
TEMPERATURE (°C)
–55
REFERENCE VOLTAGE (V)
1.210
1.208
1.206
1.204
1.202
1.200
1.198
1.196
1.194
1.192
1.190 –15 25 45 125
1700 G01
–35 5 65 85 105
LTC1700
4
1700fa
TEMPERATURE (°C)
–55 –35 –15 5 45 85 125
START-UP CURRENT LIMIT (A)
25
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
1700 G8
10565
TEMPERATURE (°C)
–55 –35 –15 5 45 85 125
SENSE VOLTAGE (mV)
25
90
80
70
60
1700 G7
10565
TEMPERATURE (°C)
–55 –35 –15 5 45 85 125
NORMALIZED FREQUENCY
25
1.08
1.06
1.04
1.02
1.00
0.98
0.96
0.94
1700 G5
10565
RUN/SS Current vs Temperature
Normalized Oscillator Frequency
vs Temperature
Minimum Operating Voltage
vs Temperature
Maximum Current Sense Voltage
vs Temperature
Start-Up Current Limit vs
Temperature
Efficiency vs Load Current
(Burst Mode Operation Disabled)
3.3V Output Efficiency, Circuit of
Figure 1 with Burst Mode
Operation
3.3V Output Efficiency, Circuit of
Figure 1 with Burst Mode
Operation Inhibited
Load Step Transient Response
Burst Mode Operation Enabled
TYPICAL PERFORMANCE CHARACTERISTICS
UW
V
IN
= 3.3V
V
OUT
= 5V
2A/DIV
V
SYNC
= V
IN
LOAD STEP = 100mA TO 1.7A
A/C COUPLED
OUTPUT
VOLTAGE
(0.2V/DIV)
INDUCTOR
CURRENT
(2A/DIV)
1700 G12
TEMPERATURE (°C)
–55
RUN/SS CURRENT (µA)
6
5
4
3
2
1
0–15 25 45 125
1700 G04
–35 5 65 85 105
LOAD CURRENT (A)
EFFICIENCY (%)
100
90
80
70
60
50
40
30
0.001 0.1 1.0
1700 G10
0.01
V
IN
= 2.7V
V
IN
= 2V
LOAD CURRENT (A)
EFFICIENCY (%)
100
90
80
70
60
50
40
30
0.001 0.1 1.0
1700 F16
0.01
VIN = 2.7V
VIN = 2V
LOAD CURRENT (A)
EFFICIENCY (%)
100
90
80
70
60
50
40
0.001 0.1 1.0
1700 G09
0.01
V
IN
= 4.2V
V
IN
= 3.3V
TEMPERATURE (°C)
–55 –35 –15 5 45 85 125
START-UP VOLTAGE (V)
25
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1700 G6
10565
START-UP
CIRCUIT
START-UP VOLTAGE (V)
2.28
2.26
2.24
2.22
2.20
2.18
2.16
2.14
MAIN
CONTROLLER
LTC1700
5
1700fa
SGND (Pin 1): Small-Signal Ground. Must be routed
separately from other grounds to the (–) terminal of C
OUT
.
I
TH
(Pin 2): Error Amplifier Compensation Point. The
current comparator threshold increases with this control
voltage. Nominal voltage range for this pin is 0V to 1.18V.
V
FB
(Pin 3): Receives the feedback voltage from an exter-
nal resistive divider across the output capacitor.
RUN/SS (Pin 4): Combination of Soft-Start and Run
Control Inputs. A capacitor to ground at this pin sets the
ramp time to full output current. The time is approximately
0.45s/µF. Forcing this pin below 1.08V causes all circuitry
to be shut down.
SYNC/MODE (Pin 5): This pin performs three functions. A
voltage greater than 1.2V on this pin allows Burst Mode
operation at low load currents, while grounding or apply-
ing a clock signal on this pin defeats Burst Mode operation.
An external clock between 400kHz and 750kHz applied to
this pin forces the LTC1700 to operate at the external clock
frequency.
Do not attempt to synchronize below 400kHz
or above 750kHz.
TG (Pin 6): Top Gate Drive. Drives the external synchro-
nous P-channel MOSFET with a voltage swing between 0V
to V
OUT
.
V
OUT
(Pin 7): This pin performs two functions. It serves as
the supply pin and also as one of the inputs to the current
reversal comparator.
BG (Pin 8): Bottom Gate Drive. Drives the external main
N-channel MOSFET with a voltage swing between 0V to
V
OUT
.
PGND (Pin 9): Top and Bottom Gate Drivers Ground.
Connects to the (–) terminal of C
OUT
. Source of the main
N-channel MOSFET must be connected close to this pin
since this pin is also one of the inputs to the V
DS
sense
amplifier.
SW (Pin 10): This pin connects to the inputs of two
comparators: The V
DS
sense amplifier and the current
reversal comparator. The drain of an internal N-channel
start-up MOSFET (M1) is also connected to this pin.
PIN FUNCTIONS
UUU
Load Step Transient Response
Burst Mode Operation Inhibited
Load Step Transient Response
Burst Mode Operation Enabled
Load Step Transient Response
Burst Mode Operation Inhibited
TYPICAL PERFORMANCE CHARACTERISTICS
UW
V
IN
= 3.3V
V
OUT
= 5V
2A/DIV
V
IN
= 4.2V
V
OUT
= 5V
2A/DIV
V
SYNC
= V
IN
LOAD STEP = 100mA TO 1.7A
V
IN
= 4.2V
V
OUT
= 5V
2A/DIV
V
SYNC
= 0V
LOAD STEP = 100mA TO 1.7A
V
SYNC
= 0V
LOAD STEP = 100mA TO 1.7A
A/C COUPLED
OUTPUT
VOLTAGE
(0.2V/DIV)
INDUCTOR
CURRENT
(2A/DIV)
A/C COUPLED
OUTPUT
VOLTAGE
(0.2V/DIV)
INDUCTOR
CURRENT
(2A/DIV)
A/C COUPLED
OUTPUT
VOLTAGE
(0.2V/DIV)
INDUCTOR
CURRENT
(2A/DIV)
1700 G13 1700 G15
1700 G14
LTC1700
6
1700fa
Main Control Loop
The LTC1700 is a constant frequency, current mode
controller for DC/DC step-up converters. In normal opera-
tion, the main external N-channel power MOSFET is turned
on when the oscillator sets a latch and turned off either
when the V
DS
sense amplifier (V
DS
) resets the latch or the
duty cycle has reached 90%. When the main MOSFET is
turned off, the synchronous rectifier P-channel MOSFET is
FUNCTIONAL DIAGRA
UU
W
turned on until either the inductor current is about to
reverse, as determined by the current reversal comparator
(I
RCMP
), or the next cycle begins. Inductor current is
measured by sensing the V
DS
potential across the con-
ducting MOSFET. The peak inductor current is controlled
by the voltage on the I
TH
pin, which is the output of the
error amplifier (EA). An external resistive divider con-
nected between V
OUT
and GND allows EA to receive an
OPERATIO
U
(Refer to Functional Diagram)
+
–
BURST
INHIBIT
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
START-UP
OSCILLATOR
7
3
2
5
+
–
SYNC/
MODE
X
Y
V
FB
1
SGND
I
TH
1.205V
1.205V
REFERENCE
8
10
9
6
90% DUTY
CYCLE LIMIT
OV
+
–
+–
+
–
V
DS
I
RCMP
0.36V
SW
BG
TG
V
OUT
V
OUT
V
OUT
V
FB
V
REF
+ 58mV
PGND
1700 • FD
Y = “0” ONLY WHEN X IS A CONSTANT “1”, OTHERWISE Y = “1”
EA
+
–
+
–
BURST
+
–
RUN/
SOFT-START
S
QR
QB
L1
MAIN
OSC
4
SHDN
RUN/SS
V
OUT
V
OUT
SLOPE
COMP
M1
1Ω
9mV
60mV
I
CMP
= “1” WHEN V
OUT
< 2.3V
3.8µA
V
CC
0.12V
SLEEP
g
m
= 0.9m
Ω
SC
LTC1700
7
1700fa
Frequency Synchronization
The LTC1700 can be externally driven by a CMOS
(0V to 1.2V) compatible clock signal between 400kHz and
750kHz.
Do not
synchronize the LTC1700 below 400kHz
or above 750kHz as this may cause abnormal operation.
During synchronization, Burst Mode operation is
inhibited.
Low Input Operation
When the voltage at V
OUT
is less than 2.3V, the LTC1700
operates in the “start-up” mode. In this mode, most
internal circuitry is turned off except the start-up oscilla-
tor, current comparator (I
CMP
) and the start-up compara-
tor (SC). The voltage at pins TG and BG are forced to
ensure both the external MOSFETs are off. The start-up
oscillator runs at about 210kHz at 50% duty cycle and is
used to set the latch (L1) which turns on the internal
MOSFET M1 (see Functional Diagram). When the inductor’s
current reaches 60mA, the current comparator (I
CMP
) is
tripped and resets the latch. This turns M1 off and the
parasitic diode of the external P-channel MOSFET is used
to transfer the energy from the inductor to the output
capacitor. The above cycle repeats again on the next
oscillator pulse.
When the output voltage rises above 2.3V, the start-up
comparator will trip, powering up the rest of the LTC1700.
All start-up circuitry will then be turned off. Now the
LTC1700 has successfully transitioned out of its start-up
mode and commences normal operation as described
under the section “Main Control Loop.”
Protection Circuitry
Two protection circuits are incorporated into the LTC1700.
To prevent the inductor from saturating the maximum
duty cycle of the regulator is limited to 90%. This is done
to ensure that at least 10% of the time energy is being
transferred from the inductor to the output capacitor.
Output overvoltage protection is also provided. Should the
output rises about 5% above the regulated value, both the
external MOSFETs will be forced off.
OPERATIO
U
output feedback voltage V
FB
. When the load current in-
creases, it causes a slight decreases in V
FB
relative to the
1.205V reference, which in turn causes the I
TH
voltage to
increase until the average inductor current matches the
new load current.
The internal oscillator can be synchronized to an external
clock applied to the SYNC/MODE pin and can lock to a
frequency between 400kHz to 750kHz. When not synchro-
nized, the oscillator runs at 530kHz.
The main control loop is shut down by pulling the RUN/SS
pin low. Releasing the RUN/SS pin allows an internal
3.8µA current source to charge up an external soft-start
capacitor (C
SS)
. When this voltage reaches 0.8V, the main
control loop is enabled with the I
TH
voltage clamped at
approximately 5% of its maximum value. As C
SS
contin-
ues to charge, I
TH
is gradually released allowing normal
operation to resume.
An overvoltage comparator 0V guards against transient
overshoots greater than 5% above regulated voltage by
turning off both the external MOSFETs and keeping them
off until the fault is removed.
To prevent excessive inductor current buildup, the main
N-channel MOSFET is only allowed to turn on for a
maximum duty cycle of 90%.
Burst Mode Operation
The LTC1700 can be enabled to go into Burst Mode
operation at low load currents simply by connecting the
SYNC/MODE pin to a voltage of at least 1.2V. In this mode,
the peak current of the inductor is set as if V
ITH
= 0.36V (at
low duty cycles) even though the voltage at the I
TH
pin is
actually at a lower value. If the inductor’s average current
is greater than the load requirement, the voltage at the I
TH
pin will drop. When the I
TH
voltage goes below 0.12V, the
internal sleep signal goes low, turning off both external
MOSFETs. Now the load current will solely be supplied by
the output capacitor and the output voltage begins to
droop. This drooping of the output voltage results in the
rise of I
TH
voltage and once it has risen above 0.22V,
switching will then be resumed on the next oscillator cycle.
LTC1700
8
1700fa
Power MOSFET Selection
The LTC1700 requires two external power MOSFETs, one
for the main switch (N-channel) and one for the synchro-
nous rectifier (P-channel). Since the voltage operating
range of the LTC1700 is limited to less than 6V, the
breakdown voltage of the MOSFETs is not a concern.
Therefore the MOSFETs parameters that should be used
for selecting the power MOSFETs are threshold voltage
V
GS(TH)
, on-resistance R
DS(ON)
, reverse transfer capaci-
tance C
RSS
and maximum current I
D(MAX)
.
The gate drive voltage is set by the output voltage, V
OUT
.
Since the LTC1700 exits the start-up mode at 2.3V, sub-
logic level threshold MOSFETs should be used in LTC1700
applications. Newer MOSFETs with guaranteed R
DSON
at
gate voltage of 1.8V are now available and will work very
well with the LTC1700.
The MOSFETs on-resistance is chosen based on the
required load current. The maximum average output
current I
O(MAX)
is :
I
O(MAX)
= (I
PK
– 0.5∆I)(1 – DC)
where:
I
PK
= Peak Inductor Current
∆I = Inductor Ripple Current
DC = Duty Cycle
The peak inductor current is inherently limited in a
current mode controller. The maximum V
DS
sense volt-
age of the main MOSFET is limited to 78mV. The LTC1700
will not allow peak inductor current to exceed 78mV/
R
DS(ON)(N-CHANNEL)
. The following equation is a good
guide for determining the required R
DS(ON)(MAX)
, allow-
ing some margin for ripple current, current limit and
variations in the LTC1700 and external component val-
ues:
RV
I
DC I
DS ON MAX SENSE
OMAX LT
()( )
()
–
≅∆
+
⎛
⎝
⎜
⎞
⎠
⎟
()
1
1
2∆ρ
For 25°C operating condition, set ∆V
SENSE
= 65mV. For
conditions that vary over the full temperature range, set
∆V
SENSE
= 55mV.
The ρ
T
is a normalized term accounting for the significant
variation in R
DS(ON)
with temperature, typically about
0.375%/°C as shown in Figure 2. Junction to case tem-
perature T
JC
is around 10°C in most applications. For a
maximum ambient temperature of 70°C, using ρ
80°C
≅ 1.2
in the above equation is a reasonable choice. This equation
is plotted in Figure 3 to illustrate the dependence of
maximum output current on R
DS(ON)
, assuming
∆I = 0.4I
O(MAX)
.
APPLICATIONS INFORMATION
WUUU
Figure 2. RDS(ON) vs Temperature
Figure 3. Maximum Current vs RDS(ON)
Power dissipated by the main and synchronous
MOSFETs depends upon their respective duty cycles and
R
DS(ON)
(mΩ)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
MAXIMUM OUTPUT CURRENT (A)
1700 F03
0 10203040 50 60 70 80 90 100
DUTY CYCLE = 10%
DUTY CYCLE = 50%
DUTY CYCLE = 80%
TEMPERATURE (°C)
–55
ρT NORMALIZED ON RESISTANCE
65
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
1700 F02
–35 125
–15 52545 85
105
LTC1700
9
1700fa
load current. When the LTC1700 is operating in continu-
ous mode, the duty cycles for the MOSFETs are:
Main MOSFET Duty Cycle = 1 – V
IN
/V
OUT
Synchronous MOSFET Duty Cycle =
V
IN
/V
OUT
The MOSFET power dissipations at maximum output
current are:
P
MAIN
= (1 – V
IN
/V
OUT
)(I
O(MAX)2
)(ρ
T(MAIN)
)(R
DS(ON)
)
+ (k)(V
0UT2
)(I
O(MAX)
)C
RSS
(f)
P
SYNC
= (V
IN
/V
OUT
)(I
O(MAX)2
)(ρ
T(BOT)
)(R
DS(ON)
)
Both MOSFETs have I
2
R losses and the P
MAIN
equation
includes an additional term for transition losses, which are
largest at high output voltages. The constant k = 2.5 can be
used to estimate the amount of transition loss. The syn-
chronous MOSFET losses are greatest at high input volt-
age and low output voltage.
Start-Up Load Current
In start-up mode, the current limit is set at 60mA and the
oscillator runs at 210kHz with 50% duty cycle at
V
IN
= 1.8V. Since the current limit is low, the amount of
energy that is stored in the inductor during the on time is
small. Therefore the LTC1700 is incapable of supplying
the full load current. Figure 4 shows the amount of load
current the LTC1700 can provide while successfully exit-
ing out of the start-up mode. If the load current exceeds
the amount shown in Figure 4 during start-up, the output
voltage will not increase but will “hang” at a value below
the regulated voltage. However, if the load current is lower,
then there is a net positive amount of energy stored in the
output capacitor for every cycle. The output voltage then
rises and once it exceeds 2.3V, the LTC1700 will success-
fully exit out of its start-up mode.
Operating Frequency and Synchronization
The choice of operating frequency and inductor value is a
trade-off between efficiency and component size. Low
frequency operation improves efficiency by reducing
MOSFET switching losses, both gate charge loss and
transition loss. However, lower frequency operation re-
quires more inductance for a given amount of ripple
current.
The internal oscillator runs at a nominal 530kHz frequency
when the SYNC/MODE pin is either connected to GND or
V
IN
. When a CMOS compatible clock is applied to the
SYNC/MODE pin, the internal oscillator will lock on to the
external clock. The LTC1700 uses a novel technique to
phase lock to the external clock without the requirement of
an external PLL filter, hence minimizing components. The
capture range is between 400kHz to 750kHz. Do not
synchronize below or above the capture range as this will
cause abnormal operation. During synchronization, Burst
Mode operation is inhibited.
The LTC1700 will lock on at the leading edge of the external
clock and the minimum pulse width required is
200ns.
Remember just because you can operate at a high switch-
ing frequency doesn’t always mean you should. At higher
frequencies the switching loss increases, so the C
RSS
of
the N-channel MOSFET becomes very critical to keep
efficiencies high.
Slope Compensation and Peak Inductor Current
Current mode switching regulators that operate with a
duty cycle greater than 50% with continuous inductor
current can exhibit duty cycle instability. While the regu-
lator will not be damaged and may even continue to
function acceptably, a look at its frequency spectrum
will indicate harmonics. These harmonics may interfere
with other sensitive devices and will cause non-optimal
performance.
Figure 4. Start-Up Load Current
APPLICATIONS INFORMATION
WUUU
V
IN
(V)
1.0
START-UP LOAD CURRENT (mA)
2.2
1700 • G04
1.4 1.8
40
35
30
25
20
15
10
5
0
1.2 1.6 2.0 2.4
A
B
C
D
E
A = 15µH
B = 10µH
C = 6.2µH
D = 4.2µH
E = 2.2µH
LTC1700
10
1700fa
To eliminate this subharmonic oscillation, a compensat-
ing ramp is added internally to the LTC1700 on the
inductor current waveform when the duty cycle exceeds
5%. This scheme, known as slope compensation, makes
the loop perceive that there is more inductor current than
it actually has. As a result, the maximum current capability
of the regulator is reduced. This reduction is proportional
to the duty cycle and is shown in Figure 5. Hence for
applications that operate at high duty cycles, the
N-channel MOSFET chosen should have a lower R
DS(ON)
to make up for this reduction (See Design Example).
LV DC
fI
MIN IN MAX L
≥⎛
⎝
⎜⎞
⎠
⎟
()
∆
With Burst Mode operation enabled on the LTC1700, the
ripple current is normally set such that the inductor
current is continuous during burst periods. Remember
that during bursting, the peak current is clamped at
approximately:
I
BURST(PEAK)
≅ 36mV/R
DS(ON)
Hence the peak-to-peak ripple selected for optimal burst
mode operation should not exceed I
BURST(PEAK)
. This
implies a minimum inductance of:
LVDC
fI
DC
MINBURST
IN MAX
OMAX
=
()
⎛
⎝
⎜
⎞
⎠
⎟
()
()( . ) –
066 1
In applications that invoke Burst Mode operation, the
inductor should be chosen so it has low ripple (0.4I
OMAX
)
current during heavy load and continuous operation dur-
ing bursting. The criteria for selecting which equation to
use is:
Use L
MIN
for Duty Cycle > 36%
Use L
MINBURST
for Duty Cycle ≤ 36%
A smaller value than L
MIN
could be used in the circuit;
however, the inductor current will not be continuous
during burst periods. The advantage of using a smaller
inductance than L
MIN
is primarily size. The disadvantage is
higher output ripple.
Inductor Core Selection
Once the value for L is known, the type of inductor must be
selected. High efficiency converters generally cannot af-
ford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite, molypermalloy,
or Kool Mµ
®
cores. Actual core loss is independent of core
size for a fixed inductor value, but it is very dependent on
inductance selected. As inductance increases, core losses
go down. Unfortunately, increased inductance requires
more turns of wire and therefore copper losses will
increase. Ferrite designs have very low core losses and are
Inductor Value Selection
Given the input voltage, inductor value and operating
frequency, the ripple current can be calculated:
∆IVDC
fL
LIN
=⎛
⎝
⎜⎞
⎠
⎟
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors and output voltage
ripple. Thus, highest efficiency operation is obtained at
low frequency with small ripple current. To achieve this,
however, requires a larger inductor.
A reasonable starting point is to choose a ripple current
that is about 40% of I
O(MAX)
. Note that the largest ripple
current occurs at the highest V
IN
. To guarantee that ripple
current does not exceed a specified maximum, the induc-
tor should be chosen according to:
Figure 5. Maximum Output Current vs Duty Cycle
APPLICATIONS INFORMATION
WUUU
Kool Mµ is a registered trademark of Magnetics, Inc.
DUTY CYCLE (%)
0
NORMALIZED PEAK CURRENT REDUCTION
1.2
1.0
0.8
0.6
0.4
0.2
030 50
1700 F05
10 20 40 60 70
LTC1700
11
1700fa
preferred at high switching frequencies, so design goals
can concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard”, which means that
inductance collapses abruptly when the peak design cur-
rent is exceeded. This results in an abrupt increase in
inductor ripple current and output voltage ripple. Do not
allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a very good, low
loss core material for toroids, but it is more expensive than
ferrite. A reasonable compromise from the same manu-
facturer is Kool Mµ. Toroids are very space efficient,
especially when you can use several layers of wire. Be-
cause they generally lack a bobbin, mounting is more
difficult. However, new designs for surface mount are
available which do not increase the height significantly.
C
OUT
Selection
During continuous operation, the output capacitor has a
trapezoidal current profile. The RMS current into the
capacitor is then given by:
II
V
V
COUT RMS OUT OUT
IN
() –≅⎛
⎝
⎜
⎞
⎠
⎟
1
The RMS current is greatest at I
OUT(MAX)
and minimum
input working voltage. Therefore the output capacitor
should be chosen with a rating at least I
COUT(RMS)
. Several
capacitors can also be paralleled to meet this requirement.
Besides RMS current rating, the selection of C
OUT
is also
driven by the required effective series resistance (ESR).
The ESR of the capacitor together with its capacitance
determines the output ripple voltage and can be expressed
as:
∆V I ESR I
Ct
OUT PK OUT
OUT ON
≈
()
+2
where C
OUT
= output capacitance, t
ON
= on time of main
MOSFET and I
PK
= peak inductor current. A common
technique to lower the total ESR at the output is to parallel
the output capacitor with a 10µF ceramic capacitor.
The choice of using a smaller output capacitance in-
creases the output ripple voltage due to the frequency
dependent term but can be compensated for by using
capacitors of very low ESR to maintain low ripple voltage.
The I
TH
pin OPTI-LOOP compensation components can be
optimized to provide stable, high performance transient
response regardless of the output capacitors selected.
Manufacturers such as Nichicon, United Chemicon and
Sanyo should be considered for high performance through-
hole capacitors. The OS-CON semiconductor dielectric
capacitor available from Sanyo has the lowest ESR (size)
product of any aluminum electrolytic at a somewhat
higher price.
Multiple capacitors may have to be paralleled to meet the
ESR or RMS current handling requirements of the applica-
tion. Aluminum electrolytic and dry tantalum capacitors
are both available in surface mount configurations. In the
case of tantalum, it is critical that the capacitors are surge
tested for use in switching power supplies. An excellent
choice is the AVX TPS series of surface mount tantalum,
available in case heights ranging from 2mm to 4mm. Other
capacitor types include Sanyo OS-CON, Nichicon PL se-
ries and Sprague 593D and 595D series. Consult the
manufacturer for other specific recommendations.
Setting Output Voltage
The LTC1700 develops a 1.205V reference voltage be-
tween the feedback (Pin 3) terminal and ground (see
Figure 6). By selecting resistor R1, a constant current is
caused to flow through R1 and R2 to set the overall output
voltage. The regulated output voltage is determined by:
V
OUT
= 1.205(1 + R2/R1)
For most applications, a 30k resistor is suggested for R1.
To prevent stray pickup, a 100pF capacitor is suggested
across R1 located close to LTC1700.
Efficiency Considerations
Figure 6. Setting Output Voltage
LTC1700
R1
R2
VOUT
1700 • F06
VFB
APPLICATIONS INFORMATION
WUUU
LTC1700
12
1700fa
The efficiency of a switching regulator is equal to the
output power divided by the input power (× 100%).
Percent efficiency can be expressed as:
% Efficiency = 100%–(L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power. It is often useful to analyze individual
losses to determine what is limiting the efficiency and
which change would produce the most improvement.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1700 circuits:
1. LTC1700 supply current. This DC supply current, given
in the electrical characteristics, excludes MOSFET drivers
and control current. This supply current results in a small
loss which increases with V
OUT
.
2. MOSFETs gate charge current results from switching
the gate capacitance of the power MOSFETs. Each time a
MOSFET gate is switched on and then off, a packet of gate
charge Q
g
moves from V
OUT
to ground. The resulting
current out from V
OUT
is typically much larger than the
control circuit current. In continuous mode, I
GATECHG
=
f(Q
g(TOP)
+ Q
g(BOT)
). At high switching frequencies, this
loss becomes increasingly important.
3. DC I
2
R Losses. Since there is no sense resistor needed,
DC I
2
R losses arise only from the resistances of the
MOSFETs and inductor. In continuous mode, the average
current flows through the inductor but is “chopped”
between the synchronous P-channel MOSFET and the
main N-channel MOSFET. If the two MOSFETs have ap-
proximately the same R
DS(ON)
, then the resistance of one
MOSFET can simply be summed with the resistance of the
inductor to obtain the DC I
2
R loss. For example, if each
R
DS(ON)
= 0.05Ω and R
L
= 0.15Ω, then the total resistance
is 0.2Ω. This results in losses ranging from 2% to 8% as
the output current increases from 0.5A to 2A for a 5V
output. I
2
R losses cause the efficiency to drop at high
output currents.
4. Transition losses apply to the main external MOSFET
and increase at higher operating frequencies and output
voltages. Transition losses can be estimated from:
Transition Loss = 2.5(V
OUT
)
2
I
O(MAX)
C
RSS
(f)
Other losses including C
IN
and C
OUT
ESR dissipative
losses, and inductor core losses, generally account for
less than 2% total loss.
Run/Soft-Start Function
The RUN/SS pin is a dual purpose pin that provides the
soft-start function and a means to shut down the LTC1700.
Soft-start reduces input surge current from V
IN
by gradu-
ally increasing the internal current limit. Power supply
sequencing can also be accomplished using this pin.
An internal 3.8µA current source charges up an external
capacitor C
SS
. When the voltage on the RUN/SS pin
reaches 0.7V, the LTC1700 begins operating. As the
voltage on RUN/SS continues to ramp from 0.7V to 1V, the
internal current limit is also ramped at a proportional linear
rate. The current limit begins near 0A (at V
RUN/SS
= 0.7V)
and ends at 0.078/R
DS(ON)
(V
RUN/SS
≈ 2.2V). The output
current thus ramps up slowly, reducing the starting surge
current required from the input power supply. If the RUN/
SS has been pulled all the way to ground, there will be a
delay before the current limit starts increasing and is given
by:
t
DELAY
= 1.13C
SS
/I
CHG
For input voltages less than 2.3V during the start-up
duration, the soft-start function has no effect on the
internal 60mA current limit. Therefore to fully take advan-
tage of this feature, the soft-start capacitor has to be sized
accordingly to account for the time it takes V
OUT
to reach
2.3V. An approximate mathematical representation for the
time it takes V
OUT
to reach 2.3V upon powering up is given
by:
tCVV
L
VI
POWER UP OUT IN D
IN OUT
−=(. – – )
()
.– –
23
260
23
APPLICATIONS INFORMATION
WUUU
LTC1700
13
1700fa
where:
V
D
= Voltage drop of P-channel parasitic diode
I
OUT
= Initial load current during start-up
C
OUT
= Output capacitance
Hence you would select the start-up capacitor, C
SS
, to
ensure t
DELAY
> t
POWERUP.
Remember that the above
equation is only valid for V
IN
< 2.3V. If V
IN
is greater than
2.3V, then t
POWERUP
= 0ns.
Design Example
Assume the LTC1700 is used to convert a 3.3V input to 5V
output. Load current requirement is a maximum 3A and a
minimum of 100mA. Efficiency at both low and high load
currents is important. Ambient temperature = 25°C.
Since low load current efficiency is important, Burst Mode
operation is enabled by connecting pin 5 to V
OUT
.
Duty Cycle = 1 – V
IN
/V
OUT
= 0.34
Since the duty cycle is less than 36%, the value of the
inductor is chosen based on the L
MINBURST
equation.
L
MINBURST
= 0.8µH.
In the application, (Figure 7) a 4.6µH inductor is used to
further reduce ripple current. The actual ripple current is
now:
∆IV
kHz H A
L=µ
⎛
⎝
⎜⎞
⎠
⎟=33 034
530 4 6 046..
(. ) .
For the main N-channel MOSFET, the R
DS(ON)
should be:
RmV
I
DI
m
DS ON N CHANNEL O MAX L
()( ) ()
–.( )
.
−=
+∆
=Ω
63
105
13 2
Accounting for the peak current reduction due to slope
compensation (see Figure 5), the R
DS(ON)
of the N-channel
should be:
R
DS(ON)
= (13.2)(0.9)
= 11.9mΩ
The factor, 0.9, is obtained from Figure 5 using a duty cycle
of 34%. The peak current of the inductor is 5A. Select an
inductor that does not saturate at this current level. The
average current through the N-channel MOSFET is 1.62A
while the average current through the synchronous P-
channel MOSFET is 3A.
The FDS6670A and FDS6375 are chosen for the
N-channel and P-channel MOSFET respectively. We can
now calculate the temperature rise in the FDS6670A. RMS
current flowing through the FDS6670A is 2.78A. Hence
power dissipated is:
P
DISS
= (2.78)
2
(8 × 10
–3
)
= 61.82mW
The θ
JA
of the FDS6670A is 50°C/W. Therefore tempera-
ture rise is:
T
RISE
= 61.82mW × 50
= 3.1°C
This is an insignificant temperature rise and therefore the
omission of the ρT in calculating the required R
DS(ON)
does not generate a large error.
At 3A load, the RMS current into the output capacitor is
given by:
I
COUT(RMS)
= 3(5/3.3 – 1)
0.5
= 2.15A
To meet the RMS current requirement, two SANYO POSCAP
100µF capacitors are paralleled. These capacitors have
low ESR (55mΩ) and to futher reduce the overall ESR, a
10µF ceramic capacitor is placed in parallel with the
POSCAP capacitor. Figure 7 shows the complete circuit.
APPLICATIONS INFORMATION
WUUU
LTC1700
14
1700fa
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1700. These items are illustrated graphically in the
layout diagram in Figure 8. Check the following in your
layout:
1. Are all the components connected close to the SW node
(Pin 10)? The SW pin is the input to the V
DS
sense
amplifier and the current reverse comparator.
2. Connect the V
OUT
lead directly to the source of the
P-channel MOSFET. Besides supplying current to the
LTC1700, it also serves as the other input to the current
reverse comparator.
Figure 8. LTC1700 Layout Diagram (See PC Board Layout Checklist)
3. Connect the (+) plate of C2 to the source of the P-channel
MOSFET. This capacitor supports the load current when
the inductor is being “recharged”.
4. Connect the (–) plate of C2 to the source of the N-channel
MOSFET. Connect the power and signal ground to this
node.
5. Does the V
FB
pin connect directly to the feedback
resistors? The resistive divider R1 and R2 must be con-
nected between the (+) plate of C2 and signal ground.
6. Keep the switching node SW away from sensitive small
signal nodes.
7. Switched currents flow in M1, M2 and C2, keep the loop
formed by these components as small as possible.
APPLICATIONS INFORMATION
WUUU
Figure 7. Design Example Schematic
SGND
I
TH
V
FB
RUN/SS
SYNC/MODE
SW
PGND
BG
V
OUT
TG
LTC1700
1
2
3
4
5
10
9
8
7
6
+
L1
C1
C2
C4
C3 R3
M2
M1
V
IN
V
OUT
1700 • F08
R1
R2
SGND
ITH
RUN/SS
VFB
SYNC/MODE
SW
BG
PGND
TG
VOUT
LTC1700
1
2
4
3
5
10
8
9
6
7
+
L1
3.2µH
C3
22µF
C1
22µF
C4
470µF
6.3V
×2
270pF
470pF
3.9nF 5k
316k
100k
M2
Si9803
M1
IR7811W
VIN
3.3V
VOUT
5V/3A
1700 • F07
+
C2
68µF
6.3V
C1, C3: TAIYO YUDEN CERAMIC JMK316BJ106ML
C2: AVX TAJB68K006R
C4: SANYO POSCAP 6TPB470M
L1: SUMIDA CEP1233R2
M1: INTERNATIONAL RECTIFIER IR7811W
M2: SILICONIZ Si9803
LTC1700
15
1700fa
LTC1700 3.3V/1A Regulator with External Frequency Synchronization
PACKAGE DESCRIPTIO
U
MS Package
10-Lead Plastic MSOP
(LTC DWG # 05-08-1661)
SGND
ITH
RUN/SS
VFB
SYNC/MODE
SW
BG
PGND
TG
VOUT
LTC1700
1
2
4
3
5
10
8
9
6
7
+
L1
1.5µH
C4
22µF
C2
10µF
C3
220µF
6.3V
100pF
470pF
180pF
2.2k
53.6k
30k
M1
M1
VIN
2V TO 2.4V
3.3V/1A
+
C1
68µF
6.3V
C1: AVX TAJB686K006R
C2: TAIYO YUDEN CERAMIC JMK316BJ106ML
C3: AVX TPSD227M006R0100
C4: TAIYO YUDEN CERAMIC JMK325BJ226MM
L1: MURATA LQN6C
M1: SILICONIX Si6562DQ
1700 • TA01
650kHz
U
TYPICAL APPLICATIO
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
MSOP (MS) 0603
0.53 ± 0.152
(.021 ± .006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.127 ± 0.076
(.005 ± .003)
0.86
(.034)
REF
0.50
(.0197)
BSC
12345
4.90 ± 0.152
(.193 ± .006)
0.497 ± 0.076
(.0196 ± .003)
REF
8910 76
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.254
(.010) 0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ± 0.127
(.035 ± .005)
RECOMMENDED SOLDER PAD LAYOUT
0.305 ± 0.038
(.0120 ± .0015)
TYP
0.50
(.0197)
BSC
LTC1700
16
1700fa
PART NUMBER DESCRIPTION COMMENTS
LT1307/LT1307B Single Cell Micropower Step-Up Regulator 3.3V/75mA From 1V; 600kHz Fixed Frequency
LT1316 Burst Mode Operation DC/DC with Programmable Current Limit 1.5V Minimum V
IN
; Precise Control of Peak Switch Current
LT1317 2-Cell Micropower Step-Up Regulator 3.3V/200mA From Two Cells; 600kHz Fixed Frequency
LT1517-5 Micropower, Regulated Charge Pump 3-Cells to 5V at 20mA, SOT-23 Package, 6µA I
Q
LT1610 1.7MHz Single Cell Micropower Step-Up Regulator 30µA IQ, MSOP Package, Internal Compensation
LT1611 Inverting 1.4MHz Switching Regulator 5V to -5V at 150mA, Low Output Noise
LT1613 1.4MHz Single Cell Micropower Regulator 5-Lead SOT-23 Package
LT1619 Micropower Step-Up Regulator Controller Drives External NMOS; 3.3V to 5V at up to 8A
LTC1625 No R
SENSE
Synchronous Step-Down Controller Up to 97% Efficiency; 3.7V ≤ V
IN
≤ 36V;
1.19V ≤ V
OUT
≤ V
IN
; I
OUT
up to 15A
LTC1871 Boost, Flyback and SEPIC Controller 5V ≤ V
IN
≤ 30V; No R
SENSE
, Programmable Frequency
50kHz to 1MHz; 10-Lead MSOP
LTC1872 SOT-23, 550kHz Step-Up Controller Minimum Board Area; Drives External NMOS
LTC3401/LTC3402 Integrated 1A and 2A Synchronous Step-Up Regulators Up to 97% Efficiency; up to 3MHz Operation; No External
Diode; 0.85V Start-Up Voltage
LTC3425 5A, Monolithic Step-Up Converter 8MHz, 4-Phase Operation, Very Low Ripple,
5mm x 5mm QFN Package
LTC3803 SOT-23 Flyback Controller 200kHz Operation, Adjustable Slope Compensation,
Internal Soft-Start
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2000
LT/TP 0804 1K REV A • PRINTED IN USA
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C3: TAIYO YUDEN CERAMIC JMK325BJ226M
C4: KEMET T520D227M006AS
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M1: Si9802
M2: Si9803
U
TYPICAL APPLICATIO
