CY7C106B
CY7C1006B
Document #: 38-05037 Rev. ** Page 5 of 10
Switchi ng Ch aracteristics Ov er the Operating Range[5]
7C106B-12
7C1006B-12 7C106B-15
7C1006B-15 7C106B-20
7C1006B-20 7C106B-25
7C1006B-25 7C106B-35
Parameter Description Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
READ CYCLE
tRC Read Cycle Time 12 15 20 25 35 ns
tAA Address to Data Valid 12 15 20 25 35 ns
tOHA Data Hold from Address Change 3 3 3 3 3 ns
tACE CE LOW to Data Valid 12 15 20 25 35 ns
tDOE OE LOW to Data Valid 6 7 8 10 10 ns
tLZOE OE LOW to Low Z 0 0 0 0 0 ns
tHZOE OE HIGH to High Z[6, 7] 6781010ns
tLZCE CE LOW to Low Z[7] 33333ns
tHZCE CE HIGH to High Z[6, 7] 6781010ns
tPU CE LOW to Power-Up 0 0 0 0 0 ns
tPD CE HIGH to Power-Down 12 15 20 25 35 ns
WRITE CYCLE[8, 9]
tWC Write Cycle Time 12 15 20 25 35 ns
tSCE CE LOW to Write End 10 12 15 20 25 ns
tAW Address Set-Up to Write End 10 12 15 20 25 ns
tHA Address Hold from Write End 0 0 0 0 0 ns
tSA Address Set-Up to Write Start 0 0 0 0 0 ns
tPWE WE Pulse Width 10 12 15 20 25 ns
tSD Data Set-Up to Write End 7 8 10 15 20 ns
tHD Data Hold from Write End 0 0 0 0 0 ns
tLZWE WE HIGH to Low Z[7] 23333ns
tHZWE WE LOW to High Z[6, 7] 6781010ns
Notes:
5. Test conditions assume signal transition time of 3 ns or less, timing ref erence levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
IOL/IOH and 30–pF load capac itance.
6. tHZOE, tHZCE, and tHZWE are speci fied wi th a load cap acita nce of 5 pF as in pa rt (b ) of AC Test Loads. Transiti on i s measured ±500 mV from st eady-s tate v ol tage .
7. A t an y given temperature and voltage con dition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE f or any giv en de vice .
8. The internal write time of the memory is defined by the overlap of CE and WE LO W. CE and WE must be LO W to initi ate a write, and th e tr ansitio n of e ither of thes e
signal s can terminate the write . The input d ata se t-up an d hol d timing should be referenced to the l eading e dge of the s ignal t hat terminates t he write .
9. The minimum write cycle time for Write Cycle No. 3 (WE controlled, OE LO W) i s t he sum of tHZWE and tSD.