LM2727, LM2737 www.ti.com SNVS205D - AUGUST 2002 - REVISED MARCH 2013 LM2727/LM2737 N-Channel FET Synchronous Buck Regulator Controller for Low Output Voltages Check for Samples: LM2727, LM2737 FEATURES DESCRIPTION * * * The LM2727 and LM2737 are high-speed, synchronous, switching regulator controllers. They are intended to control currents of 0.7A to 20A with up to 95% conversion efficiencies. The LM2727 employs output over-voltage and under-voltage latchoff. For applications where latch-off is not desired, the LM2737 can be used. Power up and down sequencing is achieved with the power-good flag, adjustable soft-start and output enable features. The LM2737 and LM2737 operate from a low-current 5V bias and can convert from a 2.2V to 16V power rail. Both parts utilize a fixed-frequency, voltage-mode, PWM control architecture and the switching frequency is adjustable from 50kHz to 2MHz by adjusting the value of an external resistor. Current limit is achieved by monitoring the voltage drop across the on-resistance of the low-side MOSFET, which enhances low duty-cycle operation. The wide range of operating frequencies gives the power supply designer the flexibility to fine-tune component size, cost, noise and efficiency. The adaptive, nonoverlapping MOSFET gate-drivers and high-side bootstrap structure helps to further maximize efficiency. The high-side power FET drain voltage can be from 2.2V to 16V and the output voltage is adjustable down to 0.6V. 1 2 * * * * * * * Input Power from 2.2V to 16V Output Voltage Adjustable Down to 0.6V Power Good flag, Adjustable Soft-Start and Output Enable for Easy Power Sequencing Output Over-Voltage and Under-Voltage LatchOff (LM2727) Output Over-Voltage and Under-Voltage Flag (LM2737) Reference Accuracy: 1.5% (0C - 125C) Current Limit Without Sense Resistor Soft Start Switching Frequency from 50 kHz to 2 MHz TSSOP-14 Package APPLICATIONS * * * * * Cable Modems Set-Top Boxes/ Home Gateways DDR Core Power High-Efficiency Distributed Power Local Regulation of Core Power Typical Application +5V 0.1P RIN 10: CIN 2.2PF RFADJ Q1 VCC HG BOOT SD CSS 12n CIN1,2 10PF 6.3V Si4884DY 1.5 PH 6.1 A, 9.6 m: RCS VO = 1.2V@5A ISEN PWGD LM27x7 FREQ 63.4k VIN = 3.3V CBOOT D1 LG SS PGND SGND PGND EAO 2.2k Q2 L1 Si4884DY RFB2 10k + CO1,2 2200PF 6.3V, 2.8A FB RFB1 10k CC1 CC2 180p 2.2p RC1 392k 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2002-2013, Texas Instruments Incorporated LM2727, LM2737 SNVS205D - AUGUST 2002 - REVISED MARCH 2013 www.ti.com Connection Diagram 1 2 3 5 6 7 HG LG PGND SGND Vcc PWGD ISEN PGND LM27x7 4 BOOT SD FREQ FB SS EAO 14 13 12 11 10 9 8 Figure 1. 14-Lead Plastic TSSOP JA = 155C/W See Package Number PW0014A PIN DESCRIPTION BOOT (Pin 1) - Supply rail for the N-channel MOSFET gate drive. The voltage should be at least one gate threshold above the regulator input voltage to properly turn on the high-side N-FET. LG (Pin 2) - Gate drive for the low-side N-channel MOSFET. This signal is interlocked with HG to avoid shoot-through problems. PGND (Pins 3, 13) - Ground for FET drive circuitry. It should be connected to system ground. SGND (Pin 4) - Ground for signal level circuitry. It should be connected to system ground. VCC (Pin 5) - Supply rail for the controller. PWGD (Pin 6) - Power Good. This is an open drain output. The pin is pulled low when the chip is in UVP, OVP, or UVLO mode. During normal operation, this pin is connected to VCC or other voltage source through a pull-up resistor. ISEN (Pin 7) - Current limit threshold setting. This sources a fixed 50A current. A resistor of appropriate value should b