19-1667; Rev 0; 4/00 1.8GHz to 2.5GHz Direct Downconversion Receivers Baseband Gain Offset Correction Loop +2.7V to +3.3V Single-Supply Operation Small 48-pin TQFP-EP Package Ordering Information PART MAX2700ECM TEMP. RANGE -40C to 85C MAX2701ECM -40C to 85C PIN-PACKAGE 48 TQFP-EP 48 TQFP-EP Pin Configuration IIN2+ 37 38 39 40 41 42 43 44 45 46 VCC LO GND MIX_I GND IIN1+ IIN1DCI1+ DCI1IOUT1 VCC 47 48 TOP VIEW CEXTCEXT+ 1 36 IIN2- 2 35 VCC 3 34 X2_EN GND 4 33 32 DCI2+ DCI2IOUT2 GND LNAIN GND 6 31 RFIN- 30 GND GAIN_SET SHDN 8 29 RFIN+ VCC QOUT2 DCQ2- MAX2700 MAX2701 7 25 DCQ2+ QIN2- 24 26 12 23 27 11 22 28 21 9 10 20 AGC VCC 5 GND LNAOUT GND MIX_Q VCC QIN1+ QIN1DCQ1+ DCQ1QOUT1 MIXTNK QIN2+ Digital Microwave Radios Variable Gain Baseband Amplifiers with >60dB Control Range 19 Wideband 2.4GHz ISM Radios 3dB Baseband Channel Bandwidth of At Least 56MHz 18 Two-Way MMDS Wideband LO Quadrature Generator 17 Wideband Direct-Sequence Spread-Spectrum Systems High Linearity Direct I/Q Downconverter 16 Wireless Local Loop LNA with Selectable Gain and Shutdown Option 15 ________________________Applications Cascaded Performance at 1960 MHz 3.5dB Noise Figure -7.5dBm Input IP3 at Maximum Gain 14 The two baseband VGAs in each channel provide 80dB of total maximum gain and greater than 60dB of gain control. The first AGC amplifier is optimized for low noise, low power dissipation, and high linearity over the entire gain range to ensure high gain compression performance. An external lowpass filter between baseband VGAs provides the required channel selectivity at the adjacent channel. An integrated gain offset correction loop circuit provides <0.3dB amplitude mismatch between the I and Q channels. The MAX2700/MAX2701 operate from a single +2.7V to +3.3V power supply, drawing only 165mA of supply current and 20A in shutdown mode. Both devices are available in small 48-pin TQFP packages with exposed paddle (EP) for optimum high-frequency performance. Input Frequency Range 1.8GHz to 2.1GHz (MAX2700) 2.1GHz to 2.5GHz (MAX2701) 13 The MAX2700/MAX2701 are highly integrated direct downconversion (zero-IF) receivers designed for wideband wireless local loop (WLL) systems operating in the 1.8GHz to 2.5GHz band. The MAX2700/MAX2701s' zero-IF architecture eliminates the need for IF downconversion stages and the use of an IF SAW filter. This reduces the overall receiver cost by reducing the component count and required board space. The MAX2700/MAX2701 have three main blocks: lownoise amplifier (LNA), quadrature downconverter, and baseband variable gain amplifiers (VGAs). The LNA is a single-ended amplifier with selectable gain and shutdown options. It provides a high input third-order intercept point (IP3), which reduces cross-modulation and gain compression due to high-level RF interference. The quadrature downconverter section consists of two highly linear double-balanced mixers driven by an external local oscillator (LO) with a selectable LO doubler. The double-balanced mixers are optimized to provide high input IP3 and minimum added noise. The mixers' high input second-order intercept point (IIP2) helps minimize receiver desensitization due to highlevel AM-modulated interferers. Features TQFP-EP ________________________________________________________________ Maxim Integrated Products 1 For free samples and the latest literature, visit www.maxim-ic.com or phone 1-800-998-8800. For small orders, phone 1-800-835-8769. MAX2700/MAX2701 General Description MAX2700/MAX2701 1.8GHz to 2.5GHz Direct Downconversion Receivers ABSOLUTE MAXIMUM RATINGS VCC to GND ..............................................................-0.3V to +6V RF Signals PRFIN, PLNAIN, PLO .....................................................+15dBm Baseband Signals IIN1+ to IIN1-, IIN2+ to IIN2-, QIN1+ to QIN1-, QIN2+ to QIN2- ......................................2V Input Voltages AGC, GAIN_SET, SHDN, X2_EN, CEXT_, RFIN_, LO, LNAIN, IIN_ _, QIN_ _ , DCI_ _ , DCQ_ _ to GND ..........-0.3V to (VCC + 0.3V) Input Current AGC..............................................................50mA All Digital Inputs...............................................10mA Continuous Power Dissipation (TA = +70C) 48-Pin TQFP-EP (derate 27mW/C above +70C) .....2000mW Operating Temperature Range ...........................-40C to +85C Storage Temperature Range .............................-65C to +150C Junction Temperature ......................................................+150C Lead Temperature (soldering, 10s) .................................+300C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (MAX2700/MAX2701 EV kit (Figure 3), VCC = +2.7V to +3.3V, SHDN = GAIN_SET = VCC, X2_EN = GND, VAGC = 1.25V, CEXT+ connected to CEXT-; no RF input signals applied; RFIN, LNAIN, LO inputs are terminated with 50, LNAOUT connected to VCC through a 10nH inductor; MIX_I, MIX_Q, QIN1+, QIN1-, QOUT1, IIN1+, IIN1-, IOUT1, QIN2+, QIN2-, QOUT2, IIN2+, IIN2-, IOUT2 pins are unconnected; TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = +3.0V, TA = +25C.) PARAMETERS CONDITIONS MIN TYP MAX UNITS 3.3 V SUPPLY Supply Voltage 2.7 TA = +25C LNA enabled MAX2700 165 215 MAX2701 167 220 LNA disabled MAX2700 155 200 MAX2701 156 LNA enabled MAX2700 230 MAX2701 235 LNA disabled MAX2700 210 MAX2701 215 Operating Supply Current TA = -40C to +85C Shutdown Supply Current SHDN = GND, VAGC = 0.5V 20 205 100 mA A CONTROL INPUTS/OUTPUTS Input Logic Voltage High 2 V Input Logic Voltage Low Input Bias Current DC Output Voltage 0.6 SHDN, X2_EN, GAIN_SET -1 0.5 AGC, +0.5 < VAGC < +2.0V -22 12 AGC, VAGC = 0.5V, SHDN = GND -2 2 A 2 MIX_I, MIX_Q 1.2 IOUT1, QOUT1 1.1 1.25 IOUT2, QOUT2 V _______________________________________________________________________________________ V 1.8GHz to 2.5GHz Direct Downconversion Receivers (MAX2700/MAX2701 EV kit (Figure 3), VCC = +3.0V, TA = +25C, SHDN = GAIN_SET = VCC, X2_EN = GND, CEXT+ connected to CEXT-, PLO = -13dBm, FLO = 980MHz (MAX2700) and 1200MHz (MAX2701), PLNAIN = -30dBm, PRFIN = -25dBm, LNAIN and RFIN (single-ended input to balun) driven from 50 source, LNAOUT terminated into load; MIX_I, MIX_Q AC-coupled to 2k load; IIN1+, QIN1+, IIN2+, QIN2+ driven from 1.1k AC-coupled source; IOUT1, QOUT1 AC-coupled to 2k; IOUT2, QOUT2 AC-coupled to 100; input to VGAs, 20mVp-p at 1MHz tone, set VAGC = 1.25V, unless otherwise noted.) PARAMETERS CONDITIONS MIN TYP MAX UNITS LNA STAGE Operating Frequency Range (Note 1) MAX2700 1800 2100 MAX2701 2100 2500 MAX2700, fLNAIN = 1960MHz TA = -40C to 85C Power Gain (Note 2) MAX2701, fLNAIN = 2400MHz TA = -40C to 85C Noise Figure Input Third-Order Intercept (Note 3) Reverse Isolation Isolation GAIN_SET = VCC 13.5 17.1 -1.9 GAIN_SET = GND -7.5 13 20 GAIN_SET = GND -8 2.5 GAIN_SET = VCC 13 16.5 18.5 -1.8 0.5 GAIN_SET = GND -6 12.5 GAIN_SET = GND -6.5 2.0 GAIN_SET = GND 15.8 MAX2701, fLNAIN = 2400MHz GAIN_SET = VCC 2.3 GAIN_SET = GND 16.7 MAX2700, fLNAIN = 1960MHz GAIN_SET = VCC +2.7 GAIN_SET = GND +5.1 MAX2701, fLNAIN = 2400MHz GAIN_SET = VCC +3.8 GAIN_SET = GND +4.3 1800MHz to 2500MHz, GAIN_SET = VCC or GND 28 LNAIN to LO, fLNAIN = 1800MHz to 2500MHz 30 LNAOUT to RFIN, fLNAIN = 1800 MHz to 2500 MHz 44 At LNA output, with external matching circuit at LNAOUT dB 1.0 GAIN_SET = VCC VSWR 2 19 MAX2700, fLNAIN = 1960MHz At LNA input, with external matching circuit at LNAIN 19.5 GAIN_SET = VCC GAIN_SET = VCC MHz MAX2700 GAIN_SET = VCC 1.1 GAIN_SET = GND 1.8 MAX2701 GAIN_SET = VCC 1.3 GAIN_SET = GND 2.1 MAX2700 GAIN_SET = VCC 1.7 GAIN_SET = GND 1.6 MAX2701 GAIN_SET = VCC 1.2 GAIN_SET = GND 1.4 dB dBm dB dB - MIXER STAGE (Differential RF input to mixer I/Q outputs with external balun and matching circuit to 50) Frequency Range (Notes 1, 2) Voltage Gain DSB Noise Figure MAX2700 1800 2100 MAX2701 2100 2500 MAX2700, fRFIN = 1960 MHz 16 19.3 21.5 MAX2701, fRFIN = 2400 MHz 14.5 18.1 20 MAX2700, fRFIN = 1960MHz 11.0 MAX2701, fRFIN = 2400MHz 12.8 MHz dB dB _______________________________________________________________________________________ 3 MAX2700/MAX2701 AC ELECTRICAL CHARACTERISTICS MAX2700/MAX2701 1.8GHz to 2.5GHz Direct Downconversion Receivers AC ELECTRICAL CHARACTERISTICS (continued) (MAX2700/MAX2701 EV kit (Figure 3), VCC = +3.0V, TA = +25C, SHDN = GAIN_SET = VCC, X2_EN = GND, CEXT+ connected to CEXT-, PLO = -13dBm, FLO = 980MHz (MAX2700) and 1200MHz (MAX2701), PLNAIN = -30dBm, PRFIN = -25dBm, LNAIN and RFIN (single-ended input to balun) driven from 50 source, LNAOUT terminated into load; MIX_I, MIX_Q AC-coupled to 2k load; IIN1+, QIN1+, IIN2+, QIN2+ driven from 1.1k AC-coupled source; IOUT1, QOUT1 AC-coupled to 2k; IOUT2, QOUT2 AC-coupled to 100; input to VGAs, 20mVp-p at 1MHz tone, set VAGC = 1.25V, unless otherwise noted.) PARAMETERS Input Third-Order Intercept (Note 4) Input Second-Order Intercept (Note 5) VSWR CONDITIONS MAX2701, f LO = 1200MHz +6.5 MAX2700 +28.3 MAX2701 +38 With 50 external matching at RFIN+/ RFIN- Isolation (RFIN to MIX_I/Q) MAX2701 1.5 MAX2701 1.2 fRFIN = 1800MHz to 2100MHz 35 fRFIN 20MHz 28 fRFIN = 2100MHz to 2500MHz 22 fRFIN 20MHz 12 38 MAX2701, f RFIN = 2100MHz to 2500MHz 45 Isolation (LO to RFIN) MAX2701 4 MAX2700 MAX2700, f RFIN = 1800MHz to 2100MHz MAX2700 Mixer Spurious Suppression TYP +6.3 MAX2700 Isolation (RFIN to LO) MIN MAX2700, f LO = 980MHz fLO = 900MHz to 1050MHz, X2_EN = GND 49 fLO = 900MHz to 1050MHz, X2_EN = GND, isolation at 2 x FLO 43 fLO = 1800MHz to 2100MHz, X2_EN = V CC 33 fLO = 1050MHz to 1250MHz, X2_EN = GND 60 fLO = 1050MHz to 1250MHz, X2_EN = GND, isolation at 2 x F LO 44 fLO = 2100MHz to 2500MHz, X2_EN = V CC 70 2 x LO - RF (Note 6) Baseband Bandwidth MIX_I/Q Gain Mismatch GV (I-Q) (between mixer I and Q channels) MAX dBm dBm - dB dB dB 60 -1dB bandwidth (Note 2) 37 UNITS dBc 69 MHz -3dB bandwidth 170 Baseband frequency = 125kHz 0.1 0.7 Up to -1dB baseband width (Note 2) 0 0.7 dB _______________________________________________________________________________________ 1.8GHz to 2.5GHz Direct Downconversion Receivers (MAX2700/MAX2701 EV kit (Figure 3), VCC = +3.0V, TA = +25C, SHDN = GAIN_SET = VCC, X2_EN = GND, CEXT+ connected to CEXT-, PLO = -13dBm, FLO = 980MHz (MAX2700) and 1200MHz (MAX2701), PLNAIN = -30dBm, PRFIN = -25dBm, LNAIN and RFIN (single-ended input to balun) driven from 50 source, LNAOUT terminated into load; MIX_I, MIX_Q AC-coupled to 2k load; IIN1+, QIN1+, IIN2+, QIN2+ driven from 1.1k AC-coupled source; IOUT1, QOUT1 AC-coupled to 2k; IOUT2, QOUT2 AC-coupled to 100; input to VGAs, 20mVp-p at 1MHz tone, set VAGC = 1.25V, unless otherwise noted.) PARAMETERS CONDITIONS Group Delay tgd , RFIN to MIX_I/Q, frequency up to -1dB baseband width Differential Group Delay (Note 2) tgd (between mixer I and Q channels) Output Impedance Zout , MIX_I, MIX_Q, frequency up to -1dB baseband width Mixer Output Level (Note 2) MIX_I, MIX_Q, baseband output at -1dB compression point MIN TYP MAX 1.8 ns 1 1.4 UNITS ns 1.4 2.1 Vp-p LO DOUBLER, LO BUFFER, QUADRATURE GENERATOR X2_EN = GND LO Frequency Range (Notes 1, 2) LO Input Power (Note 7) X2_EN = V CC MAX2700 900 1050 MAX2701 1050 1250 MAX2700 1800 2100 MAX2701 2100 2500 X2_EN = V CC or GND -16 -13 fLO = 900MHz to 1050MHz, X2_EN = GND 2.0 fLO = 1800MHz to 2100MHz, X2_EN = V CC 1.8 fLO = 1050MHz to 1250MHz, X2_EN = GND 1.7 fLO = 2100MHz to 2500MHz, X2_EN = V CC 2.0 -10 MHz dBm MAX2700 LO VSWR - MAX2701 , MIX_I to MIX_Q Quadrature Error 1.5 4.5 degrees BASEBAND STAGE 1 (IIN1 TO IOUT1, QIN1 TO QOUT1) Channel Bandwidth -1dB bandwidth (Note 2) 14 26 MHz -3dB bandwidth 56 Input Impedance IIN1+, IIN1-, QIN1+, QIN1-, single-ended 1.9 k Input Impedance Mismatch Between IIN1+ and QIN1+ 4 Voltage Gain (G V) VAGC = 0.5V -1.5 2.2 6 VAGC = 2.0V 37 40 42 dB Voltage Gain Mismatch Mismatch between IIN1 to IOUT1 and QIN1 to QOUT1, 0.5V < V AGC < 2 V 0.2 dB VGA1 Gain Slope Guaranteed Monotonic over 0.5V <V AGC < 2V, VAGC = 1.25V 34 dB/V Noise Figure ZS = 1.1k (Note 8) Phase Shift (Note 2) For 10dB of gain (with AGC) VAGC = 2.0V 7.5 VAGC = 0.5V 34 0.5 dB 0.9 degrees _______________________________________________________________________________________ 5 MAX2700/MAX2701 AC ELECTRICAL CHARACTERISTICS (continued) MAX2700/MAX2701 1.8GHz to 2.5GHz Direct Downconversion Receivers AC ELECTRICAL CHARACTERISTICS (continued) (MAX2700/MAX2701 EV kit (Figure 3), VCC = +3.0V, TA = +25C, SHDN = GAIN_SET = VCC, X2_EN = GND, CEXT+ connected to CEXT-, PLO = -13dBm, FLO = 980MHz (MAX2700) and 1200MHz (MAX2701), PLNAIN = -30dBm, PRFIN = -25dBm, LNAIN and RFIN (single-ended input to balun) driven from 50 source, LNAOUT terminated into load; MIX_I, MIX_Q AC-coupled to 2k load; IIN1+, QIN1+, IIN2+, QIN2+ driven from 1.1k AC-coupled source; IOUT1, QOUT1 AC-coupled to 2k; IOUT2, QOUT2 AC-coupled to 100; input to VGAs, 20mVp-p at 1MHz tone, set VAGC = 1.25V, unless otherwise noted.) PARAMETERS CONDITIONS MIN TYP MAX UNITS IIN1+ to IOUT1, up to -1dB frequency 1.6 1.6 Group Delay Mismatch (Note 2) QIN1+ to QOUT1, up to -1dB frequency Between I and Q channel from 100kHz up to -1dB Output Impedance IOUT1, QOUT1, up to -1dB bandwidth 7 Output Impedance Mismatch Between IOUT1 and QOUT1, up to -1dB bandwidth 1 Output Voltage (Note 2) At -1dB compression point, IOUT1, QOUT1 0.7 1.1 Vp-p 19 34 Group Delay 0.3 ns 1.3 ns BASEBAND STAGE 2 (IIN2+ TO IOUT2, QIN2+ TO QOUT2) Channel Bandwidth -3dB bandwidth 63 Input Impedance IIN2+, IIN2-, QIN2+, QIN2-, single-ended Input Impedance Mismatch Between IIN2+ and QIN2+ 2.1 1.5 Voltage Gain (G V) 6 -1dB bandwidth (Note 2) MHz K VAGC = 0.5V -0.6 4.4 9.5 VAGC = 2.0V 37 39 42 0.9 Gain Correction Disabled Voltage Gain Mismatch (Note 2) Mismatch between IIN2 to IOUT2 and QIN2 to QOUT2, 0.5V < VAGC < 2V VGA2 Gain Slope Guaranteed monotonic over 0.5V < V AGC <2V, VAGC =1.25V Noise Figure ZS = 1.1k dB dB Gain Correction Enabled (2dB initial mismatch) 0.3 30 VAGC = 2.0V 14 VAGC = 0.5V 47 Phase shift (Note 2) For 10dB of gain 0.2 Group Delay IIN2+ to IOUT2, QIN2+ to QOUT2, up to -1dB Frequency 1.7 Group Delay Mismatch (Note 2) Between I and Q channel from 100kHz up to -1dB frequency 0.2 Output Impedance IOUT2 , QOUT2, up to -1dB bandwidth 4.0 Output Impedance Mismatch Between IOUT2 and QOUT2, up to -1 dB bandwidth Output Voltage (Note 2) At -1dB compression point, IOUT2 , QOUT2 1.2 dB/V dB 1.4 degrees ns 2.0 ns 4.0 1.9 Vp-p _______________________________________________________________________________________ 1.8GHz to 2.5GHz Direct Downconversion Receivers (MAX2700/MAX2701 EV kit (Figure 3), VCC = +3.0V, TA = +25C, SHDN = GAIN_SET = VCC, X2_EN = GND, CEXT+ connected to CEXT-, PLO = -13dBm, FLO = 980MHz (MAX2700) and 1200MHz (MAX2701), PLNAIN = -30dBm, PRFIN = -25dBm, LNAIN and RFIN (single-ended input to balun) driven from 50 source, LNAOUT terminated into load; MIX_I, MIX_Q AC-coupled to 2k load; IIN1+, QIN1+, IIN2+, QIN2+ driven from 1.1k AC-coupled source; IOUT1, QOUT1 AC-coupled to 2k; IOUT2, QOUT2 AC-coupled to 100; input to VGAs, 20mVp-p at 1MHz tone, set VAGC = 1.25V, unless otherwise noted.) PARAMETERS CONDITIONS MIN TYP MAX UNITS POWER SUPPLY Power-Supply Ripple Rejection VCC = 3.0V + 100mVPP frequency = 100 to 300kHz, VOUT = 0.3Vp-p, (Note 9) Mixer 57 VGA1 35 VGA2 28 dBc Note 1: This is the recommended operating frequency range. The parts have been characterized over the specified frequency range. Operation outside this range is possible but not guaranteed. Note 2: Guaranteed by design and characterization. Note 3: LNA is matched at input and output to 50; f1 = 1960MHz, f2 = 1965MHz for MAX2700; f1 = 2400MHz, f2 = 2405MHz for MAX2701; PIN = -30dBm per tone. Note 4: Mixer IIP3 test. For MAX2700, RFIN is matched to 50 at 1960MHz. At RFIN, apply f1 = 1964.2MHz, f2 = 1968.2MHz, PIN = -25dBm per tone, and measure IM3 product power level at 200kHz. For MAX2701, RFIN is matched to 50 at 2400MHz. At RFIN, apply f1 = 2404.2MHz, f2 = 2408.2MHz, PIN = -25dBm per tone, and measure IM3 product power level at 200kHz. Note 5: Mixer IIP2 test. For MAX2700, RFIN is matched to 50 at 1960MHz. At RFIN, apply f1 = 1964.2MHz, f2 = 1968.2MHz, PIN = -25dBm per tone, and measure IM2 product power level at 4MHz. For MAX2701, RFIN is matched to 50 at 2400MHz. At RFIN, apply f1 = 2404.2MHz, f2 = 2408.2MHz, PIN = -25dBm per tone, and measure IM2 product power level at 4MHz. Note 6: Mixer spurious attenuation response. Mixer is matched to 50 at 1800MHz and FLO = 900MHz (LO doubler enabled). FRFIN = 1801MHz, PRFIN = -85dBm, FSPUR = 3601.5MHz, PSPUR = -60dBm. Measure IF at 1MHz and spurious at 1.5MHz at the output. For better than 38dBc spurious attenuation response, output spurious level should be at least 10dB lower than the IF signal level. In the (2 x LO) - (1 x RF) spurious product notation, LO denotes the frequency of the final LO driving the I/Q mixers inputs. Note 7: Mixer gain specifications are production tested over LO power range. Note 8: A filter output impedance of 1.1k can directly drive the VGA inputs since there is minimal mismatch loss between source and VGA input impedance. Note 9: Electrolytic bypass cap to VCC not connected. _______________________________________________________________________________________ 7 MAX2700/MAX2701 AC ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (MAX2700/MAX2701 EV kit (Figure 3), VCC = +3.0V, TA = +25C, SHDN = GAIN_SET = VCC, X2_EN = GND, CEXT+ connected to CEXT-, PLO = -13dBm, FLO = 980MHz (MAX2700) and 1200MHz (MAX2701), PLNAIN = -30dBm, PRFIN = -25dBm, LNAIN and RFIN (single-ended input to balun) driven from 50 source, LNAOUT terminated into load; MIX_I, MIX_Q AC-coupled to 2k load; IIN1+, QIN1+, IIN2+, QIN2+ driven from 1.1k AC-coupled source; IOUT1, QOUT1 AC-coupled to 2k; IOUT2, QOUT2 AC-coupled to 100; input to VGAs, 20mVp-p at 1MHz tone, set VAGC = 1.25V, unless otherwise noted.) MAX2700 TA = -45C 18 TA = +25C 4 TA = -45C 2 TA = +25C TA = +25C TA = +85C 160 TA = -45C GAIN (dB) 0 GAIN (dB) 170 MAX2700-03 MAX2700-02 20 MAX2700-01 180 LNA GAIN vs. FREQUENCY vs. TEMPERATURE LNA GAIN vs. FREQUENCY vs. TEMPERATURE ICC vs. VCC vs. TEMPERATURE ICC (mA) 16 TA = +85C 14 -2 TA = +85C -4 -6 150 12 -8 140 10 2.7 2.9 3.1 3.3 3.5 HIGH-GAIN MODE 1700 1800 VCC (V) -10 1900 2000 1900 LNA NOISE FIGURE vs. FREQUENCY vs. TEMPERATURE MAX2700-04 -25 1800 2.6 2.4 NF (dB) HIGH-GAIN MODE TA = +85C 2.2 2.0 TA = +25C LOW-GAIN MODE 1.8 -35 1.6 1700 1800 1900 FREQUENCY (MHz) 8 TA = -45C HIGH-GAIN MODE 1.4 -40 2000 2100 2000 FREQUENCY (MHz) FREQUENCY (MHz) LNA REVERSE ISOLATION vs. FREQUENCY vs. GAIN MODE -30 LOW-GAIN MODE 1700 2100 MAX2700-05 2.5 S12 (dB) MAX2700/MAX2701 1.8GHz to 2.5GHz Direct Downconversion Receivers 1700 1750 1800 1850 1900 1950 2000 FREQUENCY (MHz) _______________________________________________________________________________________ 2100 1.8GHz to 2.5GHz Direct Downconversion Receivers (MAX2700/MAX2701 EV kit (Figure 3), VCC = +3.0V, TA = +25C, SHDN = GAIN_SET = VCC, X2_EN = GND, CEXT+ connected to CEXT-, PLO = -13dBm, FLO = 980MHz (MAX2700) and 1200MHz (MAX2701), PLNAIN = -30dBm, PRFIN = -25dBm, LNAIN and RFIN (single-ended input to balun) driven from 50 source, LNAOUT terminated into load; MIX_I, MIX_Q AC-coupled to 2k load; IIN1+, QIN1+, IIN2+, QIN2+ driven from 1.1k AC-coupled source; IOUT1, QOUT1 AC-coupled to 2k; IOUT2, QOUT2 AC-coupled to 100; input to VGAs, 20mVp-p at 1MHz tone, set VAGC = 1.25V, unless otherwise noted.) MAX2700 4.5 MAX2700-07 6 MAX2700-06 17 LNA IIP3 vs. VCC LNA IIP3 vs. TEMPERATURE 18 5 3.5 TA = +85C 3.0 TA = +25C 15 IIP3 (dBm) IIP3 (dBm) NF (dB) 4 16 LOW-GAIN MODE 4.0 LOW-GAIN MODE HIGH-GAIN MODE 3 MAX2700-08 LNA NOISE FIGURE vs. FREQUENCY vs. TEMPERATURE HIGH-GAIN MODE 2.5 2.0 1.5 2 TA = -45C 1.0 14 1 0.5 1800 1900 -45 2000 -25 -5 MAX2700-09 TA = +25C 24 20 18 TA = +85C 16 TA = +25C TA = -45C 20 TA = +85C 16 DOUBLER ENABLED 1.7 1.8 10 1.9 FREQUENCY (GHz) 2.0 2.1 3.50 LO = -16dBm TO -10dBm 20 18 16 14 12 12 3.25 24 22 18 3.00 MIXER VOLTAGE GAIN vs. FREQUENCY vs. LO POWER 14 14 2.75 VCC (V) VOLTAGE GAIN (dB) VOLTAGE GAIN (dB) VOLTAGE GAIN (dB) 2.50 75 22 22 10 55 MIXER VOLTAGE GAIN vs. FREQUENCY vs. TEMPERATURE MIXER VOLTAGE GAIN vs. FREQUENCY vs. TEMPERATURE TA = -45C 35 TEMPERATURE (C) FREQUENCY (MHz) 24 15 MAX2700-11 1700 0 0 MAX2700-10 13 LOW-GAIN MODE 12 DOUBLER DISABLED 1.7 1.8 10 1.9 FREQUENCY (GHz) 2.0 2.1 DOUBLER DISABLED 1.7 1.8 1.9 2.0 2.1 FREQUENCY (GHz) _______________________________________________________________________________________ 9 MAX2700/MAX2701 Typical Operating Characteristics (continued) Typical Operating Characteristics (continued) (MAX2700/MAX2701 EV kit (Figure 3), VCC = +3.0V, TA = +25C, SHDN = GAIN_SET = VCC, X2_EN = GND, CEXT+ connected to CEXT-, PLO = -13dBm, FLO = 980MHz (MAX2700) and 1200MHz (MAX2701), PLNAIN = -30dBm, PRFIN = -25dBm, LNAIN and RFIN (single-ended input to balun) driven from 50 source, LNAOUT terminated into load; MIX_I, MIX_Q AC-coupled to 2k load; IIN1+, QIN1+, IIN2+, QIN2+ driven from 1.1k AC-coupled source; IOUT1, QOUT1 AC-coupled to 2k; IOUT2, QOUT2 AC-coupled to 100; input to VGAs, 20mVp-p at 1MHz tone, set VAGC = 1.25V, unless otherwise noted.) MAX2700 7 6 12 5 11 10 TA = +25C 25 TA = -45C TA = +85C 4 3 TA = +25C 10 DOUBLER ENABLED 0 1850 1900 1950 2000 2050 2100 2.60 2.85 3.10 LO-RFIN ISOLATION vs. LO FREQUENCY (INCLUDING BALUN) DOUBLER DISABLED 1.25 -45 -50 DOUBLER ENABLED -55 -60 1.00 1.7 1.8 1.9 FREQUENCY (GHz) 2.0 2.1 3.35 LO-LNAIN ISOLATION vs. LO FREQUENCY DOUBLER DISABLED LO-LNAIN ISOLATION (dB) LO-RFIN ISOLATION (dB) DOUBLER ENABLED 3.10 -40 MAX2700-16 -40 DOUBLER DISABLED 1.50 2.85 VCC (V) ERROR vs. LO FREQUENCY 1.75 DOUBLER ENABLED 2.60 VCC (V) MAX2700-15 5 3.35 FREQUENCY (MHz) 2.00 TA = -45C 15 1 7 1800 TA = +25C TA = +85C 2 TA = -45C 8 20 MAX2700-17 9 10 30 IIP2 (dBm) 13 35 MAX2700-13 TA = +85C IIP3 (dBm) NF (dB) 14 MIXER IIP2 vs. VCC vs. TEMPERATURE MIXER IIP3 vs. VCC vs. TEMPERATURE 8 MAX2700-12 15 MAX2700-14 DSB MIXER NOISE FIGURE vs. FREQUENCY vs. TEMPERATURE ERROR (DEGREES) MAX2700/MAX2701 1.8GHz to 2.5GHz Direct Downconversion Receivers -50 -60 DOUBLER ENABLED -70 -80 0.85 0.90 0.95 FREQUENCY (GHz) 1.00 1.05 0.85 0.90 0.95 FREQUENCY (GHz) ______________________________________________________________________________________ 1.00 1.05 1.8GHz to 2.5GHz Direct Downconversion Receivers (MAX2700/MAX2701 EV kit (Figure 3), VCC = +3.0V, TA = +25C, SHDN = GAIN_SET = VCC, X2_EN = GND, CEXT+ connected to CEXT-, PLO = -13dBm, FLO = 980MHz (MAX2700) and 1200MHz (MAX2701), PLNAIN = -30dBm, PRFIN = -25dBm, LNAIN and RFIN (single-ended input to balun) driven from 50 source, LNAOUT terminated into load; MIX_I, MIX_Q AC-coupled to 2k load; IIN1+, QIN1+, IIN2+, QIN2+ driven from 1.1k AC-coupled source; IOUT1, QOUT1 AC-coupled to 2k; IOUT2, QOUT2 AC-coupled to 100; input to VGAs, 20mVp-p at 1MHz tone, set VAGC = 1.25V, unless otherwise noted.) MAX2700 MIXER'S OUTPUT 1dB COMPRESSION POINT vs. VCC vs. RL MIXER BASEBAND BANDWIDTH vs. RL 3dB BANDWIDTH 2.4 MIXER OUTPUT (Vp-p) BANDWIDTH (MHz) 120 100 80 1dB BANDWIDTH 60 RL = 1.05k, 2.00k 2.2 2.0 RL = 0.56k 1.8 1.6 40 1.4 20 1.2 0 MAX2700-19 140 2.6 MAX2700-18 160 1.0 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.5 2.7 2.9 RL (k) 3.1 3.3 3.5 VCC (V) MAX2701 TA = -45C 18 170 TA = +25C 160 TA = -45C 2 16 1 15 2.7 2.9 VCC (V) 3.1 3.3 TA = +25C 14 TA = +85C 3.5 TA = +85C 0 TA = +25C TA = -45C -1 13 -2 12 -3 10 2.5 3 17 -4 11 150 4 GAIN (dB) TA = +85C GAIN (dB) ICC (mA) 180 MAX2701-22 19 5 MAX2701-21 20 MAX2701-20 190 LNA GAIN vs. FREQUENCY vs. TEMPERATURE LNA GAIN vs. FREQUENCY vs. TEMPERATURE ICC vs. VCC vs. TEMPERATURE HIGH-GAIN MODE 2100 2200 -5 2300 FREQUENCY (MHz) 2400 2500 LOW-GAIN MODE 2100 2200 2300 2400 2500 FREQUENCY (MHz) ______________________________________________________________________________________ 11 MAX2700/MAX2701 Typical Operating Characteristics (continued) Typical Operating Characteristics (continued) (MAX2700/MAX2701 EV kit (Figure 3), VCC = +3.0V, TA = +25C, SHDN = GAIN_SET = VCC, X2_EN = GND, CEXT+ connected to CEXT-, PLO = -13dBm, FLO = 980MHz (MAX2700) and 1200MHz (MAX2701), PLNAIN = -30dBm, PRFIN = -25dBm, LNAIN and RFIN (single-ended input to balun) driven from 50 source, LNAOUT terminated into load; MIX_I, MIX_Q AC-coupled to 2k load; IIN1+, QIN1+, IIN2+, QIN2+ driven from 1.1k AC-coupled source; IOUT1, QOUT1 AC-coupled to 2k; IOUT2, QOUT2 AC-coupled to 100; input to VGAs, 20mVp-p at 1MHz tone, set VAGC = 1.25V, unless otherwise noted.) MAX2701 LNA REVERSE ISOLATION vs. FREQUENCY LNA NOISE FIGURE vs. FREQUENCY vs. TEMPERATURE LNA NOISE FIGURE vs. FREQUENCY vs. TEMPERATURE TA = +85C -26 TA = +25C MAX2701-25 HIGH-GAIN MODE 20 MAX2701-24 3.5 MAX2701-23 -24 18 NF (dB) TA = -45C LOW-GAIN MODE -28 NF (dB) 2.5 -30 14 2.0 -32 -34 2200 2300 2400 2500 TA = +85C TA = -45C TA = +25C 12 HIGH-GAIN MODE 1.5 2100 2100 2200 10 2300 2400 LOW-GAIN MODE 2100 2500 2200 2300 2400 2500 FREQUENCY (MHz) FREQUENCY (MHz) FREQUENCY (MHz) LNA IIP3 vs. TEMPERATURE LNA IIP3 vs. VCC MIXER VOLTAGE GAIN vs. FREQUENCY vs. TEMPERATURE LOW-GAIN MODE 5 22 MAX2701-27 LOW-GAIN MODE 5 6 MAX2701-26 6 21 TA = -45C IIP3 (dBm) 3 HIGH-GAIN MODE 2 VOLTAGE GAIN (dB) 4 4 HIGH-GAIN MODE 3 2 20 19 18 1 17 1 0 16 0 -1 15 -45 -25 -5 15 35 TEMPERATURE (C) 12 16 MAX2701-28 S12 (dB) 3.0 IIP3 (dBm) MAX2700/MAX2701 1.8GHz to 2.5GHz Direct Downconversion Receivers 55 75 2.50 2.75 3.00 VCC (V) 3.25 3.50 TA = +25C DOUBLER ENABLED 2.1 2.2 TA = +85C 2.3 2.4 FREQUENCY (GHz) ______________________________________________________________________________________ 2.5 1.8GHz to 2.5GHz Direct Downconversion Receivers MAX2701 21 24 19 18 17 TA = +25C 2.2 16 10 14 9 10 2.3 2.4 FREQUENCY (GHz) 11 2.5 TA = +25C TA = -45C 8 DOUBLER ENABLED 2.1 7 2.2 2.3 2.4 2100 2.5 2200 60 MAX2701-32 9 2400 2500 ERROR vs. LO FREQUENCY MIXER IIP2 vs. VCC vs. TEMPERATURE MIXER IIP3 vs. VCC vs. TEMPERATURE 11 2300 FREQUENCY (MHz) FREQUENCY (GHz) 2.0 TA = +25C 50 MAX2701-34 2.1 12 18 12 TA = +85C TA = +85C 13 20 MAX2701-33 15 DOUBLER DISABLED 14 NF (dB) 20 16 PLO = -16dBm TO -10dBm 22 VOLTAGE GAIN (dB) VOLTAGE GAIN (dB) TA = -45C 15 MAX2701-30 MAX2701-29 22 DSB MIXER NOISE FIGURE vs. FREQUENCY vs. TEMPERATURE MIXER VOLTAGE GAIN vs. FREQUENCY vs. LO POWER MAX2701-31 MIXER VOLTAGE GAIN vs. FREQUENCY vs. TEMPERATURE TA = +85C TA = -45C TA = +25C IIP2 (dBm) IIP3 (dBm) 5 30 3 20 1 10 TA = -45C TA = +85C ERROR (DEGREES) 1.5 40 7 DOUBLER ENABLED 1.0 DOUBLER DISABLED 0.5 DOUBLER ENABLED -1 2.60 2.85 3.10 VCC (V) 3.35 0 DOUBLER ENABLED 2.60 2.85 0 3.10 VCC (V) 3.35 2.1 2.2 2.3 2.4 2.5 FREQUENCY (GHz) ______________________________________________________________________________________ 13 MAX2700/MAX2701 Typical Operating Characteristics (continued) (MAX2700/MAX2701 EV kit (Figure 3), VCC = +3.0V, TA = +25C, SHDN = GAIN_SET = VCC, X2_EN = GND, CEXT+ connected to CEXT-, PLO = -13dBm, FLO = 980MHz (MAX2700) and 1200MHz (MAX2701), PLNAIN = -30dBm, PRFIN = -25dBm, LNAIN and RFIN (single-ended input to balun) driven from 50 source, LNAOUT terminated into load; MIX_I, MIX_Q AC-coupled to 2k load; IIN1+, QIN1+, IIN2+, QIN2+ driven from 1.1k AC-coupled source; IOUT1, QOUT1 AC-coupled to 2k; IOUT2, QOUT2 AC-coupled to 100; input to VGAs, 20mVp-p at 1MHz tone, set VAGC = 1.25V, unless otherwise noted.) Typical Operating Characteristics (continued) (MAX2700/MAX2701 EV kit (Figure 3), VCC = +3.0V, TA = +25C, SHDN = GAIN_SET = VCC, X2_EN = GND, CEXT+ connected to CEXT-, PLO = -13dBm, FLO = 980MHz (MAX2700) and 1200MHz (MAX2701), PLNAIN = -30dBm, PRFIN = -25dBm, LNAIN and RFIN (single-ended input to balun) driven from 50 source, LNAOUT terminated into load; MIX_I, MIX_Q AC-coupled to 2k load; IIN1+, QIN1+, IIN2+, QIN2+ driven from 1.1k AC-coupled source; IOUT1, QOUT1 AC-coupled to 2k; IOUT2, QOUT2 AC-coupled to 100; input to VGAs, 20mVp-p at 1MHz tone, set VAGC = 1.25V, unless otherwise noted.) MAX2701 LO-RF ISOLATION vs. LO FREQUENCY (INCLUDING BALUN) LO-LNAIN ISOLATION (dB) -50 -60 -70 MAX2701-36 DOUBLER DISABLED LO-RFIN ISOLATION (dB) LO-LNAIN ISOLATION vs. LO FREQUENCY -40 MAX2701-35 -40 DOUBLER DISABLED -50 -60 -70 DOUBLER ENABLED DOUBLER ENABLED -80 1.05 1.10 1.15 1.20 1.175 1.200 1.225 FREQUENCY (GHz) MIXER BASEBAND BANDWIDTH vs. RL MIXER OUTPUT 1dB COMPRESSION POINT vs. VCC vs. RL 2.8 2.6 3dB BANDWIDTH MIXER OUTPUT (Vp-p) 140 120 100 80 60 1dB BANDWIDTH 40 1.250 MAX2701-38 3.0 MAX2701-37 160 RL = 2.00k 2.4 2.2 RL = 0.56k 2.0 1.8 RL = 1.05k 1.6 1.4 20 1.2 1.0 0 0.50 0.75 1.00 1.25 RL (k) 14 -80 1.150 1.25 FREQUENCY (GHz) 180 BANDWIDTH (MHz) MAX2700/MAX2701 1.8GHz to 2.5GHz Direct Downconversion Receivers 1.50 1.75 2.00 2.5 2.7 2.9 3.1 3.3 VCC (V) ______________________________________________________________________________________ 3.5 1.8GHz to 2.5GHz Direct Downconversion Receivers (MAX2700/MAX2701 EV kit (Figure 3), VCC = +3.0V, TA = +25C, SHDN = GAIN_SET = VCC, X2_EN = GND, CEXT+ connected to CEXT-, PLO = -13dBm, FLO = 980MHz (MAX2700) and 1200MHz (MAX2701), PLNAIN = -30dBm, PRFIN = -25dBm, LNAIN and RFIN (single-ended input to balun) driven from 50 source, LNAOUT terminated into load; MIX_I, MIX_Q AC-coupled to 2k load; IIN1+, QIN1+, IIN2+, QIN2+ driven from 1.1k AC-coupled source; IOUT1, QOUT1 AC-coupled to 2k; IOUT2, QOUT2 AC-coupled to 100; input to VGAs, 20mVp-p at 1MHz tone, set VAGC = 1.25V, unless otherwise noted.) MAX2700/MAX2701 TA = +25C 0 -0.5 TA = -45C 1.00 1.25 1.50 1.75 0.75 1.00 1.25 1.50 1.75 0.50 2.00 0.75 1.00 1.25 1.50 1.75 AGC (V) AGC (V) AGC (V) VGA1 VGA OUTPUT 1dB COMPRESSION POINT vs. AGC VOLTAGE vs. RL VGA1 BANDWIDTH vs. RL VGA2 VOLTAGE GAIN vs. AGC VOLTAGE vs. TEMPERATURE RL = 2.0k 1.50 RL = 0.6k RL = 1.1k 1.25 3dB BANDWIDTH 50 40 30 40 2.00 MAX2700/1-44 60 VOLTAGE GAIN (dB) VGA1 BANDWIDTH (MHz) 1.75 50 MAX2700/1-43 70 MAX2700/1-42 2.00 V01 (PEAK TO PEAK) 5 0.50 2.00 TA = +25C 10 -2.0 0.75 20 15 TA = +85C -1.5 0.50 TA = -45C 25 0.5 -1.0 0 TA = +85C 30 TA = +25C 1.0 MAX2700/1-41 MAX2700/1-40 35 NF (dB) TA = +85C 20 10 1.5 I/Q VOLTAGE GAIN (dB) VOLTAGE GAIN (dB) 30 2.0 MAX2700/1-39 TA = -45C 40 VGA1 NOISE FIGURE vs. AGC VOLTAGE vs. TEMPERATURE I/Q VOLTAGE GAIN MISMATCH vs. TEMPERATURE AGC VOLTAGE GAIN vs. AGC VOLTAGE vs. TEMPERATURE TA = -45C 30 TA = +85C 20 TA = +25C 10 1dB BANDWIDTH RL = 1.6k 20 1.00 0.50 0.75 1.00 1.25 AGC (V) 1.50 1.75 2.00 0 0.6 0.8 1.0 1.2 1.4 RL (k) 1.6 1.8 2.0 0.50 0.75 1.00 1.25 1.50 1.75 2.00 AGC (V) ______________________________________________________________________________________ 15 MAX2700/MAX2701 Typical Operating Characteristics (continued) Typical Operating Characteristics (continued) (MAX2700/MAX2701 EV kit (Figure 3), VCC = +3.0V, TA = +25C, SHDN = GAIN_SET = VCC, X2_EN = GND, CEXT+ connected to CEXT-, PLO = -13dBm, FLO = 980MHz (MAX2700) and 1200MHz (MAX2701), PLNAIN = -30dBm, PRFIN = -25dBm, LNAIN and RFIN (single-ended input to balun) driven from 50 source, LNAOUT terminated into load; MIX_I, MIX_Q AC-coupled to 2k load; IIN1+, QIN1+, IIN2+, QIN2+ driven from 1.1k AC-coupled source; IOUT1, QOUT1 AC-coupled to 2k; IOUT2, QOUT2 AC-coupled to 100; input to VGAs, 20mVp-p at 1MHz tone, set VAGC = 1.25V, unless otherwise noted.) MAX2700/MAX2701 VGA2 I/Q VOLTAGE GAIN MISMATCH WITH GAIN CORRECTION I/Q MISMATCH (dB) 1 TA = +85C 0 2.3 1.2 0.8 RL = 1.025k 2.2 0.4 0dB INPUT MISMATCH GAIN CORRECTION DISABLED 1.00 1.25 1.50 1.75 2.00 RL = 0.1k 0.75 1.00 1.25 1.50 1.75 2.00 0.75 1.00 1.25 1.50 1.75 2.00 AGC (V) AGC (V) VGA2 BANDWIDTH vs. RS VGA2 Q TO I CROSSTALK vs. RL COMBINED VGA1 AND VGA2 TURN-ON TIME vs. DC OFFSET CAPACITANCE* -35 Q TO I CROSSTALK (dB) 3dB BANDWIDTH 60 -40 -45 -50 40 1dB BANDWIDTH 1.2 1.4 RS (k) 1.6 1.8 2.0 300 200 0 -60 1.0 400 100 -55 20 500 MAX2700/1-50 -30 MAX2700/1-48 80 0.8 2.0 AGC (V) 100 0.6 RL = 0.56k RL = 0.25k 1.8 0.50 TURN-ON TIME (s) 0.75 MAX2700/1-49 0.50 2.1 1.9 0 -1 MAX2700/1-47 1.6 TA = +25C 2 2dB INPUT MISMATCH GAIN CORRECTION ENABLED V01 (PEAK-TO-PEAK V) TA = -45C I/Q VOLTAGE GAIN (dB) 2.0 MAX2700/1-45 3 VGA2 VGA OUTPUT 1dB COMPRESSION POINT vs. AGC VOLTAGE vs. RL MAX2700/1-46 VGA2 I/Q VOLTAGE GAIN MISMATCH vs. TEMPERATURE VGA2 BANDWIDTH (MHz) MAX2700/MAX2701 1.8GHz to 2.5GHz Direct Downconversion Receivers 100 300 500 700 RL () 900 1100 0 25 50 75 100 DC OFFSET CAPACITANCE (nF) *C19, C23, C30, C36 in the EV kit schematic in Figure 3 represent DC offset capacitors. Time from SHDN = GND to SHDN = VCC, until DC quiescent point settles within 10% of static DC quiescent point. 16 ______________________________________________________________________________________ 1.8GHz to 2.5GHz Direct Downconversion Receivers PIN NAME FUNCTION 1 CEXT- Inverting Input Port of VGA2 I/Q Gain Imbalance Correction Circuitry. Connect an external capacitor between CEXT- and CEXT+ to activate the circuit. Short CEXT- to CEXT+ to disable. 2 CEXT+ Noninverting Input Port of VGA2 I/Q Gain Imbalance Correction Circuitry. Connect an external capacitor between CEXT+ and CEXT- to activate the circuit. Short CEXT- to CEXT+ to disable. 3, 12, 17, 29, 38, 48 VCC 4 X2_EN 5, 7, 8, 13, 15, 32, 44, 46 GND 6 LNAIN 9 GAIN_SET 10 SHDN 11 AGC Automatic Gain-Control Input for AGC. Bypass this pin with a 1000pF capacitor to GND to minimize coupling. 14 LNAOUT LNA Output. This pin requires an external pullup inductor and off-chip 50 match. 16 MIX_Q Mixer Q-Channel Baseband Output. Connect external series capacitor to AC-couple the output to the load. 18 QIN1+ Noninverting VGA1, Q-Channel Baseband Input 19 QIN1- Inverting VGA1, Q-Channel Baseband Input 20 DCQ1+ Noninverting Offset Correction Input for Q-Channel VGA1 Amplifier 21 DCQ1- Inverting Offset Correction Input for Q-Channel VGA1 Amplifier 22 QOUT1 Q-Channel VGA1 Amplifier Baseband Output 23 MIXTNK Inductive Common-Mode Degeneration Pin for Mixer Stages 24 QIN2+ Noninverting VGA2, Q-Channel Baseband Input 25 QIN2- Inverting VGA2, Q-Channel Baseband Input 26 DCQ2+ Noninverting Offset Correction Input for Q-Channel VGA2 Amplifier 27 DCQ2- Inverting Offset Correction Input for Q-Channel VGA2 Amplifier 28 QOUT2 Q-Channel VGA2 Amplifier Baseband Output 30 RFIN+ I/Q Mixers Inverting Input. For narrow frequency bands between 1.8GHz and 2.5GHz, port must be matched using external matching components. Supply Voltage. Bypass VCC to GND with capacitors as close to pin as possible. Logic-Level Enable for Doubler Circuitry. Drive logic low to turn on the doubler (fLO = fRFIN/2). Drive logic high to bypass the doubler (fLO = fRFIN). Ground. Connect to ground plane with minimal inductance. LNA Input. Connect to GND to turn the LNA off. Off-chip 50 match required. LNA Gain Select Input. Drive logic high to select the high-gain mode. Drive logic low to select low-gain mode. Shutdown Control Input. Drive logic low to enable shutdown mode. ______________________________________________________________________________________ 17 MAX2700/MAX2701 Pin Description 1.8GHz to 2.5GHz Direct Downconversion Receivers MAX2700/MAX2701 Pin Description (continued) PIN NAME FUNCTION 31 RFIN- I/Q Mixers Noninverting Input. For narrow frequency bands between 1.8GHz and 2.5GHz, port must be matched using external matching components. 33 IOUT2 I-Channel VGA2 Baseband Output 34 DCI2- Inverting Offset Correction Input for I-Channel VGA2 Amplifier 35 DCI2+ Noninverting Offset Correction Input for I-Channel VGA2 Amplifier 36 IIN2- Inverting VGA2, I-Channel Baseband Input 37 IIN2+ Noninverting VGA2, I-Channel Baseband Input 39 IOUT1 I-Channel VGA1 Amplifier Baseband Output 40 DCI1- Inverting Offset Correction Input for I-Channel VGA1 Amplifier 41 DCI1+ Noninverting Offset Correction Input for I-Channel VGA1 Amplifier 42 IIN1- Inverting VGA1, I-Channel Baseband Input 43 IIN1+ Noninverting VGA1, I-Channel Baseband Input 45 MIX_I Mixer I-Channel Baseband Output. Connect external series capacitor to AC-couple the output to the load. 47 LO LO Input. Internally matched to 50. Detailed Description The MAX2700/MAX2701 consist of five major blocks: LNA, I/Q direct demodulator, VGAs, gain correction, and bias circuits. Low-Noise Amplifier The LNA is a two-gain-level amplifier with low noise figure and high IIP3. Connect GAIN_SET to GND to switch the amplifier to a low-gain mode that provides an accurate gain step. High IIP3 minimizes the cross-modulation between TX power leakage and close-in interferers at the RX input. The LNA can be turned off independent of the other functional blocks by connecting LNAIN to GND. External matching is required to match the input and output to 50. The LNA in Figures 1 and 2 is matched to 1960MHz and 2400MHz over a narrow bandwidth. I/Q Demodulator The direct I/Q demodulator downconverts the RF signal directly to baseband I and Q signals. This architecture's main advantage is that the received signal is amplified and filtered at baseband rather than at some high intermediate frequency. This eliminates the need for an expensive IF SAW filter and the IF oscillator. 18 Furthermore, the direct conversion scheme eliminates the need for image rejection, thereby relaxing the bandpass filter selectivity requirements following the LNA. The direct downconverter consists of highly linear double-balanced I/Q mixers, an LO frequency doubler option, an LO quadrature generator, and baseband I/Q buffer amplifiers driven by the mixers' outputs. In a direct downconversion receiver, I/Q mixers have more stringent requirements on mixer output linearity since they need to handle large voltage swings at baseband due to close-in interferers. The RF signal is applied to the differential input (RFIN+, RFIN-) of the direct downconversion receiver through an off-chip balun. The differential input structure results in a higher common-mode rejection for second-order nonlinearity generated in the receiver's front end. The differential input requires matching to appropriate impedance of the balun. Some applications may require a bandpass filter between the LNA and the mixer, as shown in Figures 1 and 2, to attenuate the residual transmit power leakage and out-of-band spurious signals. The mixer baseband buffers amplify the mixer I and Q differential outputs and convert them to single-ended outputs (MIX_I, MIX_Q). These buffer amplifiers have ______________________________________________________________________________________ 1.8GHz to 2.5GHz Direct Downconversion Receivers IOUT2 QOUT2 AGC2 I_CHANNEL AGC2 Q_CHANNEL IIN2IIN2+ VGA CONTROL QIN2QIN2+ OFFSET CORRECTION LOOP IOUT1 AGC1 I_CHANNEL OFFSET CORRECTION LOOP QOUT1 AGC1 Q_CHANNEL IIN1IIN1+ QIN1QIN1+ OFFSET CORRECTION LOOP MIX_I OFFSET CORRECTION LOOP AMP I_CHANNEL DOUBLE BALANCED MIXER RFINRFIN+ Q_CHANNEL Q_CHANNEL I_CHANNEL MIX_Q AMP X2_EN MULTIPLEXER X2 POLYPHASE RC QUADRATURE GENERATOR BIAS BLOCK DOUBLER LO LD GENERATOR BIAS BIAS HIGH-GAIN AMP LNA BLOCK MST SHDN LNAOUT LOW-GAIN AMP SHDN very low output impedance (<2). The smallest load that should be used is 600. At the output of the I/Q mixers' buffers, baseband lowpass filters should be used to provide adjacent and alternate channel selectivity. This reduces the level of adjacent channel and close-in interferers to the input of the following baseband amplifier. The LO signal is applied externally to the LO input port. An LO doubler circuit doubles the LO signal frequency LNAIN GAIN_SET before it is applied to the mixer LO port. Connect X2_EN to ground to enable the LO doubler circuit. With this circuit enabled, the required LO frequency is half that of the RF carrier frequency. Connect X2_EN to VCC to disable the frequency doubler circuit and the LO frequency is the same as the RF carrier frequency. The half LO frequency scheme results in the use of lower frequency and lower cost VCOs. It also reduces the LO leakage to the receiver's input. The mixer is guaranteed ______________________________________________________________________________________ 19 MAX2700/MAX2701 Functional Diagram FROM TRANSMITTER DUPLEXER 100pF 1000pF RX ENABLE LNA GAIN SELECT 4.7nH BPF AGC 0.01F DOUBLER ENABLE/DISABLE GND GND LNAIN GND X2_EN VCC CEXT+ CEXT- 68pF VCC VCC 22pF 100pF AGC SHDN GAIN_SET 68pF 6pF 68pF CEXT 0.1F 12 11 10 9 8 7 6 5 4 3 2 1 21 20 19 18 17 16 15 14 13 1 100pF 1.5nH LPF_Q1 1k 0.056F X2 O O/I 40 41 48 42 47 VCC Figure 1. MAX2700 Typical Operating Circuit (1960MHz) ______________________________________________________________________________________ 0.01F 2.2k 680 0.1F 0.1F CTRL 1 MAX2700 43 44 45 46 LO 0.1F GND GND 68pF 680 1k 0.056F 39 IOUT1 22 38 24 1k 680 0.56F 22pF 22pF 0.1F 2.2k 0.1F QIN2680 TO ALL VCC PINS VCC 68pF I-CHANNEL LOAD Q-CHANNEL LOAD Q2 1pF 4.7nH 4.7nH 50 50 0.1F 0.1F DCQ2- 0.56F 0.1F DCQ2+ QOUT2 VCC RFIN+ RFIN- GND IOUT2 DCI2- DCI2+ IIN2- LPF_Q2 25 26 27 28 29 30 31 32 33 34 35 36 0.1F 2.2k LPF_2 37 0.056F 23 CTRL 2 I/Q DETECT 0.1F 0.1F MIX_I MIX_Q 0.056F GND 1k VCC LO INPUT QIN1+ GND IIN1+ 2.2k DCI1+ IIN1- LPF_1 DCI1- QIN1- LNAOUT VCC DCQ1QOUT1 5pF MIXTNK IIN2+ 5.6nH QIN2+ 20 DCQ1+ 68pF 1000pF 10F T-LINE BALUN RF INPUT MAX2700/MAX2701 1.8GHz to 2.5GHz Direct Downconversion Receivers FROM TRANSMITTER DUPLEXER RX ENABLE LNA GAIN SELECT 10pF BPF 1000pF AGC 0.01F 1000pF 0.5pF DOUBLER ENABLE/DISABLE GND GND LNAIN GND X2_EN VCC CEXT+ CEXT- VCC 2pF 68pF 22pF 100pF AGC SHDN GAIN_SET 68pF 1nH 68pF CEXT 0.1F 100pF 2.7nH LPF_Q1 1k 0.056F 21 20 19 18 17 16 14 IIN1- 0.01F 2.2k VCC 680 1k 0.056F 37 22 24 23 CTRL 2 1k 680 22pF 22pF 0.56F 50 50 0.1F 0.1F 0.1F 2.2k 0.1F QIN2680 DCQ2- 0.56F 0.1F DCQ2+ QOUT2 VCC RFIN+ RFIN- GND IOUT2 DCI2- DCI2+ IIN2- LPF_Q2 25 26 27 28 29 30 31 32 33 34 35 36 0.1F 2.2k LPF_2 38 I/Q DETECT 39 0.056F 0.1F 0.1F CTRL1 MAX2701 41 15 13 I/O X2 O 1 40 DCI1+ 42 48 43 44 45 46 47 VCC VCC 12 11 10 9 8 7 6 5 4 3 2 1 LO 0.1F GND GND 68pF MIX _I MIX_Q 680 0.1F 0.1F VCC 0.056F GND 1k QIN1+ DCI1- LO INPUT QIN1- GND IOUT1 DCQ1QOUT1 IIN1+ 2.2k 3pF DCQ1+ LNAOUT VCC MIXTNK IIN2+ QIN2+ 5.6nH TO ALL VCC PINS Q-CHANNEL LOAD Q2 0.5pF 2.7nH 2.7nH I2 VCC 68pF I-CHANNEL LOAD 68pF 1000pF 10F T-LINE BALUN RF INPUT MAX2700/MAX2701 LPF_1 1.8GHz to 2.5GHz Direct Downconversion Receivers Figure 2. MAX2701 Typical Operating Circuit (2400MHz) ______________________________________________________________________________________ 21 VCC VCC Figure 3. MAX2700/MAX2701 EV kit Schematic ______________________________________________________________________________________ J4 VCC R4 J2 0 R3 0 () ARE FOR MAX2701EV KIT ONLY. R10 J5 0 R9 0 R8 J4 0 R7 0 VCC X2EN Z1 4.7nH (0.5pF) R12 0 R11 100 R6 100 R5 100 C45 1000pF R45 0 C9 0.01F Z4 6pF (1nH) R2 100 R1 0 VCC C4 10F VCC J1 + C5 0 (10pF) J20 J19 1 CEXT- 8 7 6 5 4 3 GND GND LNAIN GND X2_EN VCC C11 68pF 9 GAIN_SET C6 1000pF 10 SHDN C7 1000pF 11 AGC C8 100pF 12 VCC C10 68pF C3 1000pF C2 68pF C41 OPEN L7 0 C42 OPEN C48 OPEN C1 0.01F 2 CEXT+ C43 68pF R40 0 VCC C46 68pF C47 OPEN VCC 48 GND C13 (2pF) OPEN L3 13 LO 47 14 LNAOUT C40 22pF J6 C12 22pF R13 1k C15 0.56F GND R38 1k R39 1k 46 GND GND 15 45 C39 0.56F R36 1.1k C14 C16 100pF 0.1F C17 0.1F J7 R14 1k VCC R15 0 MIX_I 16 MIX_Q 44 GND 17 V CC J16 43 U1 C38 0.1F R37 3.6k R44 51 R16 1.1k C36 C37 0.1F 0.1F R35 820 C18 0.1F C19 0.1F R41 51 R18 820 R17 3.6k J8 MAX2700 MAX2701 IIN1+ 18 QIN1+ J17 C35 0.56F R33 1.1k J15 R19 1k C20 0.56F R30 1.1k C33 C34 100pF 0.1F R32 0 VCC R34 1k J9 R20 1k C49 5pF (3pF) IIN119 QIN1- J18 20 DCQ1+ VCC DCI1+ 42 DCI121 DCQ1- 41 22 QOUT1 40 IOUT1 38 VCC 23 MIXTNK 2 1 C32 0.1F R31 3.6k R43 51 R22 1.1k L4 5.6nH C31 0.1F 25 26 27 28 J10 R42 51 R21 3.6k C22 0.1F R28 51 R23 820 C23 0.1F C24 0.56F R26 0 L6 4.7nH (2.7nH) L5 4.7nH (2.7nH) R27 51 C30 0.1F R29 820 C25 68pF C27 22pF C26 29 22pF 30 31 C29 32 0.56F 33 34 35 36 C21 0.1F QIN2- DCQ2+ DCQ2- QOUT2 VCC RFIN+ RFIN- GND IOUT2 DCI2- DCI2+ IIN2- J14 37 IIN2+ 24 QIN2+ 22 39 R24 51 VCC R25 51 4 3 1 C28 1pF 2 (5pF) BALUN/TOKO/B4F 5 J13 J11 J12 MAX2700/MAX2701 1.8GHz to 2.5GHz Direct Downconversion Receivers 1.8GHz to 2.5GHz Direct Downconversion Receivers Variable Gain Amplifier (VGA) The AGC in each baseband channel I/Q is implemented by two variable gain amplifiers with equal gains. Each amplifier provides about 40dB voltage gain at the maximum setting and 30dB of gain control. The first baseband VGA (VGA1) is a cascaded wideband amplifier with differential input and single-ended output. It is optimized for low noise in the high-gain state and has low-power dissipation and sufficient linearity in all gain settings to ensure desired compression performance. The second baseband VGA (VGA2) is a multistage wideband amplifier with differential inputs and a singleended output. In each channel, connect a baseband lowpass filter between VGA1 and VGA2 to provide additional channel selectivity at the adjacent channel. If the VGA amplifiers are driven single ended, the complementary input of VGA should be AC-coupled to ground through a matched source impedance. VGA Offset Correction An internal offset correction feedback amplifier associated with each VGA removes the DC offsets present in the VGAs. Offset correction preserves maximum output compression performance during maximum gain conditions. Each offset correction loop effectively AC-couples the associated VGA signal path. Each VGA1 network yields a highpass corner frequency according to the following: f-3dB (Hz) = 5300 / CDC (nF) (VAGC = 2.0V) f-3dB (Hz) = 700 / CDC (nF) (VAGC = 0.5V) where C DC is the value of the capacitors, in nanofarads, across DCI1+, DCI1- and DCQ1+, DCQ1-. Note that the corner frequency is a function of the gain setting, increasing with increasing gain. Each VGA2 network provides a highpass corner frequency predicted by the following: f-3dB (Hz) = 145 / CDC (F) where CDC is the value of the capacitors, in microfarads, across DCI2+, DCI2- and DCQ2+, DCQ2-. The time constants associated with the offset correction networks limit turn-on time. For applications where the turn-on time is critical, the offset correction networks can be disabled by shorting the corresponding pins together (DCI1+ to DCI1-, DCQ1+ to DCQ1-, DCI2+ to DCI2-, and DCQ2+ to DCQ2-). VGA2 I/Q Gain Mismatch Correction The signal amplitudes at the outputs of the I- and Qchannel VGA2 amplifiers are compared, and any difference is corrected by a differential feedback network associated with the gain control circuitry. Differential amplitude information is extracted by use of a single external capacitor across pins 1 and 2 (CEXT- and CEXT+). The residual difference signal is amplified and fed back to the gain control network, increasing the gain of the channel with the smaller signal while decreasing the gain of the larger signal's channel. This network will correct amplitude mismatches generated by gain mismatches in the previous stages of the receiver (the mixer and VGA1), as well as insertion-loss mismatch. The correction network is capable of decreasing up to 2dB of amplitude mismatch at the inputs of the I/Q VGA2 amplifiers to <0.5dB amplitude mismatch. The gain correction network can be disabled by shorting CEXT- to CEXT+. Bias Circuit Operate the MAX2700/MAX2701 in shutdown mode by connecting SHDN to GND, reducing current consumption to 20A. In shutdown mode, bias current to all the blocks is turned off through a master shutdown circuit. In applications where the LNA is not used, turn off the LNA by connecting the LNAIN to ground. Applications Information LNA Matching The MAX2700/MAX2701 are designed to operate from 1.8GHz to 2.1GHz and 2.1GHz to 2.5GHz, respectively. The LNAs in Figures 1 and 2 are optimized for noise figure and gain centered around 1960MHz and 2400MHz, respectively. Operation at other frequencies in the band requires reoptimization of the input and output matching circuits. The noise figure is sensitive to input matching and losses in the input traces. LNA input matching should be optimized for desired noise figure, gain, and VSWR performance. High Q matching elements should be used at the LNA input. Proper board layout is essential to increase the isolation between LO and the LNA input. This minimizes LO leakage and thus DC offset. I/Q Demodulator Input Matching The RF input match of the I/Q demodulator in Figure 1 and 2 are optimized for 1960MHz and 2400MHz operation, respectively. For operation at a different frequency, the matching circuit should be reoptimized. Singleended operation at the demodulator is achieved through the use of an off-chip balun transformer. In Figure 1, the balun, inductors, and capacitors constitute the matching circuit of the differential I/Q demodulator input. ______________________________________________________________________________________ 23 MAX2700/MAX2701 to operate without degrading its performance over the LO power range of -10dBm to -16dBm. The quadrature generator consists of a wideband polyphase network. Each output of the polyphase filter is buffered, amplified, and then fed to the mixer's differential LO port. MAX2700/MAX2701 1.8GHz to 2.5GHz Direct Downconversion Receivers I/Q Mixer and VGA1 Output Load Requirements To retain acceptable linearity performance, the mixer and VGA1 output loads should be >600. Layout Issues A properly designed PC board is an essential part of any RF/microwave circuit. Use controlled impedance lines on all frequency inputs and outputs. Use lowinductance connections to ground on all ground pins and wherever the components are connected to ground. Place decoupling capacitors close to all VCC connections. For proper chip operation, the metal paddle at the back of the chips must be grounded through via holes in the board. Table 1. MAX2700 LNA S-Parameters High-Gain Mode (VCC = 3.0V) FREQUENCY (GHz) |S11| S11 |S21| S21 |S12| S12 |S22| 1.70 0.542 -84.1 7.09 53.97 0.023 65.36 0.367 S22 37.3 1.75 0.485 -82.9 7.412 41.4 0.025 46.6 0.286 11.4 1.80 0.471 -80.1 7.268 29.5 0.024 34.3 0.216 -23.1 1.85 0.466 -78.8 7.07 19.9 0.0243 29.6 0.185 -68.4 1.90 0.443 -79.2 6.977 10.1 0.025 22.5 0.217 -99.5 1.95 0.441 -79.3 6.635 0.2 0.025 13.8 0.306 -127 2.00 0.436 -84.8 6.115 -7.96 0.024 16.4 0.387 -152.8 2.05 0.324 -88.3 6.119 -13.47 0.0338 15.23 0.408 -165 2.10 0.288 -74.9 5.947 -22.7 0.0383 -4.813 0.476 -176.7 2.15 0.300 -66.7 5.687 -31.1 0.0387 -20.7 0.529 172 2.20 0.320 -63.1 5.31 -40.5 0.0384 -32.8 0.587 162.4 Table 2. MAX2700 LNA S-Parameters Low-Gain Mode (VCC = 3.0V) FREQUENCY (GHz) 1.70 |S11| 0.637 S11 -65.6 |S21| 0.731 S21 52.5 |S12| 0.018 S12 77 |S22| 0.398 S22 41.5 1.75 0.625 -66.3 0.763 42.9 0.018 52 0.328 21.8 1.80 0.622 -67.1 0.772 31.3 0.016 40 0.258 -7 1.85 0.618 -67.3 0.76 21.2 0.014 39 0.191 -45 1.90 0.617 -67 0.758 10.3 0.014 38 0.203 -79 1.95 0.617 -69.2 0.717 -1.1 0.015 34 0.238 -114 2.00 0.616 -70.1 0.678 -10.7 0.014 24 0.332 -141 2.05 0.611 -71.8 0.603 -13 0.022 37.6 0.323 -105 2.10 0.611 -74.5 0.634 -19.5 0.028 13.4 0.36 -170 2.15 0.61 -76.8 0.634 0.27 0.03 -5 0.402 -178 2.20 0.6 -80 0.621 -37 0.033 -14 0.484 174 24 ______________________________________________________________________________________ 1.8GHz to 2.5GHz Direct Downconversion Receivers MAX2700/MAX2701 Table 3. MAX2701 LNA S-Parameters High-Gain Mode (VCC = 3.0V) FREQUENCY (GHz) |S11| S11 |S21| S21 |S12| S12 |S22| S22 2.10 0.303 -110 6.71 -32.9 0.036 -28.1 0.563 -162.5 2.15 0.283 -108 6.35 -42.7 0.04 -42.6 0.61 -178 2.20 0.269 -108 5.98 -49.8 0.042 -55 0.63 168.4 2.25 0.260 -109 5.7 -56.6 0.042 -67.4 0.64 155.4 2.30 0.254 -111 5.37 -63.4 0.043 -80 0.64 144 2.35 0.250 -114.6 5.08 -69.7 0.043 -92 0.632 134.4 2.40 0.241 -120 4.82 -75.7 0.04 -104 0.626 127 2.45 0.230 -129 4.55 -81.5 0.037 -114 0.625 121 2.50 0.218 -139 4.37 -87 0.035 -122 0.635 116 |S22| Table 4. MAX2701 LNA S-Parameters Low-Gain Mode (VCC = 3.0V) 0.589 S11 -102.2 0.684 S21 -36.2 0.025 S12 -10.36 0.46 S22 -157 0.59 -106.12 0.662 -45.2 0.029 -21.6 0.49 -172 2.20 0.591 -111.15 0.644 -52.8 0.032 -35.3 0.51 176.7 2.25 0.596 -117.3 0.63 -60.4 0.033 -50.4 0.54 165 2.30 0.594 -125.2 0.621 -69 0.036 -62.2 0.56 154.5 2.35 0.58 -134 0.608 -77.8 0.037 -76.5 0.58 145.2 2.40 0.548 -144 0.589 -87.8 0.038 -96 0.6 136.5 2.45 0.506 -154.4 0.556 -98 0.035 -109 0.62 129 2.50 0.469 -164 0.519 -107 0.029 -120 0.63 122 FREQUENCY (GHz) |S11| 2.10 2.15 |S21| Table 5. MAX2700 Mixer RFIN+ Input S-Parameters (VCC = 3.0V) |S12| Table 6. MAX2701 Mixer RFIN+ Input S-Parameters (VCC = 3.0V) FREQUENCY (GHz) |S11| S11 FREQUENCY (GHz) |S11| S11 1.70 0.612 -101.2 2.10 0.590 -152 1.75 0.637 -105 2.15 0.600 -161 1.80 0.624 -111.5 2.20 0.604 -171 1.85 0.615 -116 2.25 0.619 180 1.90 0.607 -121 2.30 0.634 171 1.95 0.603 -128 2.35 0.651 162.7 2.00 0.598 -135 2.40 0.663 154 2.45 0.675 147 2.50 0.690 142 ______________________________________________________________________________________ 25 MAX2700/MAX2701 1.8GHz to 2.5GHz Direct Downconversion Receivers Table 7. MAX2700 LO Input S-Parameters (X2_EN = 1, X2_EN = 0) DOUBLER DISABLED X2_EN = VCC FREQUENCY (GHz) |S11| DOUBLER ENABLED X2_EN = 0 S11 FREQUENCY (GHz) |S11| S11 Table 8. MAX2701 LO Input S-Parameters (X2_EN = 1, X2_EN = 0) DOUBLER DISABLED X2_EN = VCC FREQUENCY (GHz) |S11| DOUBLER ENABLED X2_EN = 0 S11 FREQUENCY (GHz) 1.70 0.03 92 850 0.479 -50.6 2.10 0.257 160 1.05 0.358 -53.4 1.75 0.053 116 875 0.474 -50.1 2.15 0.279 164 1.10 0.341 -53 1.80 0.086 123 900 0.466 -51.6 2.20 0.299 167 1.15 0.32 -52 1.85 0.108 127 925 0.456 -52 2.25 0.314 171 1.20 0.299 -52 1.90 0.135 128 950 0.442 -52 2.30 0.33 174 1.25 0.268 -51 1.95 0.161 132 975 0.424 -53 2.35 0.347 178 -- -- -- 2.00 0.186 136 1000 0.403 -53.6 2.40 0.357 -179 -- -- -- -- -- -- 1025 0.384 -54 2.45 0.366 -175 -- -- -- -54 2.50 0.373 -171 -- -- -- -- -- -- 1050 0.365 Chip Information TRANSISTOR COUNT: 3307 26 |S11| S11 ______________________________________________________________________________________ 1.8GHz to 2.5GHz Direct Downconversion Receivers 48L,TQFP.EPS ______________________________________________________________________________________ 27 MAX2700/MAX2701 Package Information MAX2700/MAX2701 1.8GHz to 2.5GHz Direct Downconversion Receivers Package Information (continued) Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 28 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2000 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.