PACKAGE DIMENSIONS
12/11/03
Page 1 of 12
© 2003 Fairchild Semiconductor Corporation
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL: HCPL-0700 HCPL-0701
DUAL CHANNEL: HCPL-0730 HCPL-0731
DESCRIPTION
The HCPL-0700, HCPL-0701, HCPL-0730 and HCPL-0731 optocouplers consist of an AlGaAs LED optically coupled to a high
gain split darlington photodetector housed in a compact 8-pin small outline package. The HCPL-0730 and HCPL-0731 devices
have two channels per package for optimum mounting density.
The split darlington configuration separating the input photodiode and the first stage gain from the output transistor permits lower
output saturation voltage and higher speed operation than possible with conventional darlington phototransistor optocoupler.
The combination of a very low input current of 0.5 mA and a high current transfer ratio of 2000% makes this family particularly
useful for input interface to MOS, CMOS, LSTTL and EIA RS232C, while output compatibility is ensured to CMOS as well as high
f an-out TTL requirements.
FEATURES
Low input current – 0.5 mA
Superior CTR – 2000%
Superior CMR – 10 kV/µs
CTR guaranteed 0-70°C
U.L. Recognized (file# E90700)
VDE 0884 recognized (file# 136616)
– approval pending for HCPL-0730/0731
BSI recognized (file# 8661, 8662)
– HCPL-0700/0701 only
APPLICATIONS
Digital logic ground isolation
Telephone ring detector
EIA-RS-232C line receiver
High common mode noise
line receiver
µP bus isolation
Current loop receiver
TRUTH T ABLE
LED V
O
ON LOW
OFF HIGH
NOTE
All dimensions are in inches (millimeters)
Lead Coplanarity : 0.004 (0.10) MAX
0.202 (5.13)
Pin 1
0.019 (0.48)
0.182 (4.63)
0.021 (0.53)
0.011 (0.28) 0.050 (1.27)
TYP
0.244 (6.19)
0.224 (5.69)
0.143 (3.63)
0.123 (3.13)
0.008 (0.20)
0.003 (0.08)
0.010 (0.25)
0.006 (0.16)
SEATING PLANE
0.164 (4.16)
0.144 (3.66)
1
2
3
4 5
6
7
8
+
_
VF
VCC
VB
VO
GND
HCPL0700 / HCPL0701
N/C
N/C
1
2
3
4 5
6
7
8
+
_
V
F1
V
CC
V
01
V
02
GND
HCPL0730 / HCPL0731
V
F2
_
+
12/11/03
Page 2 of 12
© 2003 Fairchild Semiconductor Corporation
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL: HCPL-0700 HCPL-0701
DUAL CHANNEL: HCPL-0730 HCPL-0731
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25°C unless otherwise specied)
Parameter Symbol Value Units
Storage Temperature T
STG
-40 to +125 °C
Operating Temperature T
OPR
-40 to +85 °C
Reow Temperature Prole (Refer to g. 11)
EMITTER
DC/Average Forward Input Current I
F
(avg) 20 mA
Peak Forward Input Current (50% duty cycle, 1 ms P.W.) I
F
(pk) 40 mA
Peak Transient Input Current - (
1 µs P.W., 300 pps) I
F
(trans) 1.0 A
Reverse Input Voltage V
R
5V
Input Power Dissipation P
D
35 mW
DETECTOR
Average Output Current (Pin 6) I
O
(avg) 60 mA
Emitter-Base Reverse Voltage HCPL-0700/HCPL-0701 V
EBR
0.5 V
Supply Voltage, Output V oltage HCPL-0700/HCPL-0730 V
CC
,
V
O
-0.5 to 7 V
HCPL-0701/HCPL-0731 -0.5 to 18
Output power dissipation P
D
100 mW
ELECTRICAL CHARACTERISTICS
(T
A
= 0 to 70°C Unless otherwise specied)
INDIVIDUAL COMPONENT CHARACTERISTICS
Parameter Test Conditions Symbol Device Min Typ** Max Unit
EMITTER
I
F
= 1.6mA T
A
= 25°CV
F
HCLP-0700/01 1.0 1.25 1.7
V
Input Forward Voltage HCLP-0730/31 1.35
All 1.75
Input Reverse Breakdown
Voltage (T
A
=25°C, I
R
= 10 µA) BV
R
All 5.0
DETECTOR
Logic high output
current
(I
F
= 0 mA, V
O
= V
CC
= 18 V) I
OH
HCPL-0701/31 0.01 100 µA
(I
F
= 0 mA, V
O
= V
CC
= 7 V) HCPL-0700/30 0.01 250
Logic Low Supply
Current
I
F
= 1.6 mA, V
O
= Open, V
CC
= 18V I
CCL
HCPL-0700/01 0.4 1.5 mAI
F1
= I
F2
= 1.6mA V
CC
= 7V HCPL-0730 0.8 3
V
O1
= V
O2
= Open V
CC
= 18 V HCPL-0731 1
Logic High
Supply Current
I
F
= 0 mA, V
O
= Open, V
CC
= 18V I
CCH
HCPL-0700/01 10 µAI
F1
= I
F2
= 0, V
CC
= 7V HCPL-0730 0.001 20
V
O1
= V
O2
= Open, V
CC
= 18 V HCPL-0731 0.01
12/11/03
Page 3 of 12
© 2003 Fairchild Semiconductor Corporation
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL: HCPL-0700 HCPL-0701
DUAL CHANNEL: HCPL-0730 HCPL-0731
** All typicals at T
A
= 25°C
TRANSFER CHARACTERISTICS
(T
A
= 0 to 70°C Unless otherwise specied)
Parameter Test Conditions Symbol Device Min Typ** Max Unit
COUPLED
(I
F
= 0.5 mA, V
O
= 0.4 V, V
CC
= 4.5V)
CTR
HCPL-0701/31 400 5000
%
Current transfer ratio
(Notes 1,2)
I
F
= 1.6 mA,
V
O
= 0.4 V,
V
CC
= 4.5V
HCPL-0700 300 2600
HCPL-0701 500 2600
HCPL-0730 300 5000
HCPL-0731 500 5000
Logic low output voltage
output voltage
(I
F
= 0.5 mA, I
O
= 2 mA, V
CC
= 4.5V)
V
OL
HCPL-0701
HCPL-0731
0.4
V
(I
F
= 1.6 mA, I
O
= 8 mA, V
CC
= 4.5V) 0.4
(I
F
= 5 mA, I
O
= 15 mA, V
CC
= 4.5V) 0.4
(I
F
= 12 mA, I
O
= 24 mA, V
CC
= 4.5V) 0.4
(I
F
= 1.6 mA, I
O
= 4.8 mA, V
CC
= 4.5V) HCPL-0700/0730 0.4
ISOLATION CHARACTERISTICS
(T
A
= 0 to 70°C Unless otherwise specied)
Characteristics Test Conditions Symbol Min Typ** Max Unit
Input-output
insulation leakage current
(Relative humidity = 45%)
(T
A
= 25°C, t = 5 s)
(V
I-O
= 3000 VDC)
(Note 4)
I
I-O
1.0 µA
Withstand insulation test voltage (R
H
50%, T
A
= 25°C)
(Note 4, 5) ( t = 1 min.) V
ISO
2500 V
RMS
Resistance (input to output) (Note 4) (V
I-O
= 500 VDC) R
I-O
10
12
12/11/03
Page 4 of 12
© 2003 Fairchild Semiconductor Corporation
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL: HCPL-0700 HCPL-0701
DUAL CHANNEL: HCPL-0730 HCPL-0731
NOTES
1. Current Transfer Ratio is dened as a ratio of output collector current, I
O
, to the forward LED input current, I
F
, times 100%.
2. Pin 7 open. Use of a resistor between pins 5 and 7 will decrease gain and delay time.
3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dV
CM
/dt on the leading edge of the
common mode pulse signal, V
CM, to assure that the output will remain in a logic high state (i.e., VO>2.0 V). Common mode
transient immunity in logic low level is the maximum tolerable (negative) dVCM/dt on the trailing edge of the common mode
pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO<0.8 V).
4. De vice is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.
5. 2500 VAC RMS for 1 minute duration is equivalent to 3000 VAC RMS for 1 second duration.
** All typicals at TA = 25°C
SWITCHING CHARACTERISTICS (TA = 0 to 70°C unless otherwise specied., VCC = 5 V)
Parameter Test Conditions Symbol Device Min Typ** Max Unit
Propagation delay
time to logic low
(Note 2) (Fig. 14)
(RL = 4.7 k, IF = 0.5 mA)
TPHL
HCPL-0701 30
µs
HCPL-0731 120
TA = 25°CHCPL-0701 3 25
HCPL-0731 5 100
(RL = 270 , IF = 12 mA) HCPL-0701 2
HCPL-0731 3
TA = 25°CHCPL-0701 0.3 1
HCPL-0731 0.4 2
(RL = 2.2 k, IF = 1.6 mA) HCPL-0700 15
HCPL-0730/0731 25
TA = 25°CHCPL-0700 1 10
HCPL-0730/0731 2 20
Propagation delay
time to logic high
(Note 2) (Fig. 14)
(RL = 4.7 k, IF = 0.5 mA)
TPLH
HCPL-0701/31 90
µs
TA = 25°C HCPL-0701/31 12 60
(RL = 270 , IF = 12 mA) HCPL-0701 10
HCPL-0731 15
TA = 25°CHCPL-0701 1.6 7
HCPL-0731 1.6 10
(RL = 2.2 k, IF = 1.6 mA) HCPL-0700/30/31 50
TA = 25°C HCPL-0700/30/31 7 35
Common mode
transient
immunity at
logic high
(IF = 0 mA, |VCM| = 10 VP-P)
TA = 25°C (RL = 2.2 k) (Note 3) (Fig. 15) |CMH| ALL 1,000 10,000 V/µs
Common mode
transient
immunity at
logic low
(IF = 1.6 mA, |VCM| = 10 VP-P,
RL = 2.2 k)
TA = 25°C (Note 3) (Fig. 15) |CML| ALL 1,000 10,000 V/µs
12/11/03
Page 5 of 12
© 2003 Fairchild Semiconductor Corporation
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL: HCPL-0700 HCPL-0701
DUAL CHANNEL: HCPL-0730 HCPL-0731
TYPICAL PERFORMANCE CURVES
Fig. 1 Propagation Delay vs. Temperature
(HCPL-0700, HCPL-0701)
TA - TEMPERATURE (˚C)
TA - TEMPERATURE (˚C)
-60 -40 -20 0 20 40 60 80 100
t
p
- PROPAGATION DELAY (µs)
0
5
10
15
20
25
30
35
t
p
- PROPAGATION DELAY (µs)
Fig. 3 Propagation Delay vs. Temperature
(HCPL-0700, HCPL-0701)
-60 -40 -20 0 20 40 60 80 100
0
1
2
3
4
tPHL
tPLH
IF = 12 mA
VCC = 5 V
RL = 270
1/f = 50 µs
TA - TEMPERATURE (˚C)
Fig. 4 Logic High Output Current vs. Temperature
(HCPL-0700, HCPL-0701)
-40 -20 0 20 40 60 80 100
I
OH
- LOGIC HIGH OUTPUT CURRENT (nA)
0.01
0.1
1
10
100
1000 VCC = VO = 5.5 V
TA - TEMPERATURE (˚C)
t
p
- PROPAGATION DELAY (µs)
Fig. 5 Propagation Delay vs. Input Forward Currrent
(HCPL-0730, HCPL-0731)
012345678910
0
4
8
12
16
20
TA - TEMPERATURE (˚C)
Fig. 2 Propagation Delay vs. Temperature
(HCPL-0700, HCPL-0701)
-60 -40 -20 0 20 40 60 80 100
t
p
- PROPAGATION DELAY (µs)
0
2
4
6
8
10
12
14
16
18
20
tPHL
tPLH
IF = 1.6 mA
VCC = 5 V
RL = 2.2 k
1/f = 50 µs
tPLH
tPHL
Fig. 6 Output Current vs. Input Forward Current
(HCPL-0700, HCPL-0701)
IF - INPUT FORWARD CURRENT (mA)
0.01 0.1 1 10
I
O
- OUTPUT CURRENT (mA)
0.01
0.1
1
10
100
TA = 70˚C
TA = 25˚C
TA = 0˚C
TA = -40˚C
TA = 85˚C
VCC = 5V
VO = 0.4V
TA = 25
VCC = 5V
tPLH
RL = 4.7k
tPHL
RL = 2.2k or 4.7k
tPLH
RL = 2.2k
VCC = 5 V
IF = 0.5 mA
RL = 4.7 k
1/f = 50 µs
12/11/03
Page 6 of 12
© 2003 Fairchild Semiconductor Corporation
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL: HCPL-0700 HCPL-0701
DUAL CHANNEL: HCPL-0730 HCPL-0731
TYPICAL PERFORMANCE CURVES
Fig. 7 Input Forward Current vs. Forward Voltage
(HCPL-0700, HCPL-0701) Fig. 8 Input Forward Current vs. Forward Voltage
(HCPL-0730, HCPL-0731)
VF - FORWARD VOLTAGE (V)
1.1 1.2 1.3 1.4 1.5 1.6
IF - FORWARD CURRENT (mA)
0.001
0.01
0.1
1
10
100
TA = 85˚C
TA = 70˚C
TA = 25˚C
TA = 0˚C
TA = -40˚C
IF - INPUT FORWARD CURRENT (mA)
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
ICCL - LOGIC LOW SUPPLY CURRENT (mA)
ICC (PER CHANNEL) - SUPPLY CURRENT (mA)
0.0
0.1
0.2
0.3
0.4
0.5
VCC = 18V
VCC = 5V
Logic Low Supply Current vs.
Input Forward Current
Fig. 9 Logic Low Supply Current vs. Input Forward Current
(HCPL-0700, HCPL-0701) Fig. 10 Supply Current vs. Input Forward Current
(HCPL-0730, HCPL-0731)
Fig. 11 DC Transfer Characteristics
(HCPL-0700, HCPL-0701) Fig. 12 DC Transfer Characteristics
(HCPL-0730, HCPL-0731)
012
0 0
20
20
40
60
80 IF = 5.0mA
IF = 4.5mA
IF = 4.0mA
IF = 3.5mA
IF = 3.0mA
IF = 2.5mA
VCC
= 5V
TA = 25˚C
IF = 0.5mA
IF = 1.0mA
IF = 1.5mA
IF = 2.0mA
T
A
= 85°C
T
A
= 70°C
T
A
= 25°C
T
A
=
0
°C
T
A
= -40°C
VF - FORWARD VOLTAGE (V)
1.11.00.9 1.2 1.3 1.4 1.5 1.6 1.7
IF - FORWARD CURRENT (mA)
0.001
0.01
0.1
1
10
100
T
A
= 25°C
VCC = 18V
VCC = 7V
1010.1
0.01
0.1
1.0
10
IF - INPUT FORWARD CURRENT (mA)
1mA
3.5mA
3mA
I
F
= 5mA
T
A
= 25°C
V
CC
= 5V
2mA
2.5mA
1.5mA
0.5mA
4mA
I
F
= 4.5mA
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
40
60
80
100
120
140
VO - OUTPUT VOLTAGE (V) VO - OUTPUT VOLTAGE (V)
IO - OUTPUT CURRENT (mA)
IO - OUTPUT CURRENT (mA)
12/11/03
Page 7 of 12
© 2003 Fairchild Semiconductor Corporation
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL: HCPL-0700 HCPL-0701
DUAL CHANNEL: HCPL-0730 HCPL-0731
TYPICAL PERFORMANCE CURVES
Fig. 13 Current Transfer Ratio vs. Input Forward Current
(HCPL-0700, HCPL-0701)
IF - INPUT FORWARD CURRENT (mA)
0.1 1 10
CTR - CURRENT TRANSFER RATIO (%)
0
500
1000
1500
2000
2500
3000
3500
TA = 85˚C
TA = 70˚C
TA = 25˚C
TA = 0˚C
TA = -40˚C
VCC = 5V
VO = 0.4V
Fi
g
. 14 Switchin
g
T
i
m
e
T
est Circuit
T
est Circuit
T
PLH
OL
O
O
5
V
1.
5
V
F
I
1.
5
V
T
PHL
T
4
5
N
o
i
se
1
2
S
hiel
d
8
7
6
+
5
V
O
V
CC
V
01
V
02
G
N
D
V
F1
-
+
F2
V
F
I
+
1
0%
D
U
TY
C
Y
C
L
E
I
/
f < 1
00
µ
S
F
I
M
O
NIT
OR
L
0
.1
µ
F
P
u
l
se
G
enerato
r
tr =
5
n
s
Z = 50
O
O
V
3
I Monitor
F
F
4
I/ < 100
µ
s
tr =
5
n
s
G
enerato
r
P
u
l
se
Z = 50
f
f
O
O
V
F
V
F
V
I
F
2
1
V
O
V
O
V
O
6
5
G
N
D
7
8
O
B
B
L
R
CC
C
+
5
V
0
.1
µ
F
C = 15 pF*
L
Test
C
ircuit for H
C
PL-
0
7
30
and H
C
PL-
0
7
31
Test
C
ircuit for H
C
PL-
0
7
00
and H
C
PL-
0
7
01
m
R
Rm
S
hiel
d
N
o
i
se
-
C = 15 pF*
L
*Includes probe and fixture capacitance
12/11/03
Page 8 of 12
© 2003 Fairchild Semiconductor Corporation
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL: HCPL-0700 HCPL-0701
DUAL CHANNEL: HCPL-0730 HCPL-0731
Fig. 15 Common Mode Immunity T
e
st
C
ircui
t
T
est Circuit
T
Test
C
ircuit for H
C
PL-
0
7
30
and H
C
PL-
0
7
31
Test
C
ircuit for H
C
PL-
0
7
00
and H
C
PL-
0
7
01
Pulse
G
e
n
CM
V
C
V
FF
V
FF
V
B
A
+
-
+
5
V
O
V
-
I
F
3
4
F
V
F
2
1
S
hiel
d
N
o
i
se
6
O
5
G
N
D
7
8
O
B
B
CC
C
L
R
Switch at A : I = 0 mA
F
F
Switch at B : I = 1.6 mA
F
F
t
r
V
O
O
V
OL
5
V
0
V
1
0%
1
0%
90%
CM
V 10 V
CM
V 10 V
C
G
ND
+
-
F2
V
V
F1
-
+
5
V
CC
V
L
V
02
V
R
01
O
V
CM
V
CM
V
A
B
Pulse
G
e
n
F
I
+
-
+
0.1
µ
F
f
t
FF
F
90%
1
3
4
2
S
hiel
d
N
o
i
se
8
6
5
7
0
.1
µ
F
12/11/03
Page 9 of 12
© 2003 Fairchild Semiconductor Corporation
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL: HCPL-0700 HCPL-0701
DUAL CHANNEL: HCPL-0730 HCPL-0731
8-Pin Small Outline
0.024 (0.61)
0.050 (1.27)
0.155 (3.94)
0.275 (6.99)
0.060 (1.52)
12/11/03
Page 10 of 12
© 2003 Fairchild Semiconductor Corporation
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL: HCPL-0700 HCPL-0701
DUAL CHANNEL: HCPL-0730 HCPL-0731
ORDERING INFORMATION
MARKING INFORMATION
Option Order Entry Identifier Description
V V VDE 0884
R1 R1 Tape and reel (500 units per reel)
R1V R1V VDE 0884, Tape and reel (500 units per reel)
R2 R2 Tape and reel (2500 units per reel)
R2V R2V VDE 0884, Tape and reel (2500 units per reel)
1
2
6
43 5
Definitions
1 Fairchild logo
2 Device number
3VDE mark (Note: Only appears on parts ordered with VDE
option See order entry table)
4 One digit year code, e.g., 3
5 Two digit work week ranging from 01 to 53
6 Assembly package code
700
SYYXV
12/11/03
Page 11 of 12
© 2003 Fairchild Semiconductor Corporation
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL: HCPL-0700 HCPL-0701
DUAL CHANNEL: HCPL-0730 HCPL-0731
Carrier T ape Specifications
Reflow Profile
4.0 ± 0.10
Ø1.5 MIN
User Direction of Feed
2.0 ± 0.05
1.75 ± 0.10
5.5 ± 0.05
12.0 ± 0.3
8.0 ± 0.10
0.30 MAX
8.3 ± 0.10
3.50 ± 0.20
0.1 MAX 6.40 ± 0.20
5.20 ± 0.20
Ø1.5 ± 0.1/-0
Ramp up = 210°C/sec Peak reflow temperature: 245°C (package surface temperature)
Time of temperature higher than 183°C for 120180 seconds
One time soldering reflow is recommended
230°C, 1030 s
Time (Minute)
0
300
250
200
150
100
50
00.5 1 1.5 2 2.5 3 3.5 4 4.5
Temperature (°C)
Time above 183°C, 120180 sec
245°C peak
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO
ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME
ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
12/11/03
Page 12 of 12
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