12/11/03
Page 4 of 12
© 2003 Fairchild Semiconductor Corporation
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL: HCPL-0700 HCPL-0701
DUAL CHANNEL: HCPL-0730 HCPL-0731
NOTES
1. Current Transfer Ratio is defined as a ratio of output collector current, I
O
, to the forward LED input current, I
F
, times 100%.
2. Pin 7 open. Use of a resistor between pins 5 and 7 will decrease gain and delay time.
3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dV
CM
/dt on the leading edge of the
common mode pulse signal, V
CM, to assure that the output will remain in a logic high state (i.e., VO>2.0 V). Common mode
transient immunity in logic low level is the maximum tolerable (negative) dVCM/dt on the trailing edge of the common mode
pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO<0.8 V).
4. De vice is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.
5. 2500 VAC RMS for 1 minute duration is equivalent to 3000 VAC RMS for 1 second duration.
** All typicals at TA = 25°C
SWITCHING CHARACTERISTICS (TA = 0 to 70°C unless otherwise specified., VCC = 5 V)
Parameter Test Conditions Symbol Device Min Typ** Max Unit
Propagation delay
time to logic low
(Note 2) (Fig. 14)
(RL = 4.7 kΩ, IF = 0.5 mA)
TPHL
HCPL-0701 30
µs
HCPL-0731 120
TA = 25°CHCPL-0701 3 25
HCPL-0731 5 100
(RL = 270 Ω, IF = 12 mA) HCPL-0701 2
HCPL-0731 3
TA = 25°CHCPL-0701 0.3 1
HCPL-0731 0.4 2
(RL = 2.2 kΩ, IF = 1.6 mA) HCPL-0700 15
HCPL-0730/0731 25
TA = 25°CHCPL-0700 1 10
HCPL-0730/0731 2 20
Propagation delay
time to logic high
(Note 2) (Fig. 14)
(RL = 4.7 kΩ, IF = 0.5 mA)
TPLH
HCPL-0701/31 90
µs
TA = 25°C HCPL-0701/31 12 60
(RL = 270 Ω, IF = 12 mA) HCPL-0701 10
HCPL-0731 15
TA = 25°CHCPL-0701 1.6 7
HCPL-0731 1.6 10
(RL = 2.2 kΩ, IF = 1.6 mA) HCPL-0700/30/31 50
TA = 25°C HCPL-0700/30/31 7 35
Common mode
transient
immunity at
logic high
(IF = 0 mA, |VCM| = 10 VP-P)
TA = 25°C (RL = 2.2 kΩ) (Note 3) (Fig. 15) |CMH| ALL 1,000 10,000 V/µs
Common mode
transient
immunity at
logic low
(IF = 1.6 mA, |VCM| = 10 VP-P,
RL = 2.2 kΩ)
TA = 25°C (Note 3) (Fig. 15) |CML| ALL 1,000 10,000 V/µs