General Description
The MAX9670/MAX9671 dual SCART matrices route
audio and video signals between a set-top box
decoder chip and two external SCART connectors
under I2C control. Operating from a 3.3V supply and a
12V supply, the MAX9670/MAX9671 consume 66mW
during quiescent operation and 300mW during average
operation when driving typical signals into typical
loads. Video input detection, video load detection, and
a 2.8mW standby mode facilitate the design of intelli-
gent, low-power set-top boxes.
The MAX9670/MAX9671 audio section contains a
buffered crosspoint to route audio inputs to audio out-
puts and programmable volume control from -62dB to
0dB in 2dB steps. The DirectDrive®output amplifiers
create a 2VRMS full-scale audio signal biased around
ground, eliminating the need for bulky output capaci-
tors and reducing click-and-pop noise. The zero-cross
detection circuitry also further reduces clicks and pops
by enabling audio sources to switch only during a zero-
crossing. The MAX9671 offers TV left and right audio
inputs.
The MAX9670/MAX9671 video section contains a
buffered crosspoint to route video inputs to video out-
puts. The standard-definition video signals from the set-
top box decoder chip are lowpass filtered to remove
out-of-band artifacts.
The MAX9670/MAX9671 also support slow-switching
and fast-switching signals. An interrupt signal from the
MAX9670/MAX9671 informs the microcontroller when
the system status has changed.
Applications
Set-Top Boxes
TVs
DVD Players
Features
o66mW Quiescent Power Consumption
o2.8mW Standby Mode Consumption
oProgrammable Audio Gain Control of -62dB to
0dB (TV Audio Outputs)
oClickless, Popless, DirectDrive Audio
oVideo Input and Video Load Detection
oVideo Reconstruction Filter with 10MHz Passband
and 52dB Attenuation at 27MHz
o3.3V and 12V Supply Voltages
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
________________________________________________________________
Maxim Integrated Products
1
19-4653; Rev 2; 12/10
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
Ordering Information
PART TEMP RANGE PIN-
PACKAGE
TV R+L
AUDIO
INPUTS
MAX9670CTL+ 0°C to +70°C 40 TQFN-EP* No
MAX9671CTH+ 0°C to +70°C 44 TQFN-EP* Yes
+
Denotes a lead(Pb)-free/RoHS-compliant package.
*
EP = Exposed pad.
DirectDrive is a registered trademark of Maxim Integrated
Products, Inc.
Typical Application Circuit appears at end of data sheet.
I2C INTERFACE
REGISTERS AND
ACTIVITY
MONITOR
VIDEO FILTERS AND
CROSSPOINT
AUDIO CROSSPOINT
WITH DIRECTDRIVE
OUTPUTS, VOLUME
CONTROL
SLOW SWITCHING
FAST SWITCHING
CHARGE PUMP
V12 VAUD
VVID
12V 3.3V3.3V
EP GNDVID
µC
VIDEO
ENCODER
STEREO
AUDIO
DAC
I2C
INTERRUPT
OUTPUT
RGB, Y/C, CVBS
SINGLE-ENDED R/L
STEREO AUDIO
RGB, Y/C, CVBS
CVBS
L/R AUDIO
(MAX9671 ONLY)
SLOW SWITCHING
Y/C, CVBS
RGB, Y/C, CVBS
L/R AUDIO
SLOW SWITCHING
STB CHIP
TV
SCART
VCR
SCART
FAST SWITCHING
FAST SWITCHING
L/R AUDIO
(MAX9670 ONLY)
MAX9670/MAX9671
System Block Diagram
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V12 = 12V, VVID = VAUD = 3.3V, VGNDVID = VEP = 0V, no load, TA= 0°C to +70°C, unless otherwise noted. Typical values are at
TA= +25°C.) (Note 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VVID to GNDVID........................................................-0.3V to +4V
V12 to EP.................................................................-0.3V to +14V
VAUD to EP ...............................................................-0.3V to +4V
EP to GNDVID .......................................................-0.1V to +0.1V
All Video Inputs, VCRIN_FS to GNDVID...................-0.3V to +4V
All Audio Inputs to EP .......................................-1V to (VEP + 1V)
SDA, SCL, DEV_ADDR, INT to GNDVID ..................-0.3V to +4V
TV_SS, VCR_SS to EP .................................-0.3V to (V12 + 0.3V)
Current
All Video/Audio Inputs ...................................................±20mA
C1P, C1N, CPVSS .........................................................±50mA
Output Short-Circuit Current Duration
Video and Fast-Switching Outputs to VVID,
GNDVID.................................................................Continuous
Audio Outputs to VAUD, EP .....................................Continuous
TV_SS, VCR_SS to V12, EP......................................Continuous
Continuous Power Dissipation (TA= +70°C)
40-Pin TQFN-EP (derate 26.3mW/°C above +70°C) ...2105.3mW
44-Pin TQFN-EP (derate 26.3mW/°C above +70°C)...2222.2mW
Junction-to-Case Thermal Resistance (θJC) (Note 1)
40/44-pin TQFN-EP .........................................................1°C/W
Junction-to-Ambient Thermal Resistance (θJA) (Note 1)
40/44-pin TQFN-EP .......................................................27°C/W
Operating Temperature Range...............................0°C to +70°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Video Supply Voltage Range VVID Inferred from video PSRR test at 3V and
3.6V 3 3.3 3.6 V
Audio Supply Voltage Range VAUD Inferred from audio PSRR test at 3V and
3.6V 3 3.3 3.6 V
V12 Supply Voltage Range V12 Inferred from slow-switching levels 11.4 12 12.6 V
Normal operation; all video output
amplifiers are enabled and muted (Note 3) 16 30 mA
Standby mode, slow switch inputs low 1500
VVID Quiescent Supply Current IVID_Q
Shutdown 35 µA
Normal operation (Note 3) 3.2 6 mA
VAUD Quiescent Supply Current IAUD_Q Shutdown 35 µA
Slow-switching output
set to low-level 0.3 100
Normal operation
(Note 3) Slow-switching output
set to medium-level 475
µA
V12 Quiescent Supply Current I12_Q
Shutdown, TA = +25°C 10 µA
VIDEO CHARACTERISTICS
DC-COUPLED INPUT
VVID = 3V 1.15
VVID = 3.135V 1.15Input Voltage Range VIN
RL = 75Ω to
GNDVID or 150Ω
to VVID/2; inferred
from gain test VVID = 3.3V 1.3
VP-P
Input Current IIN VIN = 0.3V, TA = +25°C 1 2 µA
Input Resistance RIN 300 kΩ
Note 1: Package thermal resistance were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
_______________________________________________________________________________________ 3
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
AC-COUPLED INPUT
Sync-Tip Clamp Level VCLP Sync-tip clamp -13 -4 +6 mV
Sync Crush
S ync- ti p cl am p ; p er centag e r ed ucti on i n
sync p ul se ( 0.3V
P - P
) ; g uar anteed b y i np ut
cl am p i ng cur r ent m easur em ent, TA
= + 25° C
2%
Input Clamping Current Sync-tip clamp, VIN = 0.3V, TA = +25°C 1 2 µA
Maximum Input Source
Resistance
Input sync-tip circuit must be stable even if
the source resistance is as high as 300Ω300 Ω
Bias circuit 0.57 0.6 0.63
Input Voltage High-impedance input circuit 0.3 x
VVID
0.36 x
VVID
V
Bias circuit 10
Input Resistance High-impedance input circuit 222 kΩ
DC CHARACTERISTICS
DC Voltage Gain AVGuaranteed by output voltage swing 1.95 2 2.05 V/V
DC Gain Mismatch Among R, G,
and B Outputs
Guaranteed by output voltage swing of
TV_R/C_OUT, TV_G_OUT, and TV_B_OUT;
first input signal set is VCR_R/C_IN,
VCR_G_IN, and VCR_B_IN; second signal
set is ENC_R/C_IN, ENC_G_IN, and
ENC_B_IN
-2 +2 %
Sync-tip clamp (VIN = VCLP) 0.1 0.30 0.51
Output Level Bias circuit 1.3 1.5 1.78 V
Sync-tip clamp, measured at output,
VVID = 3V, VIN = VCLP to (VCLP +1.15V),
RL = 150Ω to VVID/2, RL = 75Ω to GNDVID
2.3
Measured at output, VVID = 3.135V, VIN =
VCLP to (VCLP + 1.15V), RL = 150Ω to
VVID/2, RL = 75Ω to GNDVID
2.243 2.3 2.358
Bias circuit, measured at output, VVID = 3V,
VIN = (VBIAS - 0.575V) to (VBIAS + 0.575V),
RL = 150Ω to VVID/2, RL = 75Ω to GNDVID
2.3
Output Voltage Swing
Measured at output, VVID = 3.135V,
VIN = (VBIAS - 0.575V) to (VBIAS + 0.575V),
RL = 150Ω to VVID/2, RL = 75Ω to GNDVID
2.243 2.3 2.358
VP-P
Output Short-Circuit Current 100 mA
Output Resistance ROUT 0.5 Ω
Output Leakage Current Output disabled (load detection not active) 170 µA
Power-Supply Rejection Ratio 3V ≤ VVID ≤ 3.6V 35 dB
ELECTRICAL CHARACTERISTICS (continued)
(V12 = 12V, VVID = VAUD = 3.3V, VGNDVID = VEP = 0V, no load, TA= 0°C to +70°C, unless otherwise noted. Typical values are at
TA= +25°C.) (Note 2)
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V12 = 12V, VVID = VAUD = 3.3V, VGNDVID = VEP = 0V, no load, TA= 0°C to +70°C, unless otherwise noted. Typical values are at
TA= +25°C.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
AC CHARACTERISTICS
Filter Passband Flatness VOUT = 2VP-P, f = 100kHz to 5.5MHz -1 dB
f = 9.5MHz 3
f = 27MHz 40
Filter Attenuation
VOUT = 2VP-P,
attenuation is
referred to 100kHz f = 54MHz 55
dB
Slew Rate VOUT = 2VP-P, no filter in video path 60 V/µs
Settling Time VOUT = 2VP-P, settle to 0.1% (Note 4) 400 ns
Differential Gain DG 5-step modulated staircase, f = 4.43MHz 0.15 %
Differential Phase DP 5-step modulated staircase, f = 4.43MHz 0.5 Degrees
2T Pulse-to-Bar K Rating
2T = 200ns, bar time is 18µs, the beginning
2.5% and the ending 2.5% of the bar time is
ignored
0.3 K%
2T Pulse Response 2T = 200ns 0.2 K%
2T Bar Response
2T = 200ns, bar time is 18µs, the beginning
2.5% and the ending 2.5% of the bar time is
ignored
0.2 K%
Nonlinearity 5-step staircase 0.1 %
Group Delay Distortion 100kHz ≤ f ≤ 5MHz, outputs are 2VP-P 11 ns
Glitch Impulse Caused by
Charge-Pump Switching Measured at outputs 100 pV-s
Peak Signal to RMS Noise 100kHz ≤ f ≤ 5MHz 70 dB
Power-Supply Rejection Ratio f = 100kHz, 100mVP-P 47 dB
Output Impedance f = 5MHz 2 Ω
Video Crosstalk f = 4.43MHz -80 dB
Reverse Isolation
VCR SCART inputs to encoder inputs,
full-power mode with VCR being looped
through to TV, f = 4.43MHz
92 dB
Pulldown Resistance Enable VCR_R/C_OUT pulldown through
I2C interface 4.4 7.5 Ω
AUDIO CHARACTERISTICS
Voltage Gain VIN = -0.707V to +0.707V 3.95 4 4.05 V/V
Gain Mismatch VIN = -0.707V to +0.707V -1.5 +1.5 %
Flatness f = 20Hz to 20kHz, 0.25VRMS input 0.006 dB
Frequency Bandwidth 0.25VRMS input, frequency where output is
-3dB referenced to 1kHz 230 kHz
Capacitive Drive No sustained oscillations; 75Ω series
resistor on output 300 pF
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS (continued)
(V12 = 12V, VVID = VAUD = 3.3V, VGNDVID = VEP = 0V, no load, TA= 0°C to +70°C, unless otherwise noted. Typical values are at
TA= +25°C.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Input Resistance VIN = -0.707V to +0.707V 10 MΩ
Input Bias Current VIN = 0, TA = +25°C 500 nA
Input Signal Amplitude f = 1kHz, THD < 1% 0.5 VRMS
Output DC Level No input signal, VIN grounded -4 +4 mV
DC 75 100
Power-Supply Rejection Ratio f = 1kHz 90 dB
Signal-to-Noise Ratio f = 1kHz, 0.25VRMS input, 20Hz to 20kHz 96 dB
RL = 3.33kΩ, f = 1kHz, 0.25VRMS input 0.002
Total Harmonic Distortion Plus
Noise RL = 3.33kΩ, f = 1kHz, 0.5VRMS input 0.001 %
Output Impedance f = 1kHz 0.4 Ω
Volume Control Attenuation Step Programmable gain to TV SCART volume
control from -62dB to 0 2dB
Volume Control Minimum
Attenuation 0dB
Volume Control Maximum
Attenuation 62 dB
Mute Suppression f = 1kHz, 0.25VRMS input 110 dB
Audio Crosstalk f = 1kHz, 0.25VRMS input 100 dB
VIDEO-TO-AUDIO INTERACTION
Crosstalk Video input: f = 15kHz, 1VP-P signal
Audio input: f = 15kHz, 0.5VRMS signal 92 dB
CHARGE PUMP
Switching Frequency 570 kHz
FAST SWITCHING
Input Low 0.4 V
Input High Level 1V
Input Current TA = +25°C 10 µA
Output Low Voltage IOL = 0.5mA 0.1 V
Output High Voltage IOH = 0.5mA VVID -
0.1 V
Output Resistance 7Ω
Rise Time 143Ω to GNDVID 12 ns
Fall Time 143Ω to GNDVID 10 ns
SLOW SWITCHING
Input Low Voltage 2V
Input Medium Voltage 4.5 7 V
Input High Voltage 9.5 V
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
6 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V12 = 12V, VVID = VAUD = 3.3V, VGNDVID = VEP = 0V, no load, TA= 0°C to +70°C, unless otherwise noted. Typical values are at
TA= +25°C.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Input Current 70 100 µA
Output Low Voltage 10kΩ to EP, 11.4V ≤ V12 ≤ 12.6V 1.5 V
Output Medium Voltage 10kΩ to EP, 11.4V ≤ V12 ≤ 12.6V 5 6.5 V
Output High Voltage 10kΩ to EP, 11.4V ≤ V12 ≤ 12.6V 10 V
DIGITAL INTERFACE
Input High Voltage VIH 0.7 x
VVID V
Input Low Voltage VIL 0.3 x
VVID V
Input Hysteresis VHYS 0.06 x
VVID V
Input Leakage Current IIH, IIL TA = +25°C -1 +1 µA
Input Capacitance 6pF
Input Current
0.1VVID < SDA < 3.3V,
0.1VVID < SCL < 3.3V
I/O pins of fast-mode devices must not
obstruct the SDA and SCL lines if V+ is
switched off, TA = +25°C
-10 +10 µA
Output Low Voltage SDA VOL ISINK = 6mA 0.4 V
Serial-Clock Frequency fSCL 0 400 kHz
Bus Free Time Between a STOP
and a START Condition tBUF 1.3 µs
Hold Time, (Repeated) START
Condition tHD
,
STA 0.6 µs
Low Period of the SCL Clock tLOW 1.3 µs
High Period of the SCL Clock tHIGH 0.6 µs
Setup Time for a Repeated
START Condition tSU
,
STA 0.6 µs
Data Hold Time tHD
,
DAT (Note 5) 0 0.9 µs
Data Setup Time tHD
,
DAT 100 ns
Fall Time of SDA Transmitting tF
ISINK ≤ 6mA, CB = total capacitance of one
bus line in pF, tR and tF measured between
0.3VVID and 0.7VVID
100 ns
Setup Time for STOP Condition tSU
,
STO 0.6 µs
Pulse Width of Spike Suppressed tSP Input filters on the SDA and SCL inputs
suppress noise spikes less than 50ns 050ns
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
_______________________________________________________________________________________ 7
ELECTRICAL CHARACTERISTICS (continued)
(V12 = 12V, VVID = VAUD = 3.3V, VGNDVID = VEP = 0V, no load, TA= 0°C to +70°C, unless otherwise noted. Typical values are at
TA= +25°C.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
OTHER DIGITAL I/O
DEV_ADDR Low Level 0.3 x
VVID V
DEV_ADDR High Level 0.7 x
VVID V
DEV_ADDR Input Current TA = +25°C -1 +1 µA
Interrupt Output Low Voltage IOL = 0.5mA 0.1 V
Interrupt Output Leakage Current INT high impedance, TA = +25°C 10 µA
Note 2: All devices are 100% production tested at TA= +25°C. Specifications over temperature limits are guaranteed by design.
Note 3: Normal operation mode is full power with input video and load detection active.
Note 4: The settling time is measured from the 50% of the input swing to the 0.1% of the final value of the output.
Note 5: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) to bridge
the undefined region of SCL’s falling edge.
Typical Operating Characteristics
(VVID = VAUD = 3.3V, V12 = 12V, VGNDVID = VEP = 0V, video load is 150Ωto GNDVID, audio load is 10kΩto EP, TA= +25°C, unless
otherwise noted.)
SMALL-SIGNAL GAIN
vs. FREQUENCY
MAX9670 toc01
FREQUENCY (Hz)
GAIN (dB)
100M10M1M
-50
-40
-30
-20
-10
0
10
-60
100k 1G
NO FILTER
VOUT = 100mVP-P
FILTER
SMALL-SIGNAL GAIN FLATNESS
vs. FREQUENCY
MAX9670 toc02
FREQUENCY (Hz)
GAIN (dB)
10M
-7
-6
-5
-4
-3
-2
-1
0
1
2
-8
1M 100M
NO FILTER
VOUT = 100mVP-P
FILTER
LARGE-SIGNAL GAIN
vs. FREQUENCY
MAX9670 toc03
FREQUENCY (Hz)
GAIN (dB)
100M10M1M
-50
-40
-30
-20
-10
0
10
-60
100k 1G
NO FILTER
VOUT = 2VP-P
FILTER
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
8 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(VVID = VAUD = 3.3V, V12 = 12V, VGNDVID = VEP = 0V, video load is 150Ωto GNDVID, audio load is 10kΩto EP, TA= +25°C, unless
otherwise noted.)
LARGE-SIGNAL GAIN FLATNESS
vs. FREQUENCY
MAX9670 toc04
FREQUENCY (Hz)
GAIN (dB)
10M
-7
-6
-5
-4
-3
-2
-1
0
1
2
-8
1M 100M
NO FILTER
FILTER
VIDEO CROSSTALK
vs. FREQUENCY
MAX9670 toc05
FREQUENCY (Hz)
DELAY (ns)
10M1M
-100
-80
-60
-40
-20
0
-120
100k 100M
VOUT = 100mVP-P
ALL HOSTILE
GROUP DELAY
vs. FREQUENCY
MAX9670 toc06
FREQUENCY (Hz)
DELAY (ns)
10M1M
20
40
60
80
100
120
140
0
100k 100M
VOUT = 2VP-P
FILTER
NO FILTER
VIDEO POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY
MAX9670 toc07
FREQUENCY (Hz)
PSRR (dB)
10M1M
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
-50
100k 100M
FILTER
NO FILTER
VIDEO VOLTAGE GAIN
vs. TEMPERATURE
MAX9670 toc08
TEMPERATURE (°C)
VOLTAGE GAIN (V/V)
5025
1.97
1.98
1.99
2.00
2.01
2.02
2.03
2.04
1.96
075
VIDEO OUTPUT VOLTAGE
vs. INPUT VOLTAGE
MAX9670 toc09
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
1.20.80.4
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0
01.6
DIFFERENTIAL GAIN AND PHASE
MAX9670 toc10
DIFFERENTIAL PHASE (deg)
1023
45
0.4
0.6
0.2
0
-0.2
-0.4
-0.6
DIFFERENTIAL GAIN (%)
0.2
0.3
0.1
0
-0.1
-0.2
-0.3
1023
45
DIFFERENTIAL GAIN AND PHASE
MAX9670 toc11
DIFFERENTIAL PHASE (deg)
1023
45
0.4
0.6
0.2
0
-0.2
-0.4
-0.6
DIFFERENTIAL GAIN (%)
0.2
0.3
0.1
0
-0.1
-0.2
-0.3
1023
4580ns/div
2T WITH FILTER
VIDEO INPUT
200mV/div
VIDEO OUTPUT
500mV/div
MAX9670 toc12
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
_______________________________________________________________________________________ 9
Typical Operating Characteristics (continued)
(VVID = VAUD = 3.3V, V12 = 12V, VGNDVID = VEP = 0V, video load is 150Ωto GNDVID, audio load is 10kΩto EP, TA= +25°C, unless
otherwise noted.)
80ns/div
2T NO FILTER
VIDEO INPUT
200mV/div
VIDEO OUTPUT
500mV/div
MAX9670 toc13
1µs/div
12.5T WITH FILTER
VIDEO INPUT
200mV/div
VIDEO OUTPUT
500mV/div
MAX9670 toc14
1µs/div
12.5T NO FILTER
VIDEO INPUT
200mV/div
VIDEO OUTPUT
500mV/div
MAX9670 toc15
10µs/div
NTC7 WITH FILTER
VIDEO INPUT
500mV/div
VIDEO OUTPUT
1V/div
MAX9670 toc16
10µs/div
NTC7 NO FILTER
VIDEO INPUT
500mV/div
VIDEO OUTPUT
1V/div
MAX9670 toc17
2ms/div
FIELD SQUARE WAVE
VIDEO INPUT
500mV/div
VIDEO OUTPUT
1V/div
MAX9670 toc18
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
10 ______________________________________________________________________________________
Typical Operating Characteristics (continued)
(VVID = VAUD = 3.3V, V12 = 12V, VGNDVID = VEP = 0V, video load is 150Ωto GNDVID, audio load is 10kΩto EP, TA= +25°C, unless
otherwise noted.)
VIDEO INPUT SYNC-TIP CLAMP VOLTAGE
vs. TEMPERATURE
MAX9670 toc19
TEMPERATURE (°C)
INPUT CLAMP VOLTAGE (mV)
5025
-5
-4
-3
-2
-1
0
1
2
-6
075
VIDEO INPUT BIAS VOLTAGE
vs. TEMPERATURE
MAX9670 toc20
TEMPERATURE (°C)
INPUT BIAS VOLTAGE (mV)
5025
585
590
595
600
605
610
615
620
580
075
VIDEO INPUT SYNC-TIP CLAMP CURRENT
vs. TEMPERATURE
MAX9670 toc21
TEMPERATURE (°C)
INPUT CLAMP CURRENT (mA)
5025
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
0.6
075
0
2
1
4
3
7
6
5
8
0 1.00.5 1.5 2.0 2.5 3.0 3.5
VIDEO INPUT SYNC-TIP CLAMP CURRENT
vs. INPUT VOLTAGE
MAX9670 toc22
INPUT VOLTAGE (V)
INPUT CLAMP CURRENT (µA)
VIDEO OUTPUT BIAS VOLTAGE
vs. TEMPERATURE
MAX9670 toc23
TEMPERATURE (°C)
OUTPUT BIAS VOLTAGE (V)
5025
1.43
1.44
1.45
1.46
1.47
1.48
1.49
1.50
1.42
075
AUDIO LARGE-SIGNAL GAIN
vs. FREQUENCY
MAX9670 toc24
FREQUENCY (Hz)
GAIN (dB)
100k10k1k100
-15
-10
-5
0
5
10
-20
10 1M
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
______________________________________________________________________________________
11
0
10
5
20
15
25
30
0255075
VVID QUIESCENT SUPPLY CURRENT
vs. TEMPERATURE
MAX9670 toc28
TEMPERATURE (°C)
CURRENT (mA)
0
1
3
2
4
5
VAUD QUIESCENT SUPPLY CURRENT
vs. TEMPERATURE
MAX9670 toc29
TEMPERATURE (°C)
CURRENT (mA)
0255075
V12 QUIESCENT SUPPLY CURRENT
vs. TEMPERATURE
MAX9670 toc30
TEMPERATURE (°C)
CURRENT (nA)
5025
100
200
300
400
500
600
700
800
0
075
Typical Operating Characteristics (continued)
(VVID = VAUD = 3.3V, V12 = 12V, VGNDVID = VEP = 0V, video load is 150Ωto GNDVID, audio load is 10kΩto EP, TA= +25°C, unless
otherwise noted.)
AUDIO CROSSTALK
vs. FREQUENCY
MAX9670 toc25
FREQUENCY (Hz)
CROSSTALK (dB)
10k1k100
-100
-80
-60
-40
-20
0
-120
10 100k
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
MAX9670 toc26
FREQUENCY (Hz)
THD+N (%)
10k1k100
0.001
0.01
0.1
0.0001
10 100k
TVIN TO
VCROUT
VIN = 0.25VRMS
TVIN TO
TVOUT
VAUD POWER-SUPPLY REJECTION RATIO
(INPUT REFERRED) vs. FREQUENCY
MAX9670 toc27
FREQUENCY (Hz)
PSRR (dB)
10k1k100
-100
-80
-60
-40
-20
0
-120
10 100k
VAUD = 3.3V + 100mVP-P
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
12 ______________________________________________________________________________________
Pin Description
PIN
MAX9670 MAX9671 NAME FUNCTION
1 1 SDA Bidirectional I2C Data I/O. Output is open drain and tolerates up to 3.6V.
2 2 SCL I2C Clock Input
3 3 DEV_ADDR Device Address Set Input. Connect to GNDVID, VVID, SDA or SCL. See Table 3.
44 INT
Interrupt Output. This is an open-drain output that pulls down to GNDVID to
indicate a change in the VCR slow switching or fast switching input, the activity
status of the composite video inputs, or the load status of the composite video
outputs.
55 V
AUD Audio Supply. Connect to a 3.3V supply. Bypass with a 10µF aluminum
electrolytic capacitor and a 0.47µF ceramic capacitor to EP.
6 6 C1P Charge-Pump Flying Capacitor Positive Terminal. Connect a 0.47µF capacitor
from C1P to C1N.
7 7 C1N Charge-Pump Flying Capacitor Negative Terminal. Connect a 0.47µF capacitor
from C1P to C1N.
8 8 CPVSS C har g e- P um p N eg ati ve P ow er S up p l y. Byp ass w i th a 1µF cer am i c cap aci tor to E P .
9 9 ENC_INL Encoder Left-Channel Audio Input
10 10 ENC_INR Encoder Right-Channel Audio Input
— 11 TV_INL TV SCART Left-Channel Audio Input
— 12 TV_INR TV SCART Right-Channel Audio Input
11 13 VCR_INL VCR SCART Left-Channel Audio Input
12 14 VCR_INR VCR SCART Right-Channel Audio Input
13 15 TV_OUTL TV SCART Left-Channel Audio Output
14 16 VCR_OUTL VCR SCART Left-Channel Audio Output
15 17 VCR_OUTR VCR SCART Right-Channel Audio Output
16 18 TV_OUTR TV SCART Right-Channel Audio Output
17 19 TV_SS TV SCART Bidirectional Slow-Switch Signal
18 20 V12 +12V Supply for the Slow Switching Circuit. Bypass with a 10µF + 0.47µF ceramic
capacitor to EP.
19 21 VCR_SS VCR SCART Bidirectional Slow-Switch Signal
20 22 TVOUT_FS TV SCART Fast-Switching Logic Output
— 23, 44 N.C. No Connection. Leave unconnected.
21 24 VCRIN_FS VCR SCART Fast-Switching Logic Input
22 25 ENC_B_IN Encoder Blue Video Input
23 26 ENC_G_IN Encoder Green Video Input
24 27 VCR_B_IN VCR SCART Blue Video Input
25 28 VCR_G_IN VCR SCART Green Video Input
26 29 TV_B_OUT TV SCART Blue Video Output
27 30 TV_G_OUT TV SCART Green Video Output
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
______________________________________________________________________________________ 13
Detailed Description
The MAX9670/MAX9671 represents Maxim’s third gen-
eration of SCART audio/video (A/V) switches. Under I2C
control, these devices route audio, video, and control
information between the set-top box decoder chip and
two SCART connectors. The audio signals are left audio
and right audio. The video signals are composite video
with blanking and sync (CVBS) and component video
(red, green, blue). S-video (Y/C) can be transported
across the SCART interface if CVBS is reassigned to
luma (Y) and red is reassigned to chroma (C). Support
for S-video is optional. The slow-switch signal and the
fast-switch signal carry control information. The slow-
switch signal is a 12V, three-level signal that indicates
whether the picture aspect ratio is 4:3 or 16:9 or causes
the television to use an internal A/V source such as an
antenna. The fast-switch signal indicates whether the
television should display CVBS or RGB signals.
CVBS, left audio, and right audio are full duplex. All the
other signals are half duplex. Therefore, one device on
the link must be designated as the transmitter, and the
other device must be designated as the receiver.
The low power consumption and the advanced monitor-
ing functions of the MAX9670/MAX9671 enable the cre-
ation of lower power set-top boxes, televisions, and
DVD players. Unlike competing SCART ICs, the audio
and video circuits of the MAX9670/MAX9671 operate
entirely from 3.3V rather than from 5V and 12V. Only the
slow-switch circuit of the MAX9670/MAX9671 requires a
12V supply. The MAX9670/MAX9671 also have circuits
that detect activity on the CVBS inputs, loads on the
CVBS outputs, and the level of the slow-switch signals.
The INT signal informs the microcontroller if there are
any changes so that the microcontroller can intelli-
gently decide whether to power up or power down
the equipment.
In addition, the MAX9670/MAX9671 have DirectDrive
audio circuitry to eliminate click-and-pop noise. With
DirectDrive, the DC bias of the audio line outputs is
always at ground, no matter whether the MAX9670/
MAX9671 are being powered up or powered down.
Conventional audio line output drivers that operate from a
single supply require series AC-coupling capacitors.
During power-up, the DC bias on the AC-coupling capac-
itor moves from ground to a positive voltage, and during
power-down, the opposite occurs. The changing DC bias
usually causes an audible transient.
Pin Description (continued)
PIN
MAX9670 MAX9671 NAME FUNCTION
28 31 GNDVID Video Ground
29 32 VCR_R/C_IN VCR SCART Red/Chroma Video Input
30 33 VVID
Video and Digital Supply. Connect to a 3.3V supply. Bypass with parallel 1µF and
0.1µF ceramic capacitors to GNDVID. VVID also serves as a digital supply for the
I2C interface.
31 34 ENC_C_IN Encoder Chroma Video Input
32 35 ENC_R/C_IN Encoder Red/Chroma Video Input
33 36 TV_R/C_OUT TV SCART Red/Chroma Video Output
34 37 VCR_R/C_OUT VCR SCART Red/Chroma Video Output
35 38 VCR_Y/CVBS_OUT VCR SCART Luma/Composite Video Output
36 39 TV_Y/CVBS_OUT TV SCART Luma/Composite Video Output
37 40 VCR_Y/CVBS_IN VCR SCART Luma/Composite Video Input
38 41 TV_Y/CVBS_IN TV SCART Luma/Composite Video Input
39 42 ENC_Y_IN Encoder Luma Video Input
40 43 ENC_Y/CVBS_IN Encoder Luma/Composite Video Input
—— EP
Exposed Pad. The exposed pad is the internal ground for the audio amplifiers and
charge pump. A low-impedance connection between ground and EP is required
for proper isolation.
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
14 ______________________________________________________________________________________
Audio Section
The MAX9670 audio circuit is essentially a stereo,
2-by-2, nonblocking, audio crosspoint with output dri-
vers. The encoder (stereo audio DAC) and the VCR are
the two input sources, and the two outputs go to the TV
SCART connector and the VCR SCART connector. See
Figure 1. The MAX9671 audio circuit is similar to that of
the MAX9670 except that it is a stereo, 3-by-2,
nonblocking audio crosspoint with TV as the third input
source.
The integrated charge pump inverts the +3.3V supply
to create a -3.3V supply. The audio circuit operates
from bipolar supplies so the audio signal is always
biased to ground.
ENC_INL
VCR_INL
x4
ZCD
(0.5VRMS FULL-SCALE INPUT) (2VRMS FULL-SCALE OUTPUT)
(2VRMS FULL-SCALE OUTPUT)
TV_OUTL
TV_OUTR
MUTE
VAUD
C1P
EP
C1N
CPVSS
CHARGE
PUMP
SCL
SDA REGISTER
CONTROL
DEV_ADDR
MUTE
MUTE
MUTE
MUTE
VCR_OUTL
VCR_OUTR
*TV_INL
ENC_INR
VCR_INR
*TV_INR
x4
x4
VOLUME
CONTROL
0dB TO -62dB
VOLUME
CONTROL
0dB TO -62dB
*MAX9671 ONLY.
MUTE
MAX9670/MAX9671
x4
Figure 1. MAX9670/MAX9671 Audio Section Functional Diagram
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
______________________________________________________________________________________ 15
Clickless Switching
The TV audio channel incorporates a zero-crossing
detect (ZCD) circuit that minimizes click noise due to
abrupt signal level changes that occur when switching
between audio signals at an arbitrary moment.
To implement the zero-crossing function when switch-
ing audio signals, set the ZCD bit high (Audio Control
register 00h, bit 6). Then set the mute bit high (Audio
Control register 00h, bit 0). Next, wait for a sufficient
period of time for the audio signal to cross zero. This
period is a function of the audio signal path’s low-fre-
quency 3dB corner (fL3dB). Thus, if fL3dB = 20Hz, the
time period to wait for a zero-crossing detect is 1/20Hz
or 50ms.
After the wait period, select a new audio source for the
TV audio channel by writing to bits 1 and 0 of TV Audio
Control register (01h). Finally, clear mute (Audio Control
register, 00h, bit 0), but leave ZCD (Audio Control reg-
ister 00h, bit 6) high. The MAX9670/MAX9671 switches
the signal out of mute at the next zero crossing. See
Tables 12 and 13.
Audio Outputs
The MAX9670/MAX9671 audio output amplifiers feature
Maxim’s DirectDrive architecture, thereby eliminating
the need for output-coupling capacitors required by
conventional single-supply audio line drivers. An inter-
nal charge pump inverts the positive supply (VAUD),
creating a negative supply (CPVSS). The audio output
amplifiers operate from these bipolar supplies with their
outputs biased about audio ground (Figure 2). The ben-
efit of this audio ground bias is that the amplifier out-
puts do not have a DC component. The DC-blocking
capacitors required with conventional audio line drivers
are unnecessary, conserving board space, reducing
system cost, and improving frequency response.
Conventional single-supply audio line drivers have their
outputs biased about a nominal DC voltage (typically
half the supply) for maximum dynamic range. Large
coupling capacitors are needed to block this DC bias.
Clicks and pops are created when the coupling capaci-
tors are charged during power-up and discharged dur-
ing power-down.
The MAX9670/MAX9671 features a low-noise charge
pump that requires only two small ceramic capacitors.
The 580kHz switching frequency is well beyond the
audio range and does not interfere with audio signals.
The switch drivers feature a controlled switching speed
that minimizes noise generated by turn-on and turn-off
transients.
The SCART standard specifies 2VRMS as the full-scale
for audio signals. As the audio circuits process
0.5VRMS full-scale audio signals internal to the
MAX9670/MAX9671, the gain-of-4 output amplifiers
restore the audio signals to a full-scale of 2VRMS.
To select which audio input source is routed to the TV
SCART connector, write to bits 1 and 0 of the TV Audio
Control register (01h). To select which audio input
source is routed to the VCR SCART connector, write to
bits 3 and 2 of the TV Audio Control register (01h). The
power-on default is for the TV and VCR audio outputs to
be muted (the inputs of the output amplifiers are con-
nected to audio ground). See Tables 10 and 13.
Volume Control
Volume control is programmable from -62dB to 0dB in
2dB steps through I2C interface. The block consists of
a resistive ladder network to generate 31 2dB volume
control steps, a unity gain buffer to isolate the input
from the resistive ladder, switches (MPLx and MNLx)
that select 1 of 32 nodes on the resistive ladder, and
logic to decode the the I2C volume control value. See
Table 12.
+VDD
-VDD
GND VOUT
CONVENTIONAL DRIVER-BIASING SCHEME
DirectDrive BIASING SCHEME
VDD/2
VDD
VDD
GND
2VDD
Figure 2. Conventional Driver Output Waveform vs. MAX9670/
MAX9671 Output Waveform.
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
16 ______________________________________________________________________________________
Video Section
The video circuit routes different video formats between
the set-top box decoder, the TV SCART connector, and
the VCR SCART connector. It also routes slow-switch
and fast-switch control information. See Figure 3.
MAX9670/MAX9671
AV = 2V/V
TV_Y/CVBS_IN
MUTE
TV_Y/CVBS_OUT
LOAD SENSE
AV = 2V/V VCR_Y/CVBS_OUT
LOAD SENSE
CLAMP
VCR_Y/CVBS_IN CLAMP
ENC_Y/CVBS_IN CLAMP
ENC_Y_IN CLAMP
ACTIVITY DETECT
ACTIVITY DETECT
ACTIVITY DETECT
ACTIVITY DETECT
LPF
LPF
AV = 2V/V
MUTE
TV_R/C_OUT
AV = 2V/V VCR_R/C_OUT
VCR_R/C_IN CLAMP/BIAS
ENC_R/C_IN CLAMP/BIAS
ENC_C_IN CLAMP/BIAS
LPF
LPF
AV = 2V/V
MUTE
TV_G_OUT
VCR_G_IN CLAMP
ENC_G_IN CLAMP LPF
AV = 2V/V
MUTE
TV_B_OUT
VCR_B_IN CLAMP
ENC_B_IN CLAMP LPF
AV = 1V/V
VCRIN_FS
0.7V
VVID
GNDVID
TVOUT_FS
TO I2C
AV = 1V/V
V12
+6V
EP
TV_SS
x1
TO I2C
AV = 1V/V
V12
+6V
EP
VCR_SS
x1
Figure 3. MAX9670/MAX9671 Video Section Function Diagram
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
______________________________________________________________________________________ 17
Video Inputs
Whether the incoming video signal is AC-coupled or
DC-coupled into the MAX9670/MAX9671 depends
upon the origin, format, and voltage range of the video
signal. Table 1 below shows the recommended con-
nections. Always AC-couple an external video signal
through a 0.1µF capacitor because its voltage is not
well defined (see the
Typical Application Circuit
). For
example, the video transmitter circuit might have a dif-
ferent ground than the video receiver, thereby level
shifting the DC bias. 60Hz power line hum might cause
the video signal to change DC bias slowly.
Internal video signals that are between 0 and 1V can be
DC-coupled. Most video DACs generate video signals
between 0 and 1V because the video DAC sources cur-
rent into a ground-referenced resistor. For the minority
of video DACs that generate video signals between
2.3V and 3.3V because the video DAC sinks current
from a VVID-referenced resistor, AC-couple the video
signal to the MAX9670/MAX9671.
The MAX9670/MAX9671 restore the DC level of incom-
ing, AC-coupled video signals with either transparent
sync-tip clamps or bias circuits. When using an AC-
coupled input, the transparent sync-tip clamp automati-
cally clamps the input signal minimum to ground,
preventing it from going lower. A small current of 1µA
pulls down on the input to prevent an AC-coupled sig-
nal from drifting outside the input range of the part. Use
sync-tip clamps with CVBS, RGB, and luma signals.
The transparent sync-tip clamp is transparent when the
incoming video signal is DC-coupled and at or above
ground. Under such conditions, the clamp never acti-
vates. Therefore, the outputs of video DACs that gener-
ate signals between 0 and 1V can be directly
connected to the MAX9670/MAX9671 inputs.
The bias circuit accepts AC-coupled chroma, which is
a subcarrier with the color information modulated onto
it. The bias voltage of the bias circuits is around
600mV.
ENC_R/C_IN and VCR_R/C_IN can receive either a red
video signal or a chroma video signal. Set the input con-
figuration by writing to bits 7 and 3 of the VCR Video
Input Control register (08h). See Tables 10 and 16.
The MAX9670/MAX9671 also have video input detec-
tion. When activated, activity detect circuits check if
sync is present on incoming CVBS and luma (Y) sig-
nals. If so, then there is a valid video signal. Read bits
0, 2, 4, and 5 of the Video Activity Status register (0Fh)
to determine the status of the CVBS and luma (Y)
inputs. See Table 21.
In high-impedance mode, the inputs to the MAX9670/
MAX9671 do not distort the video signal in case the out-
puts of the video DAC are also connected to another
video circuit such as a high-definition video filter amplifi-
er. See the
SCART Set-Top Box with Analog HD Outputs
section. The inputs in high-impedance mode are biased
at VVID/3, which is sufficiently above ground so that the
ESD diodes never forward biases as the video signal
changes. The input resistance is 222kΩ, which presents
negligible loading on the video current DAC.
Video Reconstruction Filter
The video DAC outputs of the set-top box decoder chip
need to be lowpass-filtered to reject the out-of-band
noise. The MAX9670/MAX9671 integrate sixth-order,
Butterworth filters. The filter passband (±1dB) is typical-
ly 5.5MHz, and the attenuation at 27MHz is 52dB. The
filters are suited for standard-definition video.
Video Outputs
The video output amplifiers can both source and sink
load current, allowing output loads to be DC- or AC-
coupled. The amplifier output stage needs around
300mV of headroom from either supply rail. For video
signals with a sync pulse, the sync tip is typically at
300mV, as shown in Figure 4. For a chroma signal, the
blank level is typically at 1.5V, as shown in Figure 5.
If the supply voltage is greater than 3.135V (5% below
a 3.3V supply), each amplifier can drive two DC-cou-
pled video loads to ground. If the supply is less than
3.135V, each amplifier can drive only one DC-coupled
or AC-coupled video load.
The SCART standard allows for video signals to have a
superimposed DC component within 0 and 2V.
Therefore, most video signals are DC-coupled at the
output. In the unlikely event that the video signal needs
to be AC-coupled, the coupling capacitors should be
220µF or greater to keep the highpass filter formed by
the 37.5Ωequivalent resistance of the video transmis-
sion line to a corner frequency of 4.8Hz or below to keep
it well below the 25Hz frame rate of the PAL standard.
The CVBS outputs have load sense circuits. If enabled,
each load sense circuit checks for a load eight times
per second by connecting an internal 15kΩpullup
resistor to the output for 1ms. If the output is pulled up,
no load is present. If the output stays low, a load is con-
nected. Read bits 1 and 3 of the Video Activity Status
register (0Fh) to determine load status. See Table 21.
The selection of video sources that are sent to the TV
SCART connector are controlled by bits 0 to 4 of the TV
Video Input Control register (06h) while the selection of
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
18 ______________________________________________________________________________________
video sources that are sent to the VCR SCART connec-
tor are controlled by bits 0 to 2 of the VCR Video Input
Control register (08h). See Tables 10, 14, and 16. The
video outputs can be enabled or disabled by bits 2
through 7 of the Output Enable register (0Dh). See
Table 18.
Slow Switching
The MAX9670/MAX9671 support the IEC 933-1,
Amendment 1, three-level slow switching that selects
the aspect ratio for the display (TV). Under I2C control,
the MAX9670/MAX9671 set the slow-switching output
voltage level. Table 2 shows the valid input levels of the
slow-switching signal and the corresponding operating
modes of the display device.
Two bidirectional ports are available for slow-switching
signals for the TV and VCR. The slow-switching input
status is continuously read and stored in the Status reg-
ister (0Eh). The slow-switching outputs can be set to a
logic level or high impedance by writing to the TV Video
Output Control register (07h) and the VCR Video Output
Control register (09h). When enabled, INT becomes
active low if the voltage level changes on TV_SS or
VCR_SS. See Tables 10, 15, 17, and 20.
Fast Switching
The fast-switching signal was originally used to switch
between CVBS and RGB signals on a pixel-by-pixel
basis so that on-screen display (OSD) information
could be inserted. Since modern set-top box decoder
chips have integrated OSD circuitry, there is no need to
create OSD information using the older technique. Now,
the fast-switching signal is just used to switch between
CVBS and RGB signal sources.
Set the source of the fast-switching signal by writing to
bits 4 and 3 of the TV Video Output Control register
(07h). The fast-switching signal to the TV SCART con-
nector can be enabled or disabled by bit 1 of the Output
Enable register (0Dh). See Tables 10, 15, and 18.
I
2
C Serial Interface
The MAX9670/MAX9671 feature an I2C/SMBus™-com-
patible, 2-wire serial interface consisting of a serial-data
line (SDA) and a serial-clock line (SCL). SDA and SCL
facilitate communication between the MAX9670/
MAX9671 and the master at clock rates up to 400kHz.
Figure 6 shows the 2-wire interface timing diagram. The
master generates SCL and initiates data transfer on the
bus. A master device writes data to the MAX9670/
MAX9671 by transmitting a START (S) condition, the
proper slave address with the R/Wbit set to 0, followed
by the register address and then the data word. Each
transmit sequence is framed by a START and a STOP
(P) condition. Each word transmitted to the
MAX9670/MAX9671 is 8 bits long and is followed by an
acknowledge clock pulse. A master reads from the
MAX9670/MAX9671 by transmitting the slave address
with the R/Wbit set to 0, the register address of the reg-
ister to be read, a REPEATED START (Sr) condition, the
slave address with the R/Wbit set to 1, followed by a
series of SCL pulses. The MAX9670/MAX9671 transmit
data on SDA in sync with the master-generated SCL
pulses. The master acknowledges receipt of each byte
of data. Each read sequence is framed by a START or
MAX9670 fig04
20µs/div
INPUT
500mV/div
OUTPUT
500mV/div
Figure 4. MAX9670/MAX9671 Video Output with CVBS Signal,
Multiburst Video Test Signal Shown
MAX9670 fig05
10µs/div
INPUT
200mV/div
OUTPUT
200mV/div
Figure 5. MAX9670/MAX9671 Video Output with Chroma (C)
Signal, Multiburst Video Test Signal Shown
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
______________________________________________________________________________________ 19
REPEATED START condition, an acknowledge or a not
acknowledge, and a STOP condition. SDA operates as
both an input and an open-drain output. A pullup resis-
tor, typically greater than 500Ω, is required on the SDA
bus. SCL operates as only an input. A pullup resistor,
typically greater than 500Ω, is required on SCL if there
are multiple masters on the bus, or if the master in a
single-master system has an open-drain SCL output.
Series resistors in line with SDA and SCL are optional.
Series resistors protect the digital inputs of the
MAX9670/MAX9671 from high-voltage spikes on the
bus lines, and minimize crosstalk and undershoot of the
bus signals.
Bit Transfer
One data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period
of the SCL pulse. Changes in SDA while SCL is high
are control signals (see the
START and STOP
Conditions
section). SDA and SCL idle high when the
I2C bus is not busy.
START and STOP Conditions
SDA and SCL idle high when the bus is not in use. A
master initiates communication by issuing a START
condition. A START condition is a high-to-low transition
on SDA with SCL high. A STOP condition is a low-to-
high transition on SDA while SCL is high (Figure 7). A
START condition from the master signals the beginning
of a transmission to the MAX9670/MAX9671. The mas-
ter terminates transmission, and frees the bus, by issu-
ing a STOP condition. The bus remains active if a
REPEATED START condition is generated instead of a
STOP condition.
Early STOP Conditions
The MAX9670/MAX9671 recognize a STOP condition at
any point during data transmission except if the STOP
condition occurs in the same high pulse as a START
condition. For proper operation, do not send a STOP
condition during the same SCL high pulse as the
START condition.
Slave Address
The slave address is defined as the 7 most significant
bits (MSBs) followed by the read/write (R/W) bit. Set the
R/Wbit to 1 to configure the MAX9670/MAX9671 to
read mode. Set the R/Wbit to 0 to configure the
MAX9670/MAX9671 to write mode. The slave address
is always the first byte of information sent to the
MAX9670/MAX9671 after a START or a REPEATED
START condition. The MAX9670/MAX9671 slave
address is configurable with DEV_ADDR. Table 3
shows the possible slave addresses for the
MAX9670/MAX9671.
SCL
SDA
START
CONDITION
STOP
CONDITION
REPEATED
START CONDITION
START
CONDITION
tHD, STA
tSU, STA tHD, STA tSP
tBUF
tSU, STO
tLOW
tSU, DAT
tHD, DAT
tHIGH
tRtF
Figure 6. I
2
C Serial-Interface Timing Diagram
SCL
SDA
SSrP
Figure 7. START, STOP, and REPEATED START Conditions