1. General description
74HC423; 74HCT423 are high-speed Si-gate CMOS devices that are pin compatible with
low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC423; 74HCT423 dual retriggerable monostable multivibrator with reset has two
methods of output pulse width control.
1. The minimum pulse width is essentially determined by the selection of an external
resistor (REXT) and capacitor (CEXT), see Section 12.1.
2. Once triggered, the basic output pulse width may be extended by retriggering the
gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By
repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made
as long as desired. When nRD is LOW, it forces the nQ output LOW, the nQ output
HIGH and also inhibits the triggering. Figure 10 and Figure 11 illustrate pulse control
by reset.
The nA and nB inputs’ Schmitt trigger action makes them highly tolerant to slower input
rise and fall times.
The 74HC423; 74HCT423 are identical to the 74HC123; 74HCT123 except that they
cannot be triggered via the reset input.
2. Features
nDC triggered from active HIGH or active LOW inputs
nRetriggerable for very long pulses up to 100% duty factor
nDirect reset terminates output pulse
nSchmitt-trigger action on all inputs except for the reset input
nComplies with JEDEC standard no. 7A
nESD protection:
uHBM JESD22-A114E exceeds 2000 V
uMM JESD22-A115-A exceeds 200 V
nSpecified from −40 °Cto+85°C and from −40 °C to +125 °C
74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
Rev. 03 — 24 July 2008 Product data sheet
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 2 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
3. Ordering information
4. Functional diagram
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC423N −40 °C to +125 °C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
74HCT423N
74HC423D −40 °C to +125 °C SO16 plastic small outline package; 16 leads;
body width 3.9 mm SOT109-1
74HCT423D
74HC423BQ −40 °C to +125 °C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin
quad flat package; no leads; 16 terminals;
body 2.5 ×3.5 ×0.85 mm
SOT763-1
74HCT423BQ
74HCT423DB −40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm SOT338-1
74HCT423PW −40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm SOT403-1
Fig 1. Functional Diagram
1Q
Q
S13
1REXT/CEXT
15
1CEXT
14
1Q
Q4
9
001aah796
2A
1
1A
10
2B
2
1B
3
1RD
T
RD
Q
S
2REXT/CEXT
7
2CEXT
6
2Q
5
Q2Q
12
T
11
2RD
RD
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 3 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
Fig 2. Logic symbol Fig 3. IEC Logic symbol
1Q
Q
S
2REXT/CEXT
13
7
1REXT/CEXT 15
2CEXT 6
1CEXT 14
2Q 5
1Q
Q4
2Q 12
9
001aah797
2A
11A
10 2B
21B
T
31RD
11 2RD
RD
001aah798
CX
&
6
5
12
RCX
R
7
9
11
10
CX
&
14
13
4
RCX
R
15
1
3
2
Fig 4. Logic diagram
001aah799
REXT/CEXT
VCC
VCC VCC
RD
A
B
CL
CL CL
CL CL
Q
Q
R
R
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 4 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
5. Pinning information
5.1 Pinning
5.2 Pin description
(1) The die substrate is attached to this pad using a
conductive die attach material. It cannot be used as
supply pin or input
Fig 5. Pin configuration DIP16, SO16 and (T)SSOP16 Fig 6. Pin configuration DHVQFN16
74HC423
74HCT423
1A VCC
1B 1REXT/CEXT
1RD 1CEXT
1Q 1Q
2Q 2Q
2CEXT 2RD
2REXT/CEXT 2B
GND 2A
001aah785
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
001aah784
74HC423
74HCT423
2REXT/CEXT 2B
2CEXT 2RD
2Q 2Q
1Q 1Q
1RD 1CEXT
1B 1REXT/CEXT
GND
2A
1A
VCC
Transparent top view
7 10
6 11
5 12
4 13
3 14
2 15
8
9
1
16
terminal 1
index area
VCC(1)
Table 2. Pin description
Symbol Pin Description
1A, 2A 1, 9 trigger input (negative edge triggered)
1B, 2B 2, 10 trigger input (positive edge triggered)
1RD, 2RD 3, 11 direct reset (active LOW)
1Q, 2Q 4, 12 output (active LOW)
GND 8 ground (0 V)
1Q, 2Q 13, 5 output (active HIGH)
1CEXT, 2CEXT 14, 6 external capacitor connection
1REXT/CEXT, 2REXT/CEXT 15, 7 external resistor/capacitor connection
VCC 16 supply voltage
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 5 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
6. Functional description
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
↑ = LOW-to-HIGH transition;
↓ = HIGH-to-LOW transition;
= one HIGH level output pulse;
= one LOW level output pulse.
[2] If the monostable multivibrator was triggered before this condition was established, the pulse will continue as programmed.
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP16 packages: above 70 °C the value of Ptot derates linearly at 12 mW/K.
[3] For SO16 packages: above 70 °C the value of Ptot derates linearly at 8 mW/K;
For SSOP16 and TSSOP16 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K;
For DHVQFN16 packages: above 60 °C the value of Ptot derates linearly at 4.5 mW/K.
Table 3. Function table[1]
Input Output
nRD nA nB nQ nQ
LXXLH
XHXL
[2] H[2]
XXLL
[2] H[2]
HL↑
H↓H
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage −0.5 +7 V
IIK input clamping current VI < −0.5 V or VI>V
CC + 0.5 V [1] -±20 mA
IOK output clamping current VO<−0.5 V or VO>V
CC + 0.5 V [1] -±20 mA
IOoutput current −0.5 V < VO < VCC + 0.5 V - ±25 mA
ICC supply current - 50 mA
IGND ground current −50 - mA
Tstg storage temperature −65 +150 °C
Ptot total power dissipation DIP16 package [2] - 750 mW
SO16, SSOP16, TSSOP16 and
DHVQFN16 packages [3] - 500 mW
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 6 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
8. Recommended operating conditions
9. Static characteristics
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 74HC423 74HCT423 Unit
Min Typ Max Min Typ Max
VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V
VIinput voltage 0 - VCC 0-V
CC V
VOoutput voltage 0 - VCC 0-V
CC V
Tamb ambient temperature −40 - +125 −40 - +125 °C
∆t/∆V input transition rise
and fall rate VCC = 2.0 V - - 625 - - - ns/V
VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V
VCC = 6.0 V - - 83 - - - ns/V
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 °C−40 °C to
+85 °C−40 °C to
+125 °CUnit
Min Typ Max Min Max Min Max
74HC423
VIH HIGH-level
input voltage VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V
VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V
VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V
VIL LOW-level
input voltage VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V
VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V
VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V
VOH HIGH-level
output voltage VI=V
IH or VIL
IO=−20 µA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO=−20 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO=−20 µA; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V
IO=−4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V
IO=−5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V
VOL LOW-level
output voltage VI=V
IH or VIL
IO=20µA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO=20µA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO=20µA; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V
IO= 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V
IO= 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V
IIinput leakage
current VI=V
CC or GND; VCC = 6.0 V - - ±0.1 - ±1.0 - ±1.0 µA
ICC supply current VI=V
CC or GND; IO=0A;
VCC = 6.0 V - - 8.0 - 80 - 160 µA
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 7 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
CIinput capacitance - 3.5 - - - - - pF
74HCT423
VIH HIGH-level input
voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V
VIL LOW-level input
voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V
VOH HIGH-level
output voltage VI=V
IH or VIL; VCC = 4.5 V
IO=−20 µA 4.4 4.5 - 4.4 - 4.4 - V
IO=−4.0 mA 3.98 4.32 - 3.84 - 3.7 - V
VOL LOW-level output
voltage VI=V
IH or VIL; VCC = 4.5 V
IO=20µA - 0 0.1 - 0.1 - 0.1 V
IO= 4.0 mA - 0.15 0.26 - 0.33 - 0.4 V
IIinput leakage
current VI=V
CC or GND; VCC = 5.5 V - - ±0.1 - ±1.0 - ±1.0 µA
ICC supply current VI=V
CC or GND; VCC = 5.5 V;
IO=0A - - 8.0 - 80 - 160 µA
∆ICC additional supply
current per input pin; VI=V
CC −2.1 V;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V; IO=0A
nA, nB inputs - 35 126 - 158 - 172 µA
nRD input - 50 180 - 225 - 245 µA
CIinput capacitance - 3.5 - - - - - pF
Table 6. Static characteristics
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 °C−40 °C to
+85 °C−40 °C to
+125 °CUnit
Min Typ Max Min Max Min Max
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 8 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
10. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; test circuit see Figure 12.
Symbol Parameter Conditions 25 °C−40 °Cto
+85 °C−40 °Cto
+125 °CUnit
Min Typ Max Min Max Min Max
74HC423
tpd propagation
delay nA or nB to nQ or nQ; REXT =5kΩ;
CEXT = 0 pF; see Figure 7 [1]
VCC = 2.0 V - 80 255 - 320 - 385 ns
VCC = 4.5 V - 29 51 - 64 - 77 ns
VCC = 5.0 V; CL=15pF -25-----ns
VCC = 6.0 V - 23 43 - 54 - 65 ns
nRD to nQ or nQ; see Figure 7 [1]
VCC = 2.0 V - 66 215 - 270 - 325 ns
VCC = 4.5 V - 24 43 - 54 - 65 ns
VCC = 5.0 V; CL=15pF -20-----ns
VCC = 6.0 V - 19 37 - 46 - 55 ns
tttransition time see Figure 7 [2]
VCC = 2.0 V - 19 75 - 95 - 110 ns
VCC = 4.5 V - 7 15 - 19 - 22 ns
VCC = 6.0 V - 6 13 - 16 - 19 ns
tWpulse width nA input LOW; see Figure 7 and Figure 8
VCC = 2.0 V 100 11 - 125 - 150 - ns
VCC = 4.5 V 20 4 - 25 - 30 - ns
VCC = 6.0 V 17 3 - 21 - 26 - ns
nB input HIGH; see Figure 7 and Figure 8
VCC = 2.0 V 100 17 - 125 - 150 - ns
VCC = 4.5 V 20 6 - 25 - 30 - ns
VCC = 6.0 V 17 5 - 21 - 26 - ns
nRD input LOW; see Figure 7 and Figure 8
VCC = 2.0 V 100 14 - 125 - 150 - ns
VCC = 4.5 V 20 5 - 25 - 30 - ns
VCC = 6.0 V 17 4 - 21 - 26 - ns
nQ HIGH or nQ LOW; VCC = 5.0 V;
REXT =10kΩ; CEXT = 100 nF;
see Figure 7 and Figure 8
-450-----µs
nQ HIGH or nQ LOW; VCC = 5.0 V;
REXT =5kΩ; CEXT = 0 pF;
VI= GND to VCC;
see Figure 7 and Figure 8
[3] -75-----ns
trtrig retrigger time nA or nB input; VCC = 5.0 V; REXT =5kΩ;
CEXT = 0 pF; see Figure 10 [4] -110-----ns
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 9 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
REXT externaltiming
resistor VCC = 2.0 V; see Figure 8 10 - 1000 ----kΩ
VCC = 5.0 V 2 - 1000 ----kΩ
CEXT externaltiming
capacitor VCC = 5.0 V; see Figure 8 [5] no limits pF
CPD power
dissipation
capacitance
per package; VI= GND to VCC [6] -54-----pF
74HCT423
tpd propagation
delay nA or nB to nQ or nQ; REXT =5kΩ;
CEXT = 0 pF; see Figure 7
VCC = 4.5 V [1] - 30 51 - 64 - 77 ns
VCC = 5.0 V; CL=15pF [1] -26-----ns
nRD to nQ or nQ; REXT =5kΩ;
CEXT = 0 pF; see Figure 7 [1] - 26 48 - 60 - 72 ns
VCC = 4.5 V [1] - 26 48 - 60 - 72 ns
VCC = 5.0 V; CL=15pF [1] -22-----ns
tttransition time VCC = 4.5 V; Figure 7 [2] - 7 15 - 19 - 22 ns
tWpulse width trigger pulse; nA input LOW; VCC = 4.5 V;
see Figure 7 and Figure 10 20 5 - 25 - 30 - ns
trigger pulse; nB input HIGH; VCC = 4.5 V;
see Figure 7 and Figure 10 20 5 - 25 - 30 - ns
reset pulse; nRD input LOW; VCC = 4.5 V;
see Figure 7 and Figure 11 20 7 - 25 - 30 - ns
output pulse; nQ HIGH or nQ LOW;
VCC = 5.0 V; REXT =10kΩ;
CEXT = 100 nF; see Figure 7,Figure 10
and Figure 11
-450-----µs
output pulse; nQ HIGH or nQ LOW;
VCC = 5.0 V; REXT =5kΩ; CEXT = 0 pF;
VI= GND to VCC −1.5 V; see Figure 7,
Figure 10 and Figure 11
[3] -75-----ns
trtrig retrigger time nA or nB input; VCC = 5.0 V; REXT =5kΩ;
CEXT = 0 pF; see Figure 10 -110-----ns
REXT externaltiming
resistor VCC = 5.0 V; see Figure 8 2 - 1000 ----kΩ
CEXT externaltiming
capacitor VCC = 5.0 V; see Figure 8 [5] no limits pF
Table 7. Dynamic characteristics
…continued
GND = 0 V; test circuit see Figure 12.
Symbol Parameter Conditions 25 °C−40 °Cto
+85 °C−40 °Cto
+125 °CUnit
Min Typ Max Min Max Min Max
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 10 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
[1] tpd is the same as tPHL and tPLH.
[2] tt is the same as tTHL and tTLH.
[3] For other REXT and CEXT combinations see Figure 8. If CEXT > 10 pF, the next formula is valid:
tW = K × REXT × CEXT (typ.), where:
tW = output pulse width in ns;
REXT = external resistor in kΩ;
CEXT = external capacitor in pF;
K = 0.55 for VCC = 2.0 V and 0.45 for VCC = 5.0 V; see Figure 9.
Inherent test jig and pin capacitance at pins 15 and 7 (nREXT/CEXT) is 7 pF.
[4] The time to retrigger the monostable multivibrator depends on the values of REXT and CEXT. The output pulse width will only be
extended when the time between the active-going edges of the trigger input pulses meets the minimum retrigger time.
If CEXT > 10 pF, the next formula (at VCC = 5.0 V) for the set-up time of a retrigger pulse is valid:
trtrig = 30 + 0.19 × REXT × CEXT0.9 + 13 × REXT1.05 (typ.); where:
trtrig = retrigger time in ns;
CEXT = external capacitor in pF;
REXT = external resistor in kΩ.
Inherent test jig and pin capacitance at pins 15 and 7 (nREXT/CEXT) is 7 pF.
[5] When the device is powered-up, initiate the device via a reset pulse, when CEXT < 50 pF.
[6] CPD is used to determine the dynamic power dissipation (PD in µW):
PD=C
PD ×VCC2×fi×N+∑ (CL×VCC2×fo); where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL×VCC2×fo) = sum of outputs.
CPD power
dissipation
capacitance
per package; VI= GND to VCC −1.5 V [6] -56-----pF
Table 7. Dynamic characteristics
…continued
GND = 0 V; test circuit see Figure 12.
Symbol Parameter Conditions 25 °C−40 °Cto
+85 °C−40 °Cto
+125 °CUnit
Min Typ Max Min Max Min Max
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 11 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
11. Waveforms
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 7. Pulse widths, propagation delays from inputs (nA, nB, nRD) to outputs (nQ, nQ) and
output transition times
001aah911
nB input
VI
GND
VOH
VOL
VOH
VOL
VI
GND
VI
GND
tW
tW
tPLH
VM
VM
VY
VY
VX
VX
VM
tW
tTLH
tTHL
tPLH
tTHL
tPHL
tPHL (reset)
VM
tW
nA input
nRD input
Q output
Q output
VM
tW
tPLH (reset)tPHL
tPHL
tTLH
tPLH
Table 8. Measurement points
Type Input Output
VIVMVMVXVY
74HC423 VCC 0.5VCC 0.5VCC 0.1VCC 0.9VCC
74HCT423 3 V 1.3 V 1.3 V 0.1VCC 0.9VCC
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 12 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
VCC = 5.0 V and Tamb = 25 °C.
(1) REXT = 100 kΩ.
(2) REXT = 50 kΩ.
(3) REXT = 10 kΩ.
(4) REXT = 2 kΩ.
External capacitance = 10 nF,
external resistance = 10 kΩto 100 kΩand Tamb =25°C.
Fig 8. Typical output pulse width as a function of the
external capacitor values Fig 9. Typical ‘K’ factor
001aaa611
103
102
105
104
106
tW
(ns)
10
CEXT (pF)
110
4
103
10 102
(2)
(3)
(4)
(1)
VCC (V)
08624
001aaa612
0.4
0.2
0.6
0.8
'K' factor
0
nRD = HIGH.
Fig 10. Output pulse control using retrigger pulse (trtrig)
mna521
tWtW
tW
tW
trt tW
nB input
nA input
nQ output
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 13 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
nA = LOW.
Fig 11. Output pulse control using reset input nRD
mna522
tWtW
tW
nB input
nRD input
nQ output
Test data is given in Table 9.
Definitions for test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
Fig 12. Test circuit for measuring switching times
001aah768
tW
tW
tr
tr
tf
VM
VI
negative
pulse
GND
VI
positive
pulse
GND
10 %
90 %
90 %
10 % VMVM
VM
tf
VCC
DUT
RT
VIVO
CL
G
Table 9. Test data
Supply Input Load
VCC VItr, tfCL
2.0 V to 6.0 V VCC 6 ns 15 pF, 50 pF
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 14 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
12. Application information
12.1 Timing component connections
The basic output pulse width is essentially determined by the values of the external timing
components REXT and CEXT.
12.1.1 Minimum monostable pulse width
To set the minimum pulse width, when CEXT < 10 nF, see Figure 8 and
when CEXT > 10 nF, the output pulse width is defined as:
tW = 0.45 × REXT × CEXT (typ.), where:
tW = pulse width in µs;
REXT = external resistor in kΩ;
CEXT = external capacitor in nF.
12.2 Power-up considerations
When the monostable is powered-up it may produce an output pulse, with a pulse width
defined by the values of REXT and CEXT, this output pulse can be eliminated using the
circuit shown in Figure 14.
(1) For minimum noise generation it is recommended that the nCEXT pins (6, 14) are connected to ground externally to
the GND pin (8).
Fig 13. Timing component connections
001aah917
CEXT REXT
nA
nB
VCC
nCEXT
nRD
nREXT/CEXT
nQ
nQ
GND
423 13 (5)
4 (12)
15 (7)14 (6)
3 (11)
8
1 (9)
2 (10)
(1)
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 15 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
12.3 Power-down considerations
A large capacitor CEXT may cause problems when powering-down the monostable due to
the capacitor’s stored energy. When a system containing this device is powered-down or a
rapid decrease of VCC to zero occurs, the monostable may sustain damage, due to the
capacitor discharging through the input protection diodes. To avoid this possibility, use a
damping diode DEXT preferably a germanium or Schottky type diode able to withstand
large current surges and connect as shown in Figure 15.
Fig 14. Power-up output pulse elimination circuit
001aah918
VCC
RESET nRD
CEXT REXT
nA
nB
VCC
nCEXTGND nREXT/CEXT
nQ
nQ
423 13 (5)
4 (12)
15 (7)14 (6)8
1 (9)
2 (10)
3 (11)
Fig 15. Power-down protection circuit
001aah919
DEXT
nRD
CEXT REXT
nA
nB
VCC
nCEXT nREXT/CEXT
nQ
nQ
423 13 (5)
4 (12)
15 (7)
1 (9)
2 (10)
3 (11)
GND
14 (6)8
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 16 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
13. Package outline
Fig 16. Package outline SOT38-4 (DIP16)
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT38-4 95-01-14
03-02-13
MH
c
(e )
1
ME
A
L
seating plane
A1
wM
b1
b2
e
D
A2
Z
16
1
9
8
E
pin 1 index
b
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
UNIT A
max. 12 b1(1) (1) (1)
b2cD E e M Z
H
L
mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
min. A
max. bmax.
w
ME
e1
1.73
1.30 0.53
0.38 0.36
0.23 19.50
18.55 6.48
6.20 3.60
3.05 0.2542.54 7.62 8.25
7.80 10.0
8.3 0.764.2 0.51 3.2
inches 0.068
0.051 0.021
0.015 0.014
0.009
1.25
0.85
0.049
0.033 0.77
0.73 0.26
0.24 0.14
0.12 0.010.1 0.3 0.32
0.31 0.39
0.33 0.030.17 0.02 0.13
DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 17 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
Fig 17. Package outline SOT109-1 (SO16)
X
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
e
c
L
vMA
(A )
3
A
8
9
1
16
y
pin 1 index
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
1.75 0.25
0.10 1.45
1.25 0.25 0.49
0.36 0.25
0.19 10.0
9.8 4.0
3.8 1.27 6.2
5.8 0.7
0.6 0.7
0.3 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.0
0.4
SOT109-1 99-12-27
03-02-19
076E07 MS-012
0.069 0.010
0.004 0.057
0.049 0.01 0.019
0.014 0.0100
0.0075 0.39
0.38 0.16
0.15 0.05
1.05
0.041
0.244
0.228 0.028
0.020 0.028
0.012
0.01
0.25
0.01 0.004
0.039
0.016
0 2.5 5 mm
scale
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 18 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
Fig 18. Package outline SOT763-1 (DHVQFN16)
terminal 1
index area
0.51
A1Eh
b
UNIT ye
0.2
c
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 3.6
3.4
Dh
2.15
1.85
y1
2.6
2.4 1.15
0.85
e1
2.5
0.30
0.18
0.05
0.00 0.05 0.1
DIMENSIONS (mm are the original dimensions)
SOT763-1 MO-241 - - -- - -
0.5
0.3
L
0.1
v
0.05
w
0 2.5 5 mm
scale
SOT763-1
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
16 terminals; body 2.5 x 3.5 x 0.85 mm
A(1)
max.
AA1c
detail X
y
y1C
e
L
Eh
Dh
e
e1
b
27
15 10
9
8
1
16
X
D
E
C
BA
terminal 1
index area
AC
CB
vM
wM
E(1)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
D(1)
02-10-17
03-01-27
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 19 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
Fig 19. Package outline SOT338-1 (SSOP16)
UNIT A1A2A3bpcD
(1) E(1) eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.21
0.05 1.80
1.65 0.25 0.38
0.25 0.20
0.09 6.4
6.0 5.4
5.2 0.65 1.25
7.9
7.6 1.03
0.63 0.9
0.7 1.00
0.55 8
0
o
o
0.130.2 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT338-1 99-12-27
03-02-19
(1)
wM
bp
D
HE
E
Z
e
c
vMA
X
A
y
18
16 9
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
MO-150
pin 1 index
0 2.5 5 mm
scale
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1
A
max.
2
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 20 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
Fig 20. Package outline SOT403-1 (TSSOP16)
UNIT A1A2A3bpcD
(1) E(2) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05 0.95
0.80 0.30
0.19 0.2
0.1 5.1
4.9 4.5
4.3 0.65 6.6
6.2 0.4
0.3 0.40
0.06 8
0
o
o
0.13 0.10.21
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT403-1 MO-153 99-12-27
03-02-18
wM
bp
D
Z
e
0.25
18
16 9
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
HE
E
c
vMA
X
A
y
0 2.5 5 mm
scale
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1
A
max.
1.1
pin 1 index
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 21 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
14. Abbreviations
15. Revision history
Table 10. Abbreviations
Acronym Description
CMOS Complementary Metal Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74HC_HCT423_3 20080724 Product data sheet - 74HC_HCT423_CNV_2
Modifications: •The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•Legal texts have been adapted to the new company name where appropriate.
•Section 3 “Ordering information”,Section 5 “Pinning information”and Section 13
“Package outline”, added type numbers 74HC423BQ and 74HCT423BQ (DHVQFN16
package).
•Figure 4 “Logic diagram”,Figure 13 “Timing component connections” and Figure 15
“Power-down protection circuit” redrawn.
•Section 10 “Dynamic characteristics” CPD values added.
•Figure 12 “Test circuit for measuring switching times” added.
•Section 12.1 “Timing component connections” moved to Section 12.
•Section 14 “Abbreviations” added.
74HC_HCT423_CNV_2 19980708 Product specification - -
74HC_HCT423_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 24 July 2008 22 of 23
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
16. Legal information
16.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
16.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
© NXP B.V. 2008. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 24 July 2008
Document identifier: 74HC_HCT423_3
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
18. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
6 Functional description . . . . . . . . . . . . . . . . . . . 5
7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
8 Recommended operating conditions. . . . . . . . 6
9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8
11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
12 Application information. . . . . . . . . . . . . . . . . . 14
12.1 Timing component connections . . . . . . . . . . . 14
12.1.1 Minimum monostable pulse width. . . . . . . . . . 14
12.2 Power-up considerations . . . . . . . . . . . . . . . . 14
12.3 Power-down considerations . . . . . . . . . . . . . . 15
13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16
14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 21
15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 21
16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 22
16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 22
16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
17 Contact information. . . . . . . . . . . . . . . . . . . . . 22
18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
