General Description
The MXB7843 is an industry-standard 4-wire touch-
screen controller. It contains a 12-bit sampling analog-
to-digital converter (ADC) with a synchronous serial
interface and low on-resistance switches for driving
resistive touch screens. The MXB7843 uses an external
reference. The MXB7843 can make absolute or ratio-
metric measurements. The MXB7843 has two auxiliary
ADC inputs. All analog inputs are fully ESD protected,
eliminating the need for external TransZorb™ devices.
The MXB7843 is guaranteed to operate with a single
2.375V to 5.25V supply voltage. In shutdown mode, the
typical power consumption is reduced to under 0.5µW,
while the typical power consumption at 125ksps
throughput and a 2.7V supply is 650µW.
Low-power operation makes the MXB7843 ideal for bat-
tery-operated systems, such as personal digital assis-
tants with resistive touch screens and other portable
equipment. The MXB7843 is available in 16-pin QSOP
and TSSOP packages, and is guaranteed over the
-40°C to +85°C temperature range.
Applications
Personal Digital Assistants
Portable Instruments
Point-of-Sales Terminals
Pagers
Touch-Screen Monitors
Cellular Phones
Features
♦ESD-Protected ADC Inputs
±15kV IEC 61000-4-2 Air-Gap Discharge
±8kV IEC 61000-4-2 Contact Discharge
♦Pin Compatible with MXB7846
♦+2.375V to +5.25V Single Supply
♦4-Wire Touch-Screen Interface
♦Ratiometric Conversion
♦SPI™/QSPI™, 3-Wire Serial Interface
♦Programmable 8-/12-Bit Resolution
♦Two Auxiliary Analog Inputs
♦Automatic Shutdown Between Conversions
♦Low Power
270µA at 125ksps
115µA at 50ksps
25µA at 10ksps
5µA at 1ksps
2µA Shutdown Current
MXB7843
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
________________________________________________________________ Maxim Integrated Products 1
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
VDD DCLK
CS
DIN
BUSY
DOUT
PENIRQ
VDD
REF
TOP VIEW
MXB7843
QSOP/TSSOP
X+
Y+
GND
X-
Y-
IN3
IN4
Pin Configuration
Ordering Information
19-2435; Rev 1; 9/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
PART TEMP RANGE PIN-PACKAGE
MXB7843EEE -40°C to +85°C16 QSOP
MXB7843EUE -40°C to +85°C16 TSSOP
TransZorb is a trademark of Vishay Intertechnology, Inc.
SPI/QSPI are trademarks of Motorola, Inc.
Typical Application Circuit appears at end of data sheet.
MXB7843
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
2_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDD, DIN, CS, DCLK to GND ...................................-0.3V to +6V
Digital Outputs to GND...............................-0.3V to (VDD + 0.3V)
VREF, X+, X-, Y+, Y-, IN3, IN4 to GND........-0.3V to (VDD + 0.3V)
Maximum Current into Any Pin .........................................±50mA
Maximum ESD per IEC-61000-4-2 (per MIL STD-883 HBM)
X+, X-, Y+, Y-, IN3, IN4 ...........................................15kV (4kV)
All Other Pins ..........................................................2kV (500V)
Continuous Power Dissipation (TA= +70°C)
16-Pin QSOP (derate 8.30mW/°C above +70°C).........667mW
16-Pin TSSOP (derate 5.70mW/°C above +70°C) .......456mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
ELECTRICAL CHARACTERISTICS
(VDD = 2.7V to 3.6V, VREF = 2.5V, fDCLK = 2MHz (50% duty cycle), fSAMPLE = 125kHz, 12-bit mode, 0.1µF capacitor at REF, TA=
TMIN to TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
PARAMETER
SYM B O L
CONDITIONS
MIN
TYP
MAX
DC ACCURACY (Note 1)
Resolution 12 Bits
No Missing Codes 11 12 Bits
Relative Accuracy INL (Note 2) ±1 ±2 LSB
Differential Nonlinearity DNL ±1 LSB
Offset Error ±6 LSB
Gain Error (Note 3) ±4 LSB
Noise 70
CONVERSION RATE
Conversion Time tCONV 12 clock cycles (Note 4) 6 µs
Track/Hold Acquisition Time tACQ 3 clock cycles 1.5 µs
Throughput Rate
fSAMPLE
16 clock conversion 125 kHz
Multiplexer Settling Time
500
ns
Aperture Delay 30 ns
Aperture Jitter
100
p s
Channel-to-Channel Isolation VIN = 2.5VP-P at 50kHz
100
dB
Serial Clock Frequency fDCLK 0.1 2.0
Duty Cycle 40 60 %
ANALOG INPUT (X+, X-, Y+, Y-, IN3, IN4)
Input Voltage Range 0
VREF
V
Input Capacitance 25 pF
Input Leakage Current On/off-leakage, VIN = 0 to VDD
±0.1
±1 µA
SWITCH DRIVERS
Y+, X+ 7
On-Resistance (Note 5) Y-, X- 9 Ω
MXB7843
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 2.7V to 3.6V, VREF = 2.5V, fDCLK = 2MHz (50% duty cycle), fSAMPLE = 125kHz, 12-bit mode, 0.1µF capacitor at REF, TA=
TMIN to TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
PARAMETER
SYM B O L
CONDITIONS
MIN
TYP
MAX
REFERENCE (Reference applied to REF)
Reference Input Voltage Range (Note 6) 1
VDD
V
Input Resistance 5GΩ
fSAMPLE = 125kHz 13 40
fSAMPLE = 12.5kHz 2.5
Input Current
fDCLK = 0 ±3
µA
DIGITAL INPUTS (DCLK, CS, DIN)
Input High Voltage VIH VDD
✕ 0.7
V
Input Low Voltage VIL 0.8 V
Input Hysteresis VHYST
100
mV
Input Leakage Current IIN ±1 µA
Input Capacitance CIN 15 pF
DIGITAL OUTPUT (DOUT, BUSY)
Output Voltage Low VOL ISINK = 250µA 0.4 V
Output Voltage High VOH ISOURCE = 250µA VDD -
0.5 V
PENIRQ Output Low Voltage VOL 50kΩ pullup to VDD 0.8 V
Three-State Leakage Current ILCS = VDD 1
±10
µA
Three-State Output Capacitance
COUT CS = VDD 15 pF
POWER REQUIREMENTS
Supply Voltage VDD
2.375 5.250
V
fSAMPLE = 125ksps
270
650
fSAMPLE = 12.5ksps
220
Supply Current IDD
fSAMPLE = 0
150
µA
Shutdown Supply Current ISHDN DCLK = CS = VDD 3µA
Power-Supply Rejection Ratio PSRR VDD = 2.7V to 3.6V full scale 70 dB
MXB7843
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
4_______________________________________________________________________________________
Note 1: Tested at VDD = +2.7V.
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has
been calibrated.
Note 3: Offset nulled.
Note 4: Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
Note 5: Resistance measured from the source to drain of the switch.
Note 6: ADC performance is limited by the conversion noise floor, typically 300µVP-P. An external reference below 2.5V can com-
promise the ADC performance.
TIMING CHARACTERISTICS (Figure 1)
(VDD = 2.7V to 3.6V, VREF = 2.5V, fDCLK = 2MHz (50% duty cycle), fSAMPLE = 125kHz, 12-bit mode, 0.1µF capacitor at REF, TA=
TMIN to TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
PARAMETER
SYM B O L
CONDITIONS
MIN TYP MAX
UNITS
TIMING CHARACTERISTICS (Figure 1)
Acquisition Time tACQ 1.5 µs
DCLK Clock Period tCP 500 ns
DCLK Pulse Width High tCH 200 ns
DCLK Pulse Width Low tCL 200 ns
DIN-to-DCLK Setup Time tDS 100 ns
DIN-to-DCLK Hold Time tDH 0ns
CS Fall-to-DCLK Rise Setup Time
tCSS 100 ns
CS Rise-to-DCLK Rise Ignore tCSH 0ns
DCLK Falling-to-DOUT Valid tDO CLOAD = 50pF 200 ns
CS Rise-to-DOUT Disable tTR CLOAD = 50pF 200 ns
CS Fall-to-DOUT Enable tDV CLOAD = 50pF 200 ns
DCLK Falling-to-BUSY Rising tBD 200 ns
CS Falling-to-BUSY Enable tBDV 200 ns
CS Rise-to-BUSY Disable tBTR 200 ns
MXB7843
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
_______________________________________________________________________________________ 5
INTEGRAL NONLINEARITY
vs. DIGITAL OUTPUT CODE
MXB7843 toc01
OUTPUT CODE
INL (LSB)
350030002000 25001000 1500500
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
-0.4
04000
DIFFERENTIAL NONLINEARITY
vs. DIGITAL OUTPUT CODE
MXB7843 toc02
OUTPUT CODE
DNL (LSB)
350030002000 25001000 1500500
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1.0
-1.0
-0.8
0 4000
CHANGE IN OFFSET ERROR
vs. SUPPLY VOLTAGE
MXB7843 toc04
SUPPLY VOLTAGE (V)
OFFSET ERROR (LSB)
5.04.53.0 3.5 4.0
-1.5
-1.0
-0.5
0
0.5
1.0
1.5
2.0
-2.0
2.5 5.5
CHANGE IN OFFSET ERROR
vs. TEMPERATURE
MXB7843 toc05
TEMPERATURE (°C)
OFFSET ERROR FROM +25°C (LSB)
655035205-10-25
-0.5
0
0.5
1.0
-1.0
-40 80
CHANGE IN GAIN ERROR
vs. SUPPLY VOLTAGE
MXB7843 toc07
SUPPLY VOLTAGE (V)
GAIN ERROR (LSB)
5.04.54.03.53.0
-2
-1
0
1
2
3
-3
2.5 5.5
CHANGE IN GAIN ERROR
vs. TEMPERATURE
MXB7843 toc08
TEMPERATURE (°C)
GAIN ERROR FROM +25°C (LSB)
655035205-10-25
-1.5
-1.0
-0.5
0
0.5
1.0
-2.0
-40 80
SWITCH ON-RESISTANCE vs. SUPPLY VOLTAGE
(X+, Y+ : + VDD TO PIN; X-, Y- : TO GND)
MXB7843 toc03
SUPPLY VOLTAGE (V)
RON (Ω)
5.04.54.03.53.0
2
4
6
8
10
12
14
0
2.5 5.5
X-
Y- X+
Y+
SWITCH ON-RESISTANCE vs. TEMPERATURE
(X+, Y+ : + VDD TO PIN; X-, Y- : PIN TO GND)
MXB7843 toc06
TEMPERATURE (°C)
RON (Ω)
35205-10-25
2
1
3
7
6
5
4
8
9
10
11
12
0
-40 50 65 80
Y+
X+
X-
Y-
Typical Operating Characteristics
(VDD = 2.7V, VREF = 2.5V, fDCLK = 2MHz, fSAMPLE = 125kHz, CLOAD = 50pF, 0.1µF capacitor at REF, TA= +25°C, unless otherwise
noted.)
MXB7843
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
6_______________________________________________________________________________________
Typical Operating Characteristics (continued)
(VDD = 2.7V, VREF = 2.5V, fDCLK = 2MHz, fSAMPLE = 125kHz, CLOAD = 50pF, 0.1µF capacitor at REF, TA= +25°C, unless otherwise
noted.)
REFERENCE CURRENT
vs. SUPPLY VOLTAGE
MXB7843 toc12
SUPPLY VOLTAGE (V)
REFERENCE CURRENT (µA)
5.04.54.03.53.0
7.8
7.9
8.0
8.1
8.2
8.3
7.7
2.5 5.5
CL = 0.1µF
fSAMPLE = 125kHz
REFERENCE CURRENT vs. TEMPERATURE
MXB7843 toc13
TEMPERATURE (°C)
REFERENCE CURRENT (µA)
655035205-10-25
7.8
7.9
8.0
8.1
8.2
8.3
7.7
-40 80
VDD = 2.7V
CL = 0.1µF
fSAMPLE = 125kHz
REFERENCE CURRENT vs. SAMPLE RATE
MXB7843 toc14
SAMPLE RATE (kHz)
REFERENCE CURRENT (µA)
100755025
1
2
3
4
5
6
7
8
9
10
0
0125
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MXB7843 toc18
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (µA)
5.04.54.03.53.02.5
175
200
225
250
150
2.0 5.5
fSAMPLE = 12.5kHz
SUPPLY CURRENT vs. TEMPERATURE
MXB7843 toc19
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
6550-25 -10 5 20 35
255
260
265
270
275
280
285
290
250
-40 80
fSAMPLE = 125kHz
VDD = 2.7V
SUPPLY CURRENT vs. SAMPLE RATE
MXB7843 toc20
SAMPLE RATE (kHz)
SUPPLY CURRENT (µA)
100755025
125
150
175
200
225
250
100
0125
VDD = 2.7V
VREF = 2.5V
SHUTDOWN CURRENT
vs. SUPPLY VOLTAGE
MXB7843 toc21
SUPPLY VOLTAGE (V)
SHUTDOWN CURRENT (nA)
4.74.23.73.2
100
150
200
250
300
50
2.7 5.2
DLCK = CS = VDD
SHUTDOWN CURRENT vs. TEMPERATURE
MXB7843 toc22
TEMPERATURE (°C)
SHUTDOWN CURRENT (nA)
655035205-10-25
60
70
80
90
100
110
120
50
-40 80
DCLK = CS = VDD
MAXIMUM SAMPLE RATE
vs. SUPPLY VOLTAGE
MXB7843 toc23
SUPPLY VOLTAGE (V)
SAMPLE RATE (kHz)
5.04.54.03.53.02.5
10
100
1000
1
2.0 5.5
MXB7843
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
_______________________________________________________________________________________ 7
Pin Description
PIN NAME FUNCTION
1V
DD Positive Supply Voltage. Connect to pin 10.
2X+X+ Position Input, ADC Input Channel 1
3Y+Y+ Position Input, ADC Input Channel 2
4X-X- Position Input
5Y-Y- Position Input
6GND Ground
7IN3 Auxiliary Input to ADC; ADC Input Channel 3
8IN4 Auxiliary Input to ADC; ADC Input Channel 4
9REF Voltage Reference Input. Reference voltage for analog-to-digital conversion. Apply a reference
voltage between 1V and VDD. Bypass REF to GND with a 0.1µF capacitor.
10 VDD Positive Supply Voltage, +2.375V to +5.25V. Bypass with a 1µF capacitor. Connect to pin 1.
11 PENIRQ Pen Interrupt Output. Open anode output. 10kΩ to 100kΩ pullup resistor required to VDD.
12 DOUT Serial Data Output. Data changes state on the falling edge of DCLK. High impedance when CS is
HIGH.
13 BUSY Busy Output. BUSY pulses high for one clock period before the MSB decision. High impedance when
CS is HIGH.
14 DIN Serial Data Input. Data clocked in on the rising edge of DCLK.
15 CS Active-Low Chip Select. Data is only clocked into DIN when CS is low. When CS is high, DOUT and
BUSY are high impedance.
16 DCLK Serial Clock Input. Clocks data in and out of the serial interface and sets the conversion speed (duty
cycle must be 40% to 60%).
MXB7843
Detailed Description
The MXB7843 uses a successive-approximation conver-
sion technique to convert analog signals to a 12-bit digital
output. An SPI/QSPI/MICROWIRE™-compatible serial
interface provides an easy communication to a micro-
processor (µP). It features a 4-wire touch-screen interface
and two auxiliary ADC channels (Functional Diagram).
Analog Inputs
Figure 2 shows a block diagram of the analog input sec-
tion that includes the input multiplexer of the MXB7843,
the differential signal inputs of the ADC, and the differ-
ential reference inputs of the ADC. The input multiplexer
switches between X+, X-, Y+, Y-, IN3, and IN4.
In single-ended mode, conversions are performed using
REF as the reference. In differential mode, ratiometric
conversions are performed with REF+ connected to X+ or
Y+, and REF- connected to X- or Y-. Configure the refer-
ence and switching matrix according to Tables 1 and 2.
During the acquisition interval, the selected channel
charges the sampling capacitance. The acquisition
interval starts on the fifth falling clock edge and ends
on the eighth falling clock edge.
The time required for the T/H to acquire an input signal
is a function of how quickly its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens, and more time must be
allowed between conversions. The acquisition time
(tACQ) is the maximum time the device takes to acquire
the input signal to 12-bit accuracy. Calculate tACQ with
the following equation:
where RIN = 2kΩand RSis the source impedance of
the input signal.
Source impedances below 1kΩdo not significantly
affect the ADC’s performance. Accommodate higher
source impedances by either slowing down DCLK or
by placing a 1µF capacitor between the analog input
and GND.
Input Bandwidth and Anti-Aliasing
The ADCs input tracking circuitry has a 25MHz small-
signal bandwidth, so it is possible to digitize high-
speed transient events. To avoid high-frequency sig-
nals being aliased into the frequency band of interest,
anti-alias filtering is recommended.
tRRpF
ACQ S IN
. =× +
()
×84 25
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
8_______________________________________________________________________________________
CS
DCLK
DIN
DOUT
BUSY
tBDV
tDV
tCSS
tCL
tCH
tDS tDH
tCP
tDO
tBD
tTR
tBTR
tCSH
Figure 1. Detailed Serial Interface Timing
MICROWIRE is a trademark of National Semiconductor Corp.
MXB7843
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
_______________________________________________________________________________________ 9
6-TO-1
MUX
VDD
REF
X+
X-
Y+
Y-
12-BIT ADC
IN3
IN4
SERIAL
DATA
INTERFACE
DIN
CS
DCLK
BUSY
PENIRQ
DOUT
Functional Diagram
A2
A1
A0 MEASUREMENT ADC INPUT CONNECTION DRIVERS ON
000 Reserved Reserved —
001 Y-Position X+ Y+, Y-
010 IN3 IN3 —
011 Reserved Reserved —
100 Reserved Reserved —
101 X-Position Y+ X-, X+
110 IN4 IN4 —
111 Reserved Reserved —
Table 1. Input Configuration, Single-Ended Reference Mode (SER/DFR HIGH)
A2
A1
A0 ADC +REF
CONNECTION TO
ADC -REF
CONNECTION TO
ADC INPUT
CONNECTION TO
MEASUREMENT
PERFORMED DRIVER ON
001Y+Y-X+Y position Y+, Y-
101X+X-Y+X position X+, X-
Table 2. Input Configuration, Differential Reference Mode (SER/DFR LOW)
MXB7843
Analog Input Protection
Internal protection diodes, which clamp the analog
input to VDD and GND, allow the analog input pins to
swing from GND - 0.3V to VDD + 0.3V without damage.
Analog inputs must not exceed VDD by more than
50mV or be lower than GND by more than 50mV for
accurate conversions. If an off-channel analog input
voltage exceeds the supplies, limit the input current to
50mA. The analog input pins are ESD protected to
±8kV using the Contact-Discharge method and ±15kV
using the Air-Gap method specified in IEC 61000-4-2.
Touch-Screen Conversion
The MXB7843 provides two conversion methods—dif-
ferential and single ended. The SER/DFR bit in the con-
trol word selects either mode. A logic 1 selects a
single-ended conversion, while a logic 0 selects a dif-
ferential conversion.
Differential vs. Single Ended
Changes in operating conditions can degrade the accu-
racy and repeatability of touch-screen measurements.
Therefore, the conversion results representing X and Y
coordinates may be incorrect. For example, in single-
ended measurement mode, variation in the touch-
screen driver voltage drops results in incorrect input
reading. Differential mode minimizes these errors.
Single-Ended Mode
Figure 3 shows the switching matrix configuration for
Y-coordinate measurement in single-ended mode. The
MXB7843 measures the position of the pointing device by
connecting X+ to IN+ of the ADC, enabling Y+ and Y- dri-
vers, and digitizing the voltage on X+. The ADC performs
a conversion with REF+ = REF and REF- = GND. In sin-
gle-ended measurement mode, the bias to the touch
screen can be turned off after the acquisition to save
power. The on-resistance of the X and Y drivers results in
a gain error in single-ended measurement mode. Touch-
screen resistance ranges from 200Ωto 900Ω(depending
on the manufacturer), whereas the on-resistance of the X
and Y drivers is 8Ω(typ). Limit the touch-screen current to
less than 50mA by using a touch screen with a resistance
higher than 100Ω. The resistive divider created by the
touch screen and the on-resistance of the X and Y drivers
result in both an offset and a gain shift. Also, the on-resis-
tance of the X and Y drivers does not track the resistance
of the touch screen over temperature and supply. This
results in further measurement errors.
Differential Measurement Mode
Figure 4 shows the switching matrix configuration for
Y-coordinate measurement. The REF+ and REF- inputs
are connected directly to the Y+ and Y- pins, respec-
tively. Differential mode uses the voltage at the Y+ pin
as the REF+ voltage and voltage at the Y- pin as REF-
voltage. This conversion is ratiometric and independent
of the voltage drop across the drivers and variation in
the touch-screen resistance. In differential mode, the
touch screen remains biased during the acquisition and
conversion process. This results in additional supply
current and power dissipation during conversion when
compared to the absolute measurement mode.
PEN Interrupt Request (
PENIRQ
)
Figure 5 shows the block diagram for the PENIRQ func-
tion. When used, PENIRQ requires a 10kΩto 100kΩ
pullup to +VDD. If enabled, PENIRQ goes low whenever
the touch screen is touched. The PENIRQ output can
be used to initiate an interrupt to the microprocessor,
which can write a control word to the MXB7843 to start
a conversion.
Figure 6 shows the timing diagram for the PENIRQ pin
function. The diagram shows that once the screen is
touched while CS is high, the PENIRQ output goes low
after a time period indicated by tTOUCH. The tTOUCH
value changes for different touch-screen parasitic
capacitance and resistance. The microprocessor
receives this interrupt and pulls CS low to initiate a con-
version. At this instant, the PENIRQ pin should be
masked, as transitions can occur due to a selected
input channel or the conversion mode. The PENIRQ pin
functionality becomes valid when either the last data bit
is clocked out, or CS is pulled high.
External Reference
During conversion, an external reference at REF must
deliver up to 40µA DC load current. If the reference has
a higher output impedance or is noisy, bypass it close
to the REF pin with a 0.1µF and a 4.7µF capacitor.
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
10 ______________________________________________________________________________________
MXB7843
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
______________________________________________________________________________________ 11
VDD
PENIRQ REF
A2–A0
(SHOWN 001B)
SER/DFR
(SHOWN HIGH)
GND
X+
X-
Y+
Y- CONVERTER
IN3
IN4
+REF
-REF
+IN
-IN
Figure 2. Equivalent Input Circuit
REF
VDD
GND
Y+
Y-
X+ REF+
REF-
+IN
-IN
12-BIT ADC
Figure 3. Single-Ended Y-Coordinate Measurement
VDD
GND
Y+
Y-
X+ REF+
REF-
+IN
-IN
12-BIT ADC
Figure 4. Ratiometric Y-Coordinate Measurement
MXB7843
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
12 ______________________________________________________________________________________
OPEN CIRCUIT
PENIRQ
ENABLE
PENIRQ
TOUCH SCREEN
VDD
100kΩ
Y+
X+
Y-
ON
Figure 5.
PENIRQ
Functional Block Diagram
NO RESPONSE TO TOUCHMASK PENIRQ PENIRQ ENABLED
tTOUCH
SCREEN TOUCHED HERE
INTERRUPT PROCESSOR
SA2A1A0MS/D PD1 PD0
12345678123 1213141516
PENIRQ
CS
DIN
DCLK
Figure 6.
PENIRQ
Timing Diagram
Digital Interface
Initialization After Power-Up and Starting a
Conversion
The digital interface consists of three inputs, DIN, DCLK,
CS, and one output, DOUT. A logic-high on CS disables
the MXB7843 digital interface and places DOUT in a
high-impedance state. Pulling CS low enables the
MXB7843 digital interface.
Start a conversion by clocking a control byte into DIN
(Table 3) with CS low. Each rising edge on DCLK
clocks a bit from DIN into the MXB7843’s internal shift
register. After CS falls, the first arriving logic 1 bit
defines the control byte’s START bit. Until the START bit
arrives, any number of logic 0 bits can be clocked into
DIN with no effect.
The MXB7843 is compatible with SPI/QSPI/MICROWIRE
devices. For SPI, select the correct clock polarity and
sampling edge in the SPI control registers of the micro-
controller: set CPOL = 0 and CPHA = 0. MICROWIRE,
SPI, and QSPI all transmit a byte and receive a byte at
the same time. The simplest software interface requires
only three 8-bit transfers to perform a conversion (one 8-
bit transfer to configure the ADC, and two more 8-bit
transfers to read the conversion result) (Figure 7).
Simple Software Interface
Make sure the CPU’s serial interface runs in master
mode so the CPU generates the serial clock. Choose a
clock frequency from 500kHz to 2MHz:
1) Set up the control byte and call it TB. TB should be
in the format: 1XXXXXXX binary, where X denotes
the particular channel, selected conversion mode,
and power mode (Tables 3, 4).
2) Use a general-purpose I/O line on the CPU to pull
CS low.
3) Transmit TB and simultaneously receive a byte; call
it RB1.
4) Transmit a byte of all zeros ($00 hex) and simultane-
ously receive byte RB2.
5) Transmit a byte of all zeros ($00 hex) and simultane-
ously receive byte RB3.
6) Pull CS high.
Figure 7 shows the timing for this sequence. Bytes RB2
and RB3 contain the result of the conversion, padded
by four trailing zeros. The total conversion time is a func-
tion of the serial-clock frequency and the amount of idle
timing between 8-bit transfers.
Digital Output
The MXB7843 outputs data in straight binary format
(Figure 10). Data is clocked out on the falling edge of
the DCLK, MSB first.
Serial Clock
The external clock not only shifts data in and out, but it
also drives the analog-to-digital conversion steps.
BUSY pulses high for one clock period after the last bit
of the control byte. Successive-approximation bit deci-
sions are made and appear at DOUT on each of the
next 12 DCLK falling edges. BUSY and DOUT go into a
high-impedance state when CS goes high.
The conversion must complete in 500µs or less; if not,
droop on the sample-and-hold capacitors can degrade
conversion results.
Data Framing
The falling edge of CS does not start a conversion. The
first logic high clocked into DIN is interpreted as a start
bit and defines the first bit of the control byte. A conver-
sion starts on DCLK’s falling edge, after the eighth bit
of the control byte is clocked into DIN.
The first logic 1 clocked into DIN after bit 6 of a conver-
sion in progress is clocked onto the DOUT pin and is
treated as a START bit (Figure 8).
Once a start bit has been recognized, the current con-
version must be completed.
The fastest the MXB7843 can run with CS held continu-
ously low is 15 clock conversions. Figure 8 shows the
serial-interface timing necessary to perform a conver-
sion every 15 DCLK cycles. If CS is connected low and
DCLK is continuous, guarantee a start bit by first clock-
ing in 16 zeros.
Most microcontrollers (µCs) require that data transfers
occur in multiples of eight DCLK cycles; 16 clocks per
conversion is typically the fastest that a µC can drive the
MXB7843. Figure 9 shows the serial-interface timing nec-
essary to perform a conversion every 16 DCLK cycles.
8-Bit Conversion
The MXB7843 provides an 8-bit conversion mode
selected by setting the MODE bit in the control byte
high. In the 8-bit mode, conversions complete four
clock cycles earlier than in the 12-bit output mode,
resulting in 25% faster throughput. This can be used in
conjunction with serial interfaces that provide 12-bit
transfers, or two conversions could be accomplished
with three 8-bit transfers. Not only does this shorten each
conversion by 4 bits, but each conversion can also
MXB7843
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
______________________________________________________________________________________ 13
MXB7843
occur at a faster clock rate since settling to better than 8
bits is all that is required. The clock rate can be as much
as 25% faster. The faster clock rate and fewer clock
cycles combine to increase the conversion rate.
Data Format
The MXB7843 output data is in straight binary format as
shown in Figure 10. This figure shows the ideal output
code for the given input voltage and does not include
the effects of offset, gain, or noise.
Applications Information
Basic Operation of the MXB7843
The 4-wire touch-screen controller works by creating a
voltage gradient across the vertical or horizontal resis-
tive network connected to the MXB7843, as shown in
the Typical Application Circuit. The touch screen is
biased through internal MOSFET switches that connect
each resistive layer to VDD and ground on an alternate
basis. For example, to measure the Y position when a
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
14 ______________________________________________________________________________________
DCLK 1891216
4567891011 3 2 1 0
20 244
DOUT
A/D STATE
BUSY
CS
DIN SA2A1A0
MODE
ON OFF
(MSB) (LSB)
CONVERSION IDLEIDLE
IDLE
TB
ACQUIRE CONVERSION IDLE
RB1
OFF
OFF OFFON
PD1 PD0
(START)
SER/
DFR
DRIVERS1 AND 2
(SER/DFR HIGH)
DRIVERS1 AND 2
(SER/DFR LOW)
tACQ
ACQUIRE
RB2 RB3
Figure 7. Conversion Timing, 24-Clock per Conversion, 8-Bit Bus Interface
18151815 1
DCLK
DIN
DOUT
BUSY
SCONTROL BYTE 0 CONTROL BYTE 1 CONTROL BYTE 2SS
CONVERSION RESULT 0 CONVERSION RESULT 1
B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
CS
Figure 8. 15-Clock/Conversion Timing
MXB7843
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
______________________________________________________________________________________ 15
18 1618 16
DCLK
CONTROL BYTE 0 CONTROL BYTE 1S
CONVERSION RESULT 0 CONVERSION RESULT 1
B11 B10 B9 B8 B7 B6B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
DIN
DOUT
. . .
. . .
. . .
. . .
CS
. . .
S
BUSY
Figure 9. 16-Clock/Conversion Timing
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
START A2 A1 A0 MODE SER/DFR PD1 PD0
BIT NAME DESCRIPTION
7START Start bit
6A2
5A1
4A0
Address (Tables 1 and 2)
3MODE Conversion resolution. 1 = 8 bits, 0 = 12 bits.
2SER/DFR Conversion mode. 1 = single ended, 0 = differential.
1PD1
0PD0 Power-down mode (Table 4)
Table 3. Control Byte Format
SUPPLY CURRENT (typ) (µA)
PD1
PD0 PENIRQ
STATUS DURING
CONVERSION
AFTER
CONVERSION
00
Enabled ADC is ON during conversion, OFF between conversion
200 1
01
Disabled
ADC is always ON 200 200
10
Disabled
Reserved — —
11
Disabled
ADC is always ON 200 200
Table 4. Power Mode Selection
MXB7843
pointing device presses on the touch screen, the Y+
and Y- drivers are turned on, connecting one side of
the vertical resistive layer to VDD and the other side to
ground. In this case, the horizontal resistive layer func-
tions as a sense line. One side of this resistive layer
gets connected to the X+ input, while the other side is
left open or floating. The point where the touch screen
is pressed brings the two resistive layers in contact and
forms a voltage-divider at that point. The data converter
senses the voltage at the point of contact through the
X+ input and digitizes it. The horizontal layer resistance
does not introduce any error in the conversion because
no DC current is drawn.
The conversion process of the analog input voltage to
digital output is controlled through the serial interface
between the A/D converter and the µP. The processor
controls the MXB7843 configuration through a control
byte (Tables 3 and 4). Once the processor instructs the
MXB7843 to initiate a conversion, the MXB7843 biases
the touch screen through the internal switches at the
beginning of the acquisition period. The voltage transient
at the touch screen needs to settle down to a stable volt-
age before the acquisition period is over. After the acqui-
sition period is over, the A/D converter goes into a
conversion period with all internal switches turned off if
the device is in single-ended mode. If the device is in
differential mode, the internal switches remain on from
the start of the acquisition period to the end of the con-
version period.
Power-On Reset
When power is first applied, internal power-on circuitry
resets the MXB7843. Allow 10µs for the first conversion
after the power supplies stabilize. If CS is low, the first
logic 1 on DIN is interpreted as a start bit. Until a con-
version takes place, DOUT shifts out zeros.
Power Modes
Save power by placing the converter in one of two low-
current operating modes or in full power-down between
conversions. Select the power-down mode through
PD1 and PD0 of the control byte (Tables 3 and 4).
The software power-down modes take effect after the
conversion is completed. The serial interface remains
active while waiting for a new control byte to start a con-
version and switches to full-power mode. After complet-
ing its conversion, the MXB7843 enters the programmed
power mode until a new control byte is received.
The power-up wait before conversion period is depen-
dent on the power-down state. When exiting software
low-power modes, conversion can start immediately
when running at decreased clock rates. Upon power-
on reset, the MXB7843 is in power-down mode with
PD1 = 0 and PD0 = 0. When exiting software shutdown,
the MXB7843 is ready to perform a conversion in 10µs.
PD1 = 1, PD0 = 1
In this mode, the MXB7843 is always powered. The
device remains fully powered after the current conver-
sion completes.
PD1 = 0, PD0 = 0
In this mode, the MXB7843 powers down after the current
conversion completes or on the next rising edge of CS,
whichever occurs first. The next control byte received on
DIN powers up the MXB7843. At the start of a new con-
version, it instantly powers up. When each conversion is
finished, the part enters power-down mode, unless other-
wise indicated. The first conversion after the ADC returns
to full power is valid for differential conversions and sin-
gle-ended measurement conversions.
When operating at full speed and 16 clocks per conver-
sion, the difference in power consumption between
PD1 = 0, PD0 = 1, and PD1 = 0, PD0 = 0 is negligible.
Also, in the case where the conversion rate is
decreased by slowing the frequency of the DCLK input,
the power consumption between these two modes is
not very different. When the DCLK frequency is kept at
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
16 ______________________________________________________________________________________
OUTPUT CODE
FS = (VREF+ - VREF-)
FS-3/2LSB
FULL-SCALE
TRANSITION
INPUT VOLTAGE (LSB) = [(V+IN) - (V-IN)]
123 FS0
11…111
11…110
11…101
00…011
00…010
00…001
00…000
1LSB =
(VREF+ - VREF-)
4096
Figure 10. Ideal Input Voltages and Output Codes
the maximum rate during a conversion, conversions are
done less often. There is a significant difference in
power consumption between these two modes.
PD1 = 0, PD0 = 1
In this mode, the MXB7843 is powered down. This
mode becomes active after the current conversion
completes or on the next rising edge of CS, whichever
occurs first. The next command byte received on the
DIN returns the MXB7843 to full power. The first conver-
sion after the ADC returns to full power is valid.
PD1 = 1, PD0 = 0
This mode is reserved.
Hardware Power-Down
CS also places the MXB7843 into power-down. When
CS goes HIGH, the MXB7843 immediately powers
down and aborts the current conversion.
Touch-Screen Settling
There are two key touch-screen characteristics that can
degrade accuracy. First, the parasitic capacitance
between the top and bottom layers of the touch screen
can result in electrical ringing. Second, vibration of the
top layer of the touch screen can cause mechanical
contact bouncing.
External filter capacitors may be required across the
touch screen to filter noise induced by the LCD panel
or backlight circuitry, etc. These capacitors lengthen
the settling time required when the panel is touched
and can result in a gain error, as the input signal may
not settle to its final steady-state value before the ADC
samples the inputs. Two methods to minimize or elimi-
nate this issue are described below.
One option is to lengthen the acquisition time by stopping
or slowing down DCLK, allowing for the required touch-
screen settling time. This method solves the settling time
problem for both single-ended and differential modes.
The second option is to operate the MXB7843 in the dif-
ferential mode only for the touch screen, and perform
additional conversions with the same address until the
input signal settles. The MXB7843 can then be placed
in the power-down state on the last measurement.
Connection to Standard Interface
MICROWIRE Interface
When using the MICROWIRE- (Figure 11) or SPI-com-
patible interface (Figure 12), set the CPOL = CPHA = 0.
Two consecutive 8-bit readings are necessary to obtain
the entire 12-bit result from the ADC. DOUT data transi-
tions occur on the serial clock’s falling edge and are
clocked into the µP on the DCLK’s rising edge. The first
8-bit data stream contains the first 8-bits of the current
conversion, starting with the MSB. The second 8-bit
data stream contains the remaining 4 result bits fol-
lowed by 4 trailing zeros. DOUT then goes high imped-
ance when CS goes high.
QSPI/SPI Interface
The MXB7843 can be used with the QSPI/SPI interface
using the circuit in Figure 12 with CPOL = 0 and CPHA
= 0. This interface can be programmed to do a conver-
sion on any analog input of the MXB7843.
TMS320LC3x Interface
Figure 13 shows an example circuit to interface the
MXB7843 to the TMS320. The timing diagram for this
interface circuit is shown in Figure 14.
Use the following steps to initiate a conversion in the
MXB7843 and to read the results:
1) The TMS320 should be configured with CLKX (trans-
mit clock) as an active-high output clock and CLKR
(TMS320 receive clock) as an active-high input
clock. CLKX and CLKR on the TMS320 are connect-
ed to the MXB7843 DCLK input.
2) The MXB7843’s CS pin is driven low by the
TMS320’s XF I/O port to enable data to be clocked
into the MXB7843’s DIN pin.
3) An 8-bit word (1XXXXXXX) should be written to the
MXB7843 to initiate a conversion and place the
device into normal operating mode. See Table 3 to
select the proper XXXXXXX bit values for your spe-
cific application.
4) The MXB7843’s BUSY output is monitored through
the TMS320’s FSR input. A falling edge on the
BUSY output indicates that the conversion is in
progress and data is ready to be received from the
devices.
5) The TMS320 reads in 1 data bit on each of the next
16 rising edges of DCLK. These bits represent the
12-bit conversion result followed by 4 trailing bits.
6) Pull CS high to disable the MXB7843 until the next
conversion is initiated.
Layout, Grounding, and Bypassing
For best performance, use printed circuit (PC) boards
with good layouts; wire-wrap boards are not recommend-
ed. Board layout should ensure that digital and analog
signal lines are separated from each other. Do not run
analog and digital (especially clock) lines parallel to one
another, or digital lines underneath the ADC package.
Establish a single-point analog ground (star ground
point) at GND. Connect all analog grounds to the star
MXB7843
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
______________________________________________________________________________________ 17
MXB7843
ground. Connect the digital system ground to the star
ground at this point only. For lowest noise operation,
minimize the length of the ground return to the star
ground’s power supply.
Power-supply decoupling is also crucial for optimal
device performance. Analog supplies can be decou-
pled by placing a 10µF tantalum capacitor in parallel
with a 0.1µF capacitor bypassed to GND. To maximize
performance, place these capacitors as close as possi-
ble to the supply pin of the device. Minimize capacitor
lead length for best supply-noise rejection. If the supply
is very noisy, a 10Ωresistor can be connected in series
as a lowpass filter.
While using the MXB7843, the interconnection between
the converter and the touch screen should be as short
as possible. Since touch screens have low resistance,
longer or loose connections may introduce error. Noise
can also be a major source of error in touch-screen
applications (e.g., applications that require a backlight
LCD panel). EMI noise coupled through the LCD panel
to the touch screen may cause flickering of the convert-
ed data. Utilizing a touch screen with a bottom-side
metal layer connected to ground decouples the noise
to ground. In addition, the filter capacitors from Y+, Y-,
X+, and X- inputs to ground also help further reduce
the noise. Caution should be observed for settling time
of the touch screen, especially operating in the single-
ended measurement mode and at high data rates.
Definitions
Integral Nonlinearity
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. This
straight line can be either a best-straight-line fit or a line
drawn between the endpoints of the transfer function,
once offset and gain errors have been nullified. The
static linearity parameters for the MXB7843 are mea-
sured using the end-point method.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1LSB. A
DNL error specification of less than 1LSB guarantees
no missing codes and a monotonic transfer function.
Aperture Jitter
Aperture jitter (tAJ) is the sample-to-sample variation in
the time between the samples.
Aperture Delay
Aperture delay (tAD) is the time defined between the
falling edge of the sampling clock and the instant when
an actual sample is taken.
Chip Information
TRANSISTOR COUNT: 12,000
PROCESS: 0.6µm BiCMOS
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
18 ______________________________________________________________________________________
MICROWIRE
I/O
SCK
MOSI
MASKABLE
INTERRUPT
MISO
CS
DCLK
DIN
BUSY
DOUT
MXB7843
Figure 11. MICROWIRE Interface
QSPI/SPI
I/O
SCK
MOSI
MASKABLE
INTERRUPT
MISO
CS
DCLK
DIN
BUSY
DOUT
MXB7843
Figure 12. QSPI/SPI Interface
TMS320LC3x
XF
CLKX
DR
DX
FSR
CLKR
CS
SCLK
DIN
BUSY
DOUT
MXB7843
Figure 13. TMS320 Serial Interface
MXB7843
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
______________________________________________________________________________________ 19
CS
DIN
BUSY
HIGH IMPEDANCE
HIGH IMPEDANCE
DOUT
DCLK
START A2 A1 A0 MODE SER/DEF PD1 PD0
MSB B10 B1 B0
Figure 14. MXB7843-to-TMS320 Serial Interface Timing Diagram
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
VDD SERIAL/CONVERSION CLOCK
CHIP SELECT
SERIAL DATA IN
CONVERTER STATUS
SERIAL DATA OUT
PEN INTERRUPT
50kΩ
X+
Y+
X-
Y-
GND
IN3
IN4
TOUCH
SCREEN
2.375V TO 5.5V
1µF TO 10µF
OPTIONAL
0.1µF
0.1µF
MXB7843
DCLK
CS
DIN
PENIRQ
BUSY
DOUT
VDD
REF
Typical Application Circuit
MXB7843
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
20 ______________________________________________________________________________________
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
QSOP.EPS
E
1
1
21-0055
PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH
MXB7843
2.375V to 5.25V, 4-Wire Touch-Screen
Controller
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 21
©2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
TSSOP4.40mm.EPS
PACKAGE OUTLINE, TSSOP 4.40mm BODY
21-0066 1
1
G