1White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
WS512K32-XXX
May 2006
Rev. 17
I/O
8
I/O
9
I/O
10
A
13
A
14
A
15
A
16
A
17
I/O
0
I/O
1
I/O
2
1 12 23 34 45 56
11 22 33 44 55 66
WE
2
#
CS
2
#
GND
I/O
11
A
10
A
11
A
12
V
CC
CS
1
#
NC
I/O
3
I/O
31
I/O
30
I/O
29
I/O
28
A
0
A
1
A
2
I/O
23
I/O
22
I/O
21
I/O
20
V
CC
CS
4
#
WE
4
#
I/O
27
A
3
A
4
A
5
WE
3
#
CS
3
GND
I/O
19
I/O
24
I/O
25
I/O
26
A
6
A
7
NC
A
8
A
9
I/O
16
I/O
17
I/O
18
I/O
15
I/O
14
I/O
13
I/O
12
OE#
A
18
WE
1
#
I/O
7
I/O
6
I/O
5
I/O
4
512Kx32 SRAM MODULE, SMD 5962-94611
Access Times of 15, 17, 20, 25, 35, 45, 55ns
Packaging
• 66 pin, PGA Type, 1.075" square, Hermetic
Ceramic HIP (Package 400).
• 68 lead, 40mm Hermetic Low Profi le CQFP,
3.5mm (0.140") (Package 502)1
• 68 lead, Hermetic CQFP (G2U), 22.4mm
(0.880") square (Package 510) 3.56mm
(0.140") height.
• 68 lead, Hermetic CQFP (G2L), 22.4mm
(0.880") square, 5.08mm (0.200") high
(Package 528).
Organized as 512Kx32, User Confi gurable as
1Mx16 or 2Mx8
Commercial, Industrial and Military Temperature
Ranges
FIGURE 1 – PIN CONFIGURATION FOR WS512K32N-XH1X
Pin Description
I/O0-31 Data Inputs/Outputs
A0-18 Address Inputs
WE1-4# Write Enables
CS1-4# Chip Selects
OE# Output Enable
VCC Power Supply
GND Ground
NC Not Connected
WE1# CS1#
512K X 8
8888
512K X 8 512K X 8 512K X 8
OE#
A0-18
I/O0 - 7 I/O8 - 15 I/O16 - 23 I/O24 - 31
WE2# CS2#WE
3# CS3#WE
4# CS4#
Top View
Block Diagram
TTL Compatible Inputs and Outputs
5 Volt Power Supply
Low Power CMOS
Built-in Decoupling Caps and Multiple Ground Pins
for Low Noise Operation
Weight
WS512K32N-XH1X - 13 grams typical
WS512K32-XG2UX - 8 grams typical
WS512K32-XG4TX1 - 20 grams typical
WS512K32-XG2LX - 8 grams typical
* This product is subject to change without notice.
Note 1: Package Not Recommended For New Design
FEATURES
2White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
WS512K32-XXX
May 2006
Rev. 17
FIGURE 2 – PIN CONFIGURATION FOR WS512K32-XG4TX1
FIGURE 3 – PIN CONFIGURATION FOR WS512K32-XG2UX AND WS512K32-XG2LX
Top View Pin Description
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
V
CC
A
11
A
12
A
13
A
14
A
15
A
16
CS
1
#
OE#
CS
2
#
A
17
WE
2
#
WE
3
#
WE
4
#
A
18
NC
NC
NC
A
0
A
1
A
2
A
3
A
4
A
5
CS
3
#
GND
CS
4
#
WE
1
#
A
6
A
7
A
8
A
9
A
10
V
CC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
Block Diagram
WE
1
# CS
1
#
512K X 8
8888
512K X 8 512K X 8 512K X 8
OE#
A
0-18
I/O
0 - 7
I/O
8 - 15
I/O
16 - 23
I/O
24 - 31
WE
2
# CS
2
#WE
3
# CS
3
#WE
4
# CS
4
#
I/O0-31 Data Inputs/Outputs
A0-18 Address Inputs
WE1-4# Write Enables
CS1-4# Chip Selects
OE# Output Enable
VCC Power Supply
GND Ground
NC Not Connected
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
GND
I/O8
I/O9
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
I/O16
I/O17
I/O18
I/O19
I/O20
I/O21
I/O22
I/O23
GND
I/O24
I/O25
I/O26
I/O27
I/O28
I/O29
I/O30
I/O31
VCC
A11
A12
A13
A14
A15
A16
CS1#
OE#
CS2#
A17
NC
NC
NC
A18
NC
NC
NC
A0
A1
A2
A3
A4
A5
CS3#
GND
CS4#
WE#
A6
A7
A8
A9
A10
VCC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
Top View
512K X 8
8888
512K X 8 512K X 8 512K X 8
WE#
OE#
A
0-18
CS
1
#CS
2
#CS
3
#CS
4
#
I/O
0 - 7
I/O
8 - 15
I/O
16 - 23
I/O
24 - 31
Block Diagram
Note 1: Package Not Recommended For New Design
Pin Description
I/O0-31 Data Inputs/Outputs
A0-18 Address Inputs
WE# Write Enables
CS1-4# Chip Selects
OE# Output Enable
VCC Power Supply
GND Ground
NC Not Connected
3White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
WS512K32-XXX
May 2006
Rev. 17
Parameter Symbol Min Max Unit
Operating Temperature TA-55 +125 °C
Storage Temperature TSTG -65 +150 °C
Signal Voltage Relative to GND VG-0.5 VCC+0.5 V
Junction Temperature TJ150 °C
Supply Voltage VCC -0.5 7.0 V
TRUTH TABLE
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Min Max Unit
Supply Voltage VCC 4.5 5.5 V
Input High Voltage VIH 2.2 VCC + 0.3 V
Input Low Voltage VIL -0.5 +0.8 V
Operating Temp (Mil) TA-55 +125 °C
Parameter Symbol Conditions Min Max Units
Input Leakage Current ILI VCC = 5.5, VIN = GND to VCC 10 µA
Output Leakage Current ILO CS# = VIH, OE# = VIH, VOUT = GND to VCC 10 µA
Operating Supply Current x 32 Mode ICC x 32 CS# = VIL, OE# = VIH, f = 5MHz, VCC = 5.5 660 mA
Standby Current ISB CS# = VIH, OE# = VIH, f = 5MHz, VCC = 5.5 80 mA
Output Low Voltage VOL IOL = 6mA for 15 - 35ns,
IOL = 2.1mA for 45 - 55ns, VCC = 4.5
0.4 V
Output High Voltage VOH IOH = -4.0mA for 15 - 35ns,
IOH = -1.0mA for 45 - 55ns, VCC = 4.5
2.4 V
DC CHARACTERISTICS
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
DATA RETENTION CHARACTERISTICS
(Ta = -55°C to +125°C)
Parameter Symbol Conditions Min Max Units
Data Retention Supply Voltage VDR CS ≥ VCC − 0.2V 2.0 5.5 V
Data Retention Current ICCDR1 VCC = 3V 28 mA
Low Power Data Retention Current
(WS512K32L-XXX)
ICCDR2 VCC = 3V 16 mA
CS OE WE Mode Data I/O Power
H X X Standby High Z Standby
L L H Read Data Out Active
L H H Out Disable High Z Active
L X L Write Data In Active
CAPACITANCE
Ta = +25°C
Parameter
Symbol
Conditions Max Unit
OE# capacitance COE
VIN = 0 V, f = 1.0 MHz
50 pF
WE1-4# capacitance
HIP (PGA)
CWE
VIN = 0 V, f = 1.0 MHz
20
pF
CQFP G4T 50
CQFP G2U/G2L 20
CS1-4# capacitance CCS
VIN = 0 V, f = 1.0 MHz
20 pF
Data I/O capacitance CI/O
VI/O = 0 V, f = 1.0 MHz
20 pF
Address input capacitance CAD
VIN = 0 V, f = 1.0 MHz
50 pF
This parameter is guaranteed by design but not tested.
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V
4White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
WS512K32-XXX
May 2006
Rev. 17
AC CHARACTERISTICS
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
FIGURE. 4 – AC TEST CIRCUIT
V
Z
≈ 1.5V
(Bipolar Supply)
I
OL
Current Source
D.U.T.
C
eff
= 50 pf
Current Source
I
OH
AC Test Conditions
Parameter Typ Unit
Input Pulse Levels VIL = 0, VIH = 3.0 V
Input Rise and Fall 5 ns
Input and Output Reference Level 1.5 V
Output Timing Reference Level 1.5 V
Notes:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 Ω.
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
Parameter
Write Cycle Symbol -15 -17 -20 -25 -35 -45 -55 Units
Min Max Min Max Min Max Min Max Min Max Min Max Min Max
Write Cycle Time tWC 15 17 20 25 35 45 55 ns
Chip Select to End of Write tCW 13 15 15 17 25 35 50 ns
Address Valid to End of Write tAW 13 15 15 17 25 35 50 ns
Data Valid to End of Write tDW 10 11 12 13 20 25 25 ns
Write Pulse Width tWP 13 15 15 17 25 35 40 ns
Address Setup Time tAS 2222222ns
Address Hold Time tAH 0000055ns
Output Active from End of Write tOW12234455ns
Write Enable to Output in High Z tWHZ18 9 11 13 15 20 20 ns
Data Hold Time tDH 0000000ns
Parameter
Read Cycle Symbol -15 -17 -20 -25 -35 -45 -55 Units
Min Max Min Max Min Max Min Max Min Max Min Max Min Max
Read Cycle Time tRC 15 17 20 25 35 45 55 ns
Address Access Time tAA 15 17 20 25 35 45 55 ns
Output Hold from Address Change tOH 0000000ns
Chip Select Access Time tACS 15 17 20 25 35 45 55 ns
Output Enable to Output Valid tOE 8 9 10 12 25 25 25 ns
Chip Select to Output in Low Z tCLZ12222444ns
Output Enable to Output in Low Z tOLZ10000000ns
Chip Disable to Output in High Z tCHZ112 12 12 12 15 20 20 ns
Output Disable to Output in High Z tOHZ112 12 12 12 15 20 20 ns
1. This parameter is guaranteed by design but not tested.
1. This parameter is guaranteed by design but not tested.
2. The Address Setup Time of minimum 2ns is for the G2U, G1U and H1 packages. tAS minimum for the G4T package is 0ns.
AC CHARACTERISTICS
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
5White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
WS512K32-XXX
May 2006
Rev. 17
WS32K32-XHX
FIGURE 5 – TIMING WAVEFORM - READ CYCLE
FIGURE 7 – WRITE CYCLE - CS# CONTROLLED
WRITE CYCLE 2, CS# CONTROLLED
CS#
WE#
READ CYCLE 2 (WE# = VIH)
CS#
OE#
READ CYCLE 2, (CS# = OE# = V
IL
, WE# = V
IH
)
WRITE CYCLE 2, CS# CONTROLLED
CS#
WE#
FIGURE 6 – WRITE CYCLE - WE# CONTROLLED
6White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
WS512K32-XXX
May 2006
Rev. 17
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 400: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)
4.60 (0.181)
MAX
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
Note 1: Package Not
Recommended
For New Design
PACKAGE 502: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G4T)1
7White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
WS512K32-XXX
May 2006
Rev. 17
PACKAGE 510: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2U)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
25.15 (0.990) ± 0.25 (0.010) MAX
22.36 (0.880) ± 0.25 (0.010) MAX
20.31 (0.800) REF
0.38 (0.015) ± 0.05 (0.002)
1.27 (0.050) TYP
5.10 (0.200) MAX
0.25 (0.010) ± 0.10 (0.002)
24.0 (0.946)
± 0.25 (0.010)
0.23 (0.009) REF
R 0.127
(0.005)
2
O
/ 9
O
1.01 (0.040)
± 0.13 (0.005)
1.37 (0.054) MIN 0.004
PACKAGE 528: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2L)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
0.940" TYP
8White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
WS512K32-XXX
May 2006
Rev. 17
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
DEVICE GRADE:
Q = MIL-STD-883 Compliant
M = Military Screened -55°C to +125°C
I = Industrial -40°C to 85°C
C = Commercial 0°C to +70°C
PACKAGE TYPE:
H1 = Ceramic Hex-In-line Package, HIP (Package 400)
G2U = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 510)
G2L = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 528)
G4T1 = 40mm Low Profi le CQFP (Package 502)
ACCESS TIME (ns)
IMPROVEMENT MARK:
Blank = Standard Power
N = No Connect at pin 21 and 39 in HIP for Upgrades
L = Low Power Data Retention
ORGANIZATION, 512Kx32
User confi gurable as 1Mx16 or 2Mx8
SRAM
WHITE ELECTRONIC DESIGNS CORP.
W S 512K 32 X - XXX X X X
Note 1: Package Not Recommended For New Design
ORDERING INFORMATION
9White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
WS512K32-XXX
May 2006
Rev. 17
DEVICE TYPE SPEED PACKAGE SMD NO.
512K x 32 SRAM Module 55ns 66 pin HIP (H1) 5962-94611 05HTX
512K x 32 SRAM Module 45ns 66 pin HIP (H1) 5962-94611 06HTX
512K x 32 SRAM Module 35ns 66 pin HIP (H1) 5962-94611 07HTX
512K x 32 SRAM Module 25ns 66 pin HIP (H1) 5962-94611 08HTX
512K x 32 SRAM Module 20ns 66 pin HIP (H1) 5962-94611 09HTX
512K x 32 SRAM Module 17ns 66 pin HIP (H1) 5962-94611 10HTX
512K x 32 SRAM Module 15ns 66 pin HIP (H1) 5962-94611 19HTX
512K x 32 SRAM Module 55ns 68 lead CQFP Low Profi le (G4T)15962-94611 05HYX
512K x 32 SRAM Module 45ns 68 lead CQFP Low Profi le (G4T)15962-94611 06HYX
512K x 32 SRAM Module 35ns 68 lead CQFP Low Profi le (G4T)15962-94611 07HYX
512K x 32 SRAM Module 25ns 68 lead CQFP Low Profi le (G4T)15962-94611 08HYX
512K x 32 SRAM Module 20ns 68 lead CQFP Low Profi le (G4T)15962-94611 09HYX
512K x 32 SRAM Module 17ns 68 lead CQFP Low Profi le (G4T)15962-94611 10HYX
512K x 32 SRAM Module 55ns 68 lead CQFP (G2U) 5962-94611 05HMX
512K x 32 SRAM Module 45ns 68 lead CQFP (G2U) 5962-94611 06HMX
512K x 32 SRAM Module 35ns 68 lead CQFP (G2U) 5962-94611 07HMX
512K x 32 SRAM Module 25ns 68 lead CQFP (G2U) 5962-94611 08HMX
512K x 32 SRAM Module 20ns 68 lead CQFP (G2U) 5962-94611 09HMX
512K x 32 SRAM Module 17ns 68 lead CQFP (G2U) 5962-94611 10HMX
512K x 32 SRAM Module 15ns 66 pin HIP (H1) 5962-94611 19HMX
512K x 32 SRAM Module 55ns 68 lead CQFP (G2L) 5962-94611 05HAX
512K x 32 SRAM Module 45ns 68 lead CQFP (G2L) 5962-94611 06HAX
512K x 32 SRAM Module 35ns 68 lead CQFP (G2L) 5962-94611 07HAX
512K x 32 SRAM Module 25ns 68 lead CQFP (G2L) 5962-94611 08HAX
512K x 32 SRAM Module 20ns 68 lead CQFP (G2L) 5962-94611 09HAX
512K x 32 SRAM Module 17ns 68 lead CQFP (G2L) 5962-94611 10HAX
512K x 32 SRAM Module 15ns 66 pin HIP (H1) 5962-94611 19HAX
Note 1: Package Not Recommended For New Design
10 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
WS512K32-XXX
May 2006
Rev. 17
Document Title
512K x 32 SRAM Multi-Chip Package
Revision History
Rev # History
Release Date Status
Initial October 1996 Preliminary
Change (Pg. 1, 3) January 1997 Preliminary
1.1 Change Operation Supply Current from 520mA To 540mA
1.2 Change Data Retention Current from 12mA to 28mA.
Change (Pg. 1, 2, 8, 10, 11) November 1997 Preliminary
1.1 Delete G2 Package
Change (Pg. 1, 9) February 1998 Preliminary
1.1 Add SMD Case Outline M for G2T
Change (Pg. 1, 3, 8) April 1998 Preliminary
1.1 Remove Low Capacitance package option
Change (Pg. 1, 6, 8) December 1998 Preliminary
1.1 Add H1 package
Change (Pg. 1, 4, 6, 9, 10) March 1999 Preliminary
1.1 Remove H2 package
1.2 Change logo to WEDC logo
Rev 2 Change (Pg. 1, 3, 4, 8) May 1999 Final
1.1 Change status from Preliminary to Final
1.2 Make package descriptions consistent
1.3 Add 15ns as available in Commercial and Industrial Temperatures only.
Rev 4 Change (Pg. 1, 3) June 1999 Final
1.1 Change Standby Current (Isb) from 60mA to 80mA Maximum
Rev 5 Change (Pg. 1, 2, 3, 4, 7, 8) November 1999 Final
1.1 Add G1U package
Rev 6 Change (Pg. 1, 8) February 2000 Final
1.1 Change G1U lead foot length from 0.64mm to 0.84mm Ref
11 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
WS512K32-XXX
May 2006
Rev. 17
Rev 7 Change (Pg. 1, 3, 9) October 2000 Final
1.1 Change Operating Supply Current from 540mA to 660mA Maximum
1.2 Add Low Power Data Retention Current of 16mA to Data Retention Characteristics table
1.3 Add Low Power Data Retention (L) option to Ordering Information
Rev 8 Change (Pg. 1, 2, 6, 7, 9, 10) October 2001 Final
1.1 Change G2T and G4T package status to Not Recommended For New Design
Rev 9 Change (Pg. 1, 2, 3, 8, 9, 10) November 2001 Final
1.1 Add G1T package
1.2 Remove ‘Hi-Reliability Product’ Title
Rev 10 Change (Pg. 1, 2, 3, 4, 7, 8, 9, 10, 11) August 2002 Final
1.1 Remove G2T package
1.2 Add G2U package
1.3 Remove ‘Package to be Developed’ note for G4T
Rev 11 Change (Pg. 1,2,4,8,10,11,13) February 2002 Final
1.1 Change G1U package status to Not Recommended For New Designs
Rev 12 Change (Pg. 1,2,3,7,8,10,11,13) May 2003 Final
1.1 Add G2L package
Rev 13 Change (Pg. 1,2,3,7,8,10,11,13) December 2003 Final
1.1 Remove all reference to G1U package
1.2 Remove all reference to G1T package
Rev 14 Change (Pg. 1,3,11) May 2004 Final
1.1 Change IOL to 6mA for 15-35 ns
Rev 15 Change (Pg. 1,4,11) November 2004 Final
1.1 Add 15ns for Military Temperature
Rev 16 Change (Pg. 1, 6, 11)
1.1 Correct thickness to 0.181"per PCN#140A00143 March 2006 Final
Rev 17 Change ( Pg. 1, 2, 11) May 2006 Final
1.1 Correct pinout of G4T
1.2 Correct G2L foot length
