© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 9/23/2013 1
One world. One KEMET
Benets
-55°C to +125°C operating temperature range
RoHS Compliant
EIA 0201, 0402, 0603, 0805, 1206, 1210, 1808, 1812, 1825,
2220, and 2225 case sizes
DC voltage ratings of 10 V, 16 V, 25 V, 50 V, 100 V, and 200 V
• Capacitanceofferingsrangingfrom0.5pFupto0.47μF
Available capacitance tolerances of ±0.10 pF, ±0.25 pF, ±0.5
pF, ±1%, ±2%, ±5%, ±10%, and ±20%
No piezoelectric noise
Extremely low ESR and ESL
High thermal stability
High ripple current capability
Preferred capacitance solution at line frequencies and into the
MHz range
No capacitance change with respect to applied rated DC voltage
Negligible capacitance change with respect to temperature from
-55°C to +125°C
No capacitance decay with time
Non-polar device, minimizing installation concerns
• 100%puremattetin-platedterminationnishallowingfor
excellent solderability
SnPbplatedterminationnishoptionavailableuponrequest(5%
minimum)
Overview
KEMET’s C0G dielectric features a 125°C maximum operating
temperature and is considered “stable.” The Electronics
Components, Assemblies & Materials Association (EIA)
characterizes C0G dielectric as a Class I material. Components
ofthisclassicationaretemperaturecompensatingandare
suited for resonant circuit applications or those where Q and
stability of capacitance characteristics are required. C0G exhibits
no change in capacitance with respect to time and voltage and
boasts a negligible change in capacitance with reference to
ambient temperature. Capacitance change is limited to ±30
ppm/ºC from -55°C to +125°C.
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
C0G Dielectric, 10 – 200 VDC (Commercial Grade)
Ordering Information
C1206 C104 J 3 G A C TU
Ceramic Case Size
(L" x W")
Specication/
Series1
Capacitance
Code (pF)
Capacitance
Tolerance2Voltage Dielectric Failure Rate/
Design Termination Finish3Packaging/Grade
(C-Spec)4
0201
0402
0603
0805
1206
1210
1808
1812
1825
2220
2225
C = Standard 2signicantdigits+
number of zeros.
Use 9 for 1.0 – 9.9 pF
Use 8 for 0.5 – .99 pF
e.g., 2.2 pF = 229
e.g., 0.5 pF = 508
B = ±0.10 pF
C = ±0.25 pF
D = ±0.5 pF
F = ±1%
G = ±2%
J = ±5%
K = ±10%
M = ±20%
8 = 10 V
4 = 16 V
3 = 25 V
5 = 50 V
1 = 100 V
2 = 200 V
G = C0G A = N/A C = 100% Matte Sn Blank = Bulk
TU = 7" Reel
Unmarked
1 Flexible termination option is available. Please see FT-CAP product bulletin C1062_C0G_FT-CAP_SMD
2 Additional capacitance tolerance offerings may be available. Contact KEMET for details.
3 Additional termination nish options may be available. Contact KEMET for details.
4 Additional reeling or packaging options may be available. Contact KEMET for details.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 9/23/2013 2
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade)
Dimensions – Millimeters (Inches)
Ceramic Surface Mount
WL
TB
S
100% Tin or SnPb Plate
Nickel Plate
Conductive Metalization
Electrodes
EIA
Size
Code
Metric
Size
Code
L
Length
W
Width
T
Thickness
B
Bandwidth
S
Separation
Minimum
Mounting
Technique
0201 0603 0.60 (.024) ± 0.03 (.001) 0.30 (.012) ± 0.03 (.001)
See Table 2 for
Thickness
0.15 (.006) ± 0.05 (.002) N/A
SolderReowOnly
0402 1005 1.00 (.040) ± 0.05 (.002) 0.50 (.020) ± 0.05 (.002) 0.30 (.012) ± 0.10 (.004) 0.30 (.012)
0603 1608 1.60 (.063) ± 0.15 (.006) 0.80 (.032) ± 0.15 (.006) 0.35 (.014) ± 0.15 (.006) 0.70 (.028)
Solder Wave or
SolderReow
0805 2012 2.00 (.079) ± 0.20 (.008) 1.25 (.049) ± 0.20 (.008) 0.50 (0.02) ± 0.25 (.010) 0.75 (.030)
1206 3216 3.20 (.126) ± 0.20 (.008) 1.60 (.063) ± 0.20 (.008) 0.50 (0.02) ± 0.25 (.010)
N/A
1210 3225 3.20 (.126) ± 0.20 (.008) 2.50 (.098) ± 0.20 (.008) 0.50 (0.02) ± 0.25 (.010)
SolderReowOnly
1808 4520 4.70 (.185) ± 0.50 (.020) 2.00 (.079) ± 0.20 (.008) 0.60 (.024) ± 0.35 (.014)
1812 4532 4.50 (.177) ± 0.30 (.012) 3.20 (.126) ± 0.30 (.012) 0.60 (.024) ± 0.35 (.014)
1825 4564 4.50 (.177) ± 0.30 (.012) 6.40 (.252) ± 0.40 (.016) 0.60 (.024) ± 0.35 (.014)
2220 5650 5.70 (.224) ± 0.40 (.016) 5.00 (.197) ± 0.40 (.016) 0.60 (.024) ± 0.35 (.014)
2225 5664 5.60 (.220) ± 0.40 (.016) 6.40 (.248) ± 0.40 (.016) 0.60 (.024) ± 0.35 (.014)
Applications
Typical applications include critical timing, tuning, circuits requiring low loss, circuits with pulse, high current, decoupling, bypass,
ltering,transientvoltagesuppression,blockingandenergystorage.
Qualication/Certication
CommercialGradeproductsaresubjecttointernalqualication.Detailsregardingtestmethodsandconditionsarereferencedin
Table 4, Performance and Reliability.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 9/23/2013 3
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade)
Environmental Compliance
RoHS Compliant.
Electrical Parameters/Characteristics
Item
Parameters/Characteristics
Operating Temperature Range -55°C to +125°C
Capacitance Change with Reference to +25°C and 0 VDC Applied (TCC) ±30 ppm/ºC
Aging Rate (Maximum % Capacitance Loss/Decade Hour) 0%
Dielectric Withstanding Voltage (DWV)
250% of rated voltage
(5 ±1 seconds and charge/discharge not exceeding 50 mA)
Dissipation Factor (DF) Maximum Limit @ 25ºC 0.1%
Insulation Resistance (IR) Limit @ 25°C 1,000megohmmicrofaradsor100GΩ
(Rated voltage applied for 120 ±5 seconds @ 25°C)
To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.
Capacitance and Dissipation Factor (DF) measured under the following conditions:
1 MHz ±100 kHz and 1.0 Vrms ±0.2 V if capacitance ≤ 1,000 pF
1 kHz ±50 Hz and 1.0 Vrms ±0.2 V if capacitance > 1,000 pF
Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known as
Automatic Level Control (ALC). The ALC feature should be switched to "ON."
Post Environmental Limits
High Temperature Life, Biased Humidity, Moisture Resistance
Dielectric Rated DC
Voltage
Capacitance
Value
Dissipation Factor
(Maximum %)
Capacitance
Shift
Insulation
Resistance
C0G All All 0.5
10% of Initial Limit
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 9/23/2013 4
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade)
xx¹ Available only in D, J, K,M tolerance
xx² Available only in J, K, M tolerance.
These products are protected under US Patents 7,172,985 & 7,670,981, other patents pending, and any foreign counterparts.
Capacitance Cap
Code
Series C0201 C0402 C0603 C0805 C1206
Voltage Code 843 8 4351 2 84351 2 84351 2 84351 2
Voltage DC
10
16
25
10
16
25
50
100
200
10
16
25
50
100
200
10
16
25
50
100
200
10
16
25
50
100
200
Capacitance
Tolerance
Product Availability and Chip Thickness Codes
See Table 2 for Chip Thickness Dimensions
0.50 - 0.75 pF 508-758 B C D BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC
1.0 - 9.1 pF 109-919 B C D BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
10 pF 100 F G J K M A AB¹ A BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
11 pF 110 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
12 pF 120 F G J K M AB² AB² A BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
13 pF 130 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
15 pF 150 F G J K M AB² AB² A BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
16 pF 160 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
18 pF 180 F G J K M AB² AB² A BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
20 pF 200 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
22 pF 220 F G J K M A AB² AB² BB BB BB BB CB CB CB CB CB CB DE DE DE DE DC DC EB EB EB EB EB EB
24 pF 240 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
27 pF 270 F G J K M AB² AB² A BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
30 pF 300 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
33 pF 330 F G J K M AB² A AB² BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
36 pF 360 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
39 pF 390 F G J K M AB² A AB² BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
43 pF 430 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
47 pF 470 F G J K M AB² A AB² BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
51 pF 510 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
56 pF 560 F G J K M AB² A AB² BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
62 pF 620 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
68 pF 680 F G J K M AB² A AB² BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
75 pF 750 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
82 pF 820 F G J K M AB² AB² AB² BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
91 pF 910 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
100 pF 101 F G J K M AB² AB² A BB BB BB BB BB CB CB CB CF CB CB DC DC DC DC DC DC EB EB EB EB EB EB
110-180 pF 111-181 F G J K M BB BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
200-300 pF 201-301 F G J K M BB BB BB BB BB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
330 pF 331 F G J K M BB BB BB BB BB CB CB CB CF CB DC DC DC DC DC DC EB EB EB EB EB EB
360 pF 361 F G J K M BB BB BB BB BB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
390 pF 391 F G J K M BB BB BB BB BB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
430 pF 431 F G J K M BB BB BB BB BB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
470 pF 471 F G J K M BB BB BB BB BB CB CB CB CB CB DC DC DC DC DC DD EB EB EB EB EB EB
510 pF 511 F G J K M BB BB BB BB BB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
560 pF 561 F G J K M BB BB BB BB BB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
620 pF 621 F G J K M BB BB BB BB BB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
680 pF 681 F G J K M BB BB BB BB BB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
750 pF 751 F G J K M BB BB BB BB BB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
820 pF 821 F G J K M BB BB BB BB BB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB
910 pF 911 F G J K M BB BB BB BB BB CB CB CB CB CB DC DC DC DC DD DD EB EB EB EB EB EB
1,000 pF 102 F G J K M BB BB BB BB BB CB CB CB CB CB DC DC DC DC DD DD EB EB EB EB EB EB
1,10 0 pF 112 F G J K M BB BB BB BB CB CB CB CB CB DC DC DC DC DC EB EB EB EB EB EB
1,200 pF 122 F G J K M BB BB BB BB CB CB CB CB CB DC DC DC DC DC EB EB EB EB EB EB
1,300 pF 132 F G J K M BB BB BB BB CB CB CB CB CB DD DD DD DD DD EB EB EB EB EC EC
1,500 pF 152 F G J K M BB BB BB BB CB CB CB CB CB DD DD DD DD DD EB EB EB EB ED EC
1,600 pF 162 F G J K M BB BB BB CB CB CB CB CB DD DD DD DD DD EB EB EB EB ED ED
1,800 pF 182 F G J K M BB BB BB CB CB CB CB CB DD DD DD DD DD EB EB EB EB ED ED
2,000 pF 202 F G J K M BB BB BB CB CB CB CB CB DC DC DC DC DC EB EB EB EB ED ED
2,200 pF 222 F G J K M BB BB BB CB CB CB CB CB DC DC DC DC DC EB EB EB EB EE EE
2,400 pF 242 F G J K M CB CB CB CB CB DC DC DC DC DC EB EB EB EB EC EC
2,700 pF 272 F G J K M CB CB CB CB CB DC DC DC DC DC EB EB EB EB EC EC
3,000 pF 302 F G J K M CB CB CB CB CB DD DD DD DD DC EC EC EC EC EC
3,300 pF 332 F G J K M CB CB CB CB CB DD DD DD DD DC EC EC EC EC EE
Capacitance Cap
Code
Voltage DC
10
16
25
10
16
25
50
100
200
10
16
25
50
100
200
10
16
25
50
100
200
10
16
25
50
100
200
Voltage Code 843 8 4351 2 84351 2 84351 2 84351 2
Series C0201 C0402 C0603 C0805 C1206
Table 1A – Capacitance Range/Selection Waterfall (0201 – 1206 Case Sizes)
Roll Over for
Order Info.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 9/23/2013 5
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade)
Table 1A – Capacitance Range/Selection Waterfall (0201 – 1206 Case Sizes) cont'd
Table 1B – Capacitance Range/Selection Waterfall (1210 – 2225 Case Sizes)
These products are protected under US Patents 7,172,985 & 7,670,981, other patents pending, and any foreign counterparts.
Capacitance Cap
Code
Series C0201 C0402 C0603 C0805 C1206
Voltage Code 843 8 4351 2 84351 2 84351 2 84351 2
Voltage DC
10
16
25
10
16
25
50
100
200
10
16
25
50
100
200
10
16
25
50
100
200
10
16
25
50
100
200
Capacitance
Tolerance
Product Availability and Chip Thickness Codes
See Table 2 for Chip Thickness Dimensions
3,600 pF 362 F G J K M CB CB CB CB CB DD DD DD DD DC EC EC EC EC EE
3,900 pF 392 F G J K M CB CB CB CB CB DE DE DE DE DC EC EC EC EC EF
4,300 pF 432 F G J K M CB CB CB CB CB DE DE DE DE DC EC EC EC EC EC
4,700 pF 472 F G J K M CB CB CB CB CB DE DE DE DE DC EC EC EC EC EC
5,100 pF 512 F G J K M CB CB CB CB DE DE DE DE DC ED ED ED ED ED
5,600 pF 562 F G J K M CB CB CB CB DC DC DC DC DC ED ED ED ED ED
6,200 pF 622 F G J K M CB CB CB CB DC DC DC DC DC EB EB EB EB EB
6,800 pF 682 F G J K M CB CB CB CB DC DC DC DC DC EB EB EB EB EB
7,500 p F 752 F G J K M CB CB CB DC DC DC DC DC EB EB EB EB EB
8,200 pF 822 F G J K M CB CB CB DC DC DC DC DC EC EC EC EC EB
9,100 pF 912 F G J K M CB CB CB DC DC DC DC DC EC EC EC EC EB
10,000 pF 103 F G J K M CB CB CB DC DC DC DC DD ED ED ED ED EB
12,000 pF 123 F G J K M CB CB CB DC DC DC DC DE EB EB EB EB EB
15,000 pF 153 F G J K M CB CB CB DC DC DC DD DG EB EB EB EB EB
18,000 pF 183 F G J K M DC DC DC DD EB EB EB EB EB
22,000 pF 223 F G J K M DD DD DD DF EB EB EB EB EC
27,000 pF 273 F G J K M DF DF DF EB EB EB EB EE
33,000 pF 333 F G J K M DG DG DG EB EB EB EB EE
39,000 pF 393 F G J K M DG DG DG EC EC EC EE EH
47,000 pF 473 F G J K M DG DG DG EC EC EC EE EH
56,000 pF 563 F G J K M ED ED ED EF
68,000 pF 683 F G J K M EF EF EF EH
82,000 pF 823 F G J K M EH EH EH EH
0.10 µF 104 F G J K M EH EH EH
Capacitance Cap
Code
Voltage DC
10
16
25
10
16
25
50
100
200
10
16
25
50
100
200
10
16
25
50
100
200
10
16
25
50
100
200
Voltage Code 843 8 4351 2 84351 2 84351 2 84351 2
Series C0201 C0402 C0603 C0805 C1206
Capacitance Cap
Code
Series C1210 C1808 C1812 C1825 C2220 C2225
Voltage Code 84351 2 51 2 51 2 51 2 31 2 51 2
Voltage DC
10
16
25
50
100
200
50
100
200
50
100
200
50
100
200
50
100
200
50
100
200
Capacitance
Tolerance
Product Availability and Chip Thickness Codes
See Table 2 for Chip Thickness Dimensions
1.0 - 9.1 pF 109-919 B C D FB FB FB FB FB FB
10-91 pF 100-910 F G J K M FB FB FB FB FB FB
100-300 pF 101-301 F G J K M FB FB FB FB FB FB
330-430 pF 331-431 F G J K M FB FB FB FB FB FB LF LF LF
470-910 pF 471-911 F G J K M FB FB FB FB FB FB LF LF LF GB GB GB
1,000 pF 102 F G J K M FB FB FB FB FB FB LF LF LF GB GB GB
1,10 0 pF 112 F G J K M FB FB FB FB FB FB LF LF LF GB GB GB
1,200 pF 122 F G J K M FB FB FB FB FB FB LF LF LF GB GB GB
1,300 pF 132 F G J K M FB FB FB FB FB FC LF LF LF GB GB GB
1,500 pF 152 F G J K M FB FB FB FB FB FE LF LF LF GB GB GB
1,600 pF 162 F G J K M FB FB FB FB FB FE LF LF LF GB GB GB
1,800 pF 182 F G J K M FB FB FB FB FB FE LF LF LF GB GB GB
2,000 pF 202 F G J K M FB FB FB FB FC FE LF LF LF GB GB GB
2,200 pF 222 F G J K M FB FB FB FB FC FG LF LF LF GB GB GB
2,400 pF 242 F G J K M FB FB FB FB FC FC LF LF LF
Capacitance Cap
Code
Voltage DC
10
16
25
50
100
200
50
100
200
50
100
200
50
100
200
50
100
200
50
100
200
Voltage Code 84351 2 51 2 51 2 51 2 31 2 51 2
Series C1210 C1808 C1812 C1825 C2220 C2225
Roll Over for
Order Info.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 9/23/2013 6
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade)
Capacitance Cap
Code
Series C1210 C1808 C1812 C1825 C2220 C2225
Voltage Code 84351 2 51 2 51 2 51 2 31 2 51 2
Voltage DC
10
16
25
50
100
200
50
100
200
50
100
200
50
100
200
50
100
200
50
100
200
Capacitance
Tolerance
Product Availability and Chip Thickness Codes
See Table 2 for Chip Thickness Dimensions
2,700 pF 272 F G J K M FB FB FB FB FC FC LF LF LF GB GB GB
3,000 pF 302 F G J K M FB FB FB FB FC FF LF LF
3,300 pF 332 F G J K M FB FB FB FB FF FF LF LF GB GB GB
3,600 pF 362 F G J K M FB FB FB FB FF FF LF LF
3,900 pF 392 F G J K M FB FB FB FB FF FF LF LF GB GB GB HB HB HB
4,300 pF 432 F G J K M FB FB FB FB FF FF LF LF
4,700 pF 472 F G J K M FF FF FF FF FG FG LF LF GB GB GD HB HB HB KE KE KE
5,100 pF 512 F G J K M FB FB FB FB FG FG KE KE KE
5,600 pF 562 F G J K M FB FB FB FB FG FG GB GB GH HB HB HB KE KE KE
6,200 pF 622 F G J K M FB FB FB FB FG KE KE KE
6,800 pF 682 F G J K M FB FB FB FB FG GB GB GJ HB HB HB JE JE KE KE KE
7,500 p F 752 F G J K M FC FC FC FC FC KE KE KE
8,200 pF 822 F G J K M FC FC FC FC FC GB GH HB HB HB JE JE KE KE KE
9,100 pF 912 F G J K M FE FE FE FE FE KE KE KE
10,000 pF 103 F G J K M FF FF FF FF FF GB GH HB HB HE JE JE KE KE KE
12,000 pF 123 F G J K M FG FG FG FG FB GB GG HB HB HE JE JE KE KE KE
15,000 pF 153 F G J K M FG FG FG FG FB GB GB HB HB JE JE KE KE KE
18,000 pF 183 F G J K M FB FB FB FB FB GB GB HB HE JE JE KE KE
22,000 pF 223 F G J K M FB FB FB FB FB GB GB HB HE JE JB KE KE
27,000 pF 273 F G J K M FB FB FB FB FB GB GB HB HG JE JB KE KE
33,000 pF 333 F G J K M FB FB FB FB FB GB GB JB JB KE
39,000 pF 393 FG J K M FB FB FB FB FE GB GB JB JB
47,000 pF 473 F G J K M FB FB FB FB FE GB GB JB JB
56,000 pF 563 F G J K M FB FB FB FB FF GB GB JB JB
68,000 pF 683 F G J K M FB FB FB FC FG GB GB JB JB
82,000 pF 823 F G J K M FC FC FC FF FH GB GB JB JB
0.10 µF 104 F G J K M FE FE FE FG FM GB GD JB JB
0.12 µF 124 F G J K M FG FG FG FH GB GH JB JB
0.15 µF 154 F G J K M FH FH FH FM GD GN JB JB
0.18 µF 184 F G J K M FJ FJ FJ GH JB JD
0.22 µF 224 F G J K M FK FK FK GK JB JD
0.27 µF 274 F G J K M JB JF
0.33 µF 334 F G J K M JD JG
0.39 µF 394 F G J K M JG
0.47 µF 474 F G J K M JG
Capacitance Cap
Code
Voltage DC
10
16
25
50
100
200
50
100
200
50
100
200
50
100
200
50
100
200
50
100
200
Voltage Code 84351 2 51 2 51 2 51 2 31 2 51 2
Series C1210 C1808 C1812 C1825 C2220 C2225
Table 1B – Capacitance Range/Selection Waterfall (1210 – 2225 Case Sizes) cont'd
These products are protected under US Patents 7,172,985 & 7,670,981, other patents pending, and any foreign counterparts.
Roll Over for
Order Info.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 9/23/2013 7
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade)
Table 2 – Chip Thickness/Packaging Quantities
Thickness
Code
Case
Size
Thickness ±
Range (mm)
Paper Quantity Plastic Quantity
7" Reel 13" Reel 7" Reel 13" Reel
AB
0201
0.30 ± 0.03
15,000
0
0
0
BB
0402
0.50 ± 0.05
10,000
50,000
0
0
CB
0603
0.80 ± 0.07
4,000
10,000
0
0
CF
0603
0.80 ± 0.07
4,000
15,000
0
0
DE
0805
0.70 ± 0.20
4,000
10,000
0
0
DC
0805
0.78 ± 0.10
4,000
10,000
0
0
DD
0805
0.90 ± 0.10
4,000
10,000
0
0
DF
0805
1.10 ± 0.10
0
0
2,500
10,000
DG
0805
1.25 ± 0.15
0
0
2,500
10,000
EB
1206
0.78 ± 0.10
4,000
10,000
4,000
10,000
EC
1206
0.90 ± 0.10
0
0
4,000
10,000
ED
1206
1.00 ± 0.10
0
0
2,500
10,000
EE
1206
1.10 ± 0.10
0
0
2,500
10,000
EF
1206
1.20 ± 0.15
0
0
2,500
10,000
EH
1206
1.60 ± 0.20
0
0
2,000
8,000
FB
1210
0.78 ± 0.10
0
0
4,000
10,000
FC
1210
0.90 ± 0.10
0
0
4,000
10,000
FE
1210
1.00 ± 0.10
0
0
2,500
10,000
FF
1210
1.10 ± 0.10
0
0
2,500
10,000
FG
1210
1.25 ± 0.15
0
0
2,500
10,000
FH
1210
1.55 ± 0.15
0
0
2,000
8,000
FM
1210
1.70 ± 0.20
0
0
2,000
8,000
FJ
1210
1.85 ± 0.20
0
0
2,000
8,000
FK
1210
2.10 ± 0.20
0
0
2,000
8,000
NC
1706
1.00 ± 0.15
0
0
4,000
10,000
LF
1808
1.00 ± 0.15
0
0
2,500
10,000
GB
1812
1.00 ± 0.10
0
0
1,000
4,000
GD
1812
1.25 ± 0.15
0
0
1,000
4,000
GH
1812
1.40 ± 0.15
0
0
1,000
4,000
GG
1812
1.55 ± 0.10
0
0
1,000
4,000
GK
1812
1.60 ± 0.20
0
0
1,000
4,000
GJ
1812
1.70 ± 0.15
0
0
1,000
4,000
GN
1812
1.70 ± 0.20
0
0
1,000
4,000
HB
1825
1.10 ± 0.15
0
0
1,000
4,000
HE
1825
1.40 ± 0.15
0
0
1,000
4,000
HG
1825
1.60 ± 0.20
0
0
1,000
4,000
JB
2220
1.00 ± 0.15
0
0
1,000
4,000
JD
2220
1.30 ± 0.15
0
0
1,000
4,000
JE
2220
1.40 ± 0.15
0
0
1,000
4,000
JF
2220
1.50 ± 0.15
0
0
1,000
4,000
JG
2220
1.70 ± 0.15
0
0
1,000
4,000
KE
2225
1.40 ± 0.15
0
0
1,000
4,000
Thickness
Code
Case
Size
Thickness ±
Range (mm)
7" Reel 13" Reel 7" Reel 13" Reel
Paper Quantity Plastic Quantity
Package quantity based on nished chip thickness specications.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 9/23/2013 8
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade)
Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC–7351
EIA
Size
Code
Metric
Size
Code
Density Level A:
Maximum (Most)
Land Protrusion (mm)
Density Level B:
Median (Nominal)
Land Protrusion (mm)
Density Level C:
Minimum (Least)
Land Protrusion (mm)
C
Y
X
V1
V2
C
Y
X
V1
V2
C
Y
X
V1
V2
0201 0603 0.38 0.56 0.52 1.80 1.00 0.33 0.46 0.42 1.50 0.80 0.28 0.36 0.32 1.20 0.60
0402 1005 0.50 0.72 0.72 2.20 1.20 0.45 0.62 0.62 1.90 1.00 0.40 0.52 0.52 1.60 0.80
0603 1608 0.90 1.15 1.10 4.00 2.10 0.80 0.95 1.00 3.10 1.50 0.60 0.75 0.90 2.40 1.20
0805 2012 1.00 1.35 1.55 4.40 2.60 0.90 1.15 1.45 3.50 2.00 0.75 0.95 1.35 2.80 1.70
1206 3216 1.60 1.35 1.90 5.60 2.90 1.50 1.15 1.80 4.70 2.30 1.40 0.95 1.70 4.00 2.00
1210 3225 1.60 1.35 2.80 5.65 3.80 1.50 1.15 2.70 4.70 3.20 1.40 0.95 2.60 4.00 2.90
121013225 1.50 1.60 2.90 5.60 3.90 1.40 1.40 2.80 4.70 3.30 1.30 1.20 2.70 4.00 3.00
1808 4520 2.30 1.75 2.30 7.40 3.30 2.20 1.55 2.20 6.50 2.70 2.10 1.35 2.10 5.80 2.40
1812 4532 2.15 1.60 3.60 6.90 4.60 2.05 1.40 3.50 6.00 4.00 1.95 1.20 3.40 5.30 3.70
1825 4564 2.15 1.60 6.90 6.90 7.90 2.05 1.40 6.80 6.00 7.30 1.95 1.20 6.70 5.30 7.00
2220 5650 2.75 1.70 5.50 8.20 6.50 2.65 1.50 5.40 7.30 5.90 2.55 1.30 5.30 6.60 5.60
2225 5664 2.70 1.70 6.90 8.10 7.90 2.60 1.50 6.80 7.20 7.3 0 2.50 1.30 6.70 6.50 7.0 0
1 Only for capacitance values ≥ 22 µF
Density Level A: For low-density product applications. Recommended for wave solder applications and provides a wider process window for reow solder
processes. KEMET only recommends wave soldering of EIA 0603, 0805 and 1206 case sizes.
Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reow solder processes.
Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform qualication
testing based on the conditions outlined in IPC Standard 7351 (IPC–7351).
Soldering Process
Recommended Soldering Technique:
•SolderwaveorsolderreowforEIAcasesizes0603,0805and1206
•AllotherEIAcasesizesarelimitedtosolderreowonly
RecommendedSolderingProle:
• KEMET recommends following the guidelines outlined in IPC/JEDEC J–STD020
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 9/23/2013 9
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade)
Table 4 – Performance & Reliability: Test Methods and Conditions
Stress Reference Test or Inspection Method
Terminal Strength JISC6429 Appendix 1, Note: Force of 1.8 kg for 60 seconds.
Board Flex JISC6429
Appendix 2, Note: Standard termination system – 2.0 mm (minimum) for all except 3 mm for C0G.
Flexible termination system – 3.0 mm (minimum).
Solderability JSTD002
Magnication50X.Conditions:
a) Method B, 4 hours @ 155°C, dry heat @ 235°C
b) Method B @ 215°C category 3
c) Method D, category 3 @ 260°C
Temperature Cycling JESD22 Method JA–104 1,000 Cycles (-55°C to +125°C). Measurement at 24 hours +/- 2 hours after test conclusion.
Biased Humidity MILSTD202 Method 103
Load Humidity: 1,000 hours 85°C/85% RH and rated voltage. Add 100 K ohm resistor. Measurement
at 24 hours +/- 2 hours after test conclusion.
Low Volt Humidity: 1,000 hours 85°C/85% RH and 1.5 V. Add 100 K ohm resistor.
Measurement at 24 hours +/- 2 hours after test conclusion.
Moisture Resistance MILSTD–202 Method 106
t = 24 hours/cycle. Steps 7a and 7b not required. Unpowered.
Measurement at 24 hours +/- 2 hours after test conclusion.
Thermal Shock MILSTD202 Method 107
-55°C/+125°C. Note: Number of cycles required – 300, maximum transfer time – 20 seconds, dwell
time – 15 minutes. Air – Air.
High Temperature Life
MILSTD202 Method 108
/EIA–198
1,000hoursat125°C(85°CforX5R,Z5UandY5V)with2Xratedvoltageapplied.
Storage Life MILSTD–202 Method 108 150°C, 0 VDC for 1,000 hours.
Vibration MILSTD–202 Method 204
5g'sfor20min.,12cycleseachof3orientations.Note:Use8"X5"PCB0.031"thick7secure
points on one long side and 2 secure points at corners of opposite sides. Parts mounted within 2"
from any secure point. Test from 10 – 2,000 Hz
Mechanical Shock MILSTD202 Method 213 Figure 1 of Method 213, Condition F.
Resistance to Solvents MILSTD–202 Method 215 Add aqueous wash chemical, OKEM Clean or equivalent.
Storage and Handling
Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in other
environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres, and long term
storage. In addition, packaging materials will be degraded by high temperature– reels may soften or warp and tape peel force may
increase. KEMET recommends that maximum storage temperature not exceed 40ºC and maximum storage humidity not exceed 70%
relativehumidity.Temperatureuctuationsshouldbeminimizedtoavoidcondensationonthepartsandatmospheresshouldbefreeof
chlorine and sulfur bearing compounds. For optimized solderability chip stock should be used promptly, preferably within 1.5 years of
receipt.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 9/23/2013 10
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade)
Construction
Reference Item Material
A
Termination
System
Finish 100% Matte Sn
BBarrier Layer Ni
CBase Metal Cu
DInner Electrode Ni
EDielectric Material CaZrO
3
Note: Image is exaggerated in order to clearly identify all components of construction.
Capacitor Marking (Optional):
Laser marking option is not available on:
• C0G,UltraStableX8RandY5Vdielectricdevices
EIA 0402 case size devices
EIA 0603 case size devices with Flexible Termination option.
KPS Commercial and Automotive grade stacked devices.
These capacitors are supplied unmarked only.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 9/23/2013 11
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade)
Tape & Reel Packaging Information
KEMET offers multilayer ceramic chip capacitors packaged in 8, 12 and 16 mm tape on 7" and 13" reels in accordance with EIA
Standard 481. This packaging system is compatible with all tape-fed automatic pick and place systems. See Table 2 for details on
reeling quantities for commercial chips.
8 mm, 12 mm
or 16 mm Carrier Tape
178 mm (7.00")
or
330 mm (13.00")
Anti-Static Reel
Embossed Plastic* or
Punched Paper Carrier.
Embossment or Punched Cavity
Anti-Static Cover Tape
(.10 mm (.004") Maximum Thickness)
Chip and KPS Orientation in Pocket
(except 1825 Commercial, and 1825 and 2225 Military)
*EIA 01005, 0201, 0402 and 0603 case sizes available on punched paper carrier only.
KEMET
®
Bar Code Label
Sprocket Holes
Table 5 – Carrier Tape Con guration – Embossed Plastic & Punched Paper (mm)
EIA Case Size Tape Size (W)* Pitch (P
1
)*
01005 – 0402 8 2
0603 – 1210 8 4
1805 – 1808 12 4
≥1812 12 8
KPS 1210 12 8
KPS 1812 & 2220 16 12
Array 0508 & 0612 8 4
*Refer to Figures 1 & 2 for W and P1 carrier tape reference locations.
*Refer to Tables 6 & 7 for tolerance speci cations.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 9/23/2013 12
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade)
Figure 1 – Embossed (Plastic) Carrier Tape Dimensions
Po
T
F
W
Center Lines of Cavity
Ao
Bo
User Direction of Unreeling
Cover Tape
Ko
B
1
is for tape feeder reference only,
including draft concentric about B
o.
T
2
ØD
1
ØDo
B
1
S
1
T
1
E
1
E
2
P
1
P
2
Embossment
For cavity size,
see Note 1 Table 4
[10 pitches cumulative
tolerance on tape ± 0.2 mm]
Table 6 – Embossed (Plastic) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size D0
D
1
Minimum
Note 1
E1P0 P2
R Reference
Note 2
S
1
Minimum
Note 3
T
Maximum
T
1
Maximum
8 mm
1.5 +0.10/-0.0
(0.059 +0.004/-0.0)
1.0
(0.039)
1.75 ±0.10
(0.069 ±0.004)
4.0 ±0.10
(0.157 ±0.004)
2.0 ±0.05
(0.079 ±0.002)
25.0
(0.984)
0.600
(0.024)
0.600
(0.024)
0.100
(0.004)
12 mm 1.5
(0.059)
30
(1.181)
16 mm
Variable Dimensions — Millimeters (Inches)
Tape Size Pitch
B
1
Maximum
Note 4
E
2
Minimum
F P1
T
2
Maximum
W
Maximum
A0,B0 & K0
8 mm Single (4 mm)
4.35
(0.171)
6.25
(0.246)
3.5 ±0.05
(0.138 ±0.002)
4.0 ±0.10
(0.157 ±0.004)
2.5
(0.098)
8.3
(0.327)
Note 512 mm
Single (4 mm) &
Double (8 mm)
8.2
(0.323)
10.25
(0.404)
5.5 ±0.05
(0.217 ±0.002)
8.0 ±0.10
(0.315 ±0.004)
4.6
(0.181)
12.3
(0.484)
16 mm Triple (12 mm)
12.1
(0.476)
14.25
(0.561)
7.5 ±0.05
(0.138 ±0.002)
12.0 ±0.10
(0.157 ±0.004)
4.6
(0.181)
16.3
(0.642)
1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment location and
hole location shall be applied independent of each other.
2. The tape with or without components shall pass around R without damage (see Figure 6).
3. If S1 < 1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Standard 481 paragraph 4.3 section b).
4. B1 dimension is a reference dimension for tape feeder clearance only.
5. The cavity de ned by A0, B0 and K0 shall surround the component with suf cient clearance that:
(a) the component does not protrude above the top surface of the carrier tape.
(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.
(c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 3).
(d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape (see Figure 4).
(e) for KPS Series product, A0 and B0 are measured on a plane 0.3 mm above the bottom of the pocket.
(f) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 9/23/2013 13
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade)
Figure 2 – Punched (Paper) Carrier Tape Dimensions
User Direction of Unreeling
Top Cover Tape
T
Center Lines of Cavity
P
1
ØDo Po
P
2
E
1
F
E
2
W
G
A
0
B
0
Cavity Size,
See
Note 1, Table 7
Bottom Cover Tape
T
1
T
1
Bottom Cover Tape
[10 pitches cumulative
tolerance on tape ± 0.2 mm]
Table 7 – Punched (Paper) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size D0E1P0P2T1 Maximum G Minimum
R Reference
Note 2
8 mm 1.5 +0.10 -0.0
(0.059 +0.004 -0.0)
1.75 ±0.10
(0.069 ±0.004)
4.0 ±0.10
(0.157 ±0.004)
2.0 ±0.05
(0.079 ±0.002)
0.10
(0.004) Maximum
0.75
(0.030)
25
(0.984)
Variable Dimensions — Millimeters (Inches)
Tape Size Pitch E2 Minimum F P1 T Maximum W Maximum A0 B0
8 mm Half (2 mm) 6.25
(0.246)
3.5 ±0.05
(0.138 ±0.002)
2.0 ±0.05
(0.079 ±0.002)
1.1
(0.098)
8.3
(0.327)
Note 1
8 mm Single (4 mm)
4.0 ±0.10
(0.157 ±0.004)
8.3
(0.327)
1. The cavity de ned by A0, B0 and T shall surround the component with suf cient clearance that:
a) the component does not protrude beyond either surface of the carrier tape.
b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.
c) rotation of the component is limited to 20° maximum (see Figure 3).
d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4).
e) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.
2. The tape with or without components shall pass around R without damage (see Figure 6).
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 9/23/2013 14
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade)
Packaging Information Performance Notes
1. Cover Tape Break Force: 1.0 Kg minimum.
2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be:
Tape Width Peel Strength
8 mm 0.1 to 1.0 Newton (10 to 100 gf)
12 and 16 mm 0.1 to 1.3 Newton (10 to 130 gf)
The direction of the pull shall be opposite the direction of the carrier tape travel. The pull angle of the carrier tape shall be 165° to 180°
from the plane of the carrier tape. During peeling, the carrier and/or cover tape shall be pulled at a velocity of 300 ±10 mm/minute.
3. Labeling: Bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes. Refer to EIA
Standards 556 and 624.
Figure 3 – Maximum Component Rotation
Ao
Bo
°
T
°
s
Maximum Component Rotation
Top View
Maximum Component Rotation
Side View
Tape Maximum
Width (mm) Rotation (°
T)
8,12 20
16 – 200 10 Tape Maximum
Width (mm) Rotation ( °
S)
8,12 20
16 – 56 10
72 – 200 5
Typical Pocket Centerline
Typical Component Centerline
Figure 4 – Maximum Lateral Movement
0.5 mm maximum
0.5 mm maximum
8 mm & 12 mm Tape
1.0 mm maximum
1.0 mm maximum
16 mm Tape
Figure 5 – Bending Radius
RR
Bending
Radius
Embossed
Carrier
Punched
Carrier
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 9/23/2013 15
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade)
Figure 6 – Reel Dimensions
AD(See Note)
Full Radius,
See Note
B(see Note)
Access Hole at
Slot Location
(Ø 40 mm minimum)
If present,
tape slot in core
for tape start:
2.5 mm minimum width x
10.0 mm minimum depth
W3(Includes
flange distortion
at outer edge)
W2(Measured at hub)
W1(Measured at hub)
C
(Arbor hole
diameter)
Note: Drive spokes optional; if used, dimensions B and D shall apply.
N
Table 8 – Reel Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size A B Minimum CD Minimum
8 mm 178 ±0.20
(7.008 ±0.008)
or
330 ±0.20
(13.000 ±0.008)
1.5
(0.059)
13.0 +0.5/-0.2
(0.521 +0.02/-0.008)
20.2
(0.795)
12 mm
16 mm
Variable Dimensions — Millimeters (Inches)
Tape Size N Minimum W
1
W
2
Maximum W
3
8 mm
50
(1.969)
8.4 +1.5/-0.0
(0.331 +0.059/-0.0)
14.4
(0.567)
Shall accommodate tape width
without interference
12 mm
12.4 +2.0/-0.0
(0.488 +0.078/-0.0)
18.4
(0.724)
16 mm
16.4 +2.0/-0.0
(0.646 +0.078/-0.0)
22.4
(0.882)