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1
FEATURES
DESCRIPTION
APPLICATIONS
SUPPORTS DEFENSE, AEROSPACE,
TPS79101-EP , TPS79118-EPTPS79133-EP , TPS79147-EP
www.ti.com
............................................................................................................................................................ SGLS161A – APRIL 2003 – REVISED JUNE 2008
ULTRALOW NOISE, HIGH PSRR, FAST RF, 100-mALOW-DROPOUT LINEAR REGULATORS
2
•100-mA Low-Dropout Regulator With EN•Available in 1.8-V, 3.3-V, 4.7-V, and Adjustable
The TPS791xx family of low-dropout (LDO)low-power linear voltage regulators features highVersions
power supply rejection ratio (PSRR), ultralow noise,•High PSRR (70 dB at 10 kHz)
fast start-up, and excellent line and load transient•Ultralow Noise (15 µV
RMS
)
responses in a small outline, SOT23, package. Each•Fast Start-Up Time (63 µs) device in the family is stable, with a small 1- µFceramic capacitor on the output. The family uses an•Stable With Any 1- µF Ceramic Capacitor
advanced, proprietary BiCMOS fabrication process to•Excellent Load/Line Transient
yield extremely low dropout voltages (e.g., 38 mV at•Very Low Dropout Voltage
100 mA, TPS79147). Each device achieves faststart-up times (approximately 63 µs with a 0.001- µF(38 mV at Full Load, TPS79147)
bypass capacitor) while consuming very low•5-Pin SOT23 (DBV) Package
quiescent current (170 µA typical). Moreover, when•TPS792xx Provides EN Options
the device is placed in standby mode, the supplycurrent is reduced to less than 1 µA. The TPS79118exhibits approximately 15 µV
RMS
of output voltagenoise with a 0.1- µF bypass capacitor. Applications•VCOs
with analog components that are noise sensitive,•RF
such as portable RF electronics, benefit from the•Bluetooth™, Wireless LAN
high-PSRR and low-noise features as well as the fastresponse time.
AND MEDICAL APPLICATIONS•Controlled Baseline•One Assembly/Test Site•One Fabrication Site•Available in Military ( – 55 ° C/125 ° C)Temperature Range
(1)
•Extended Product Life Cycle•Extended Product-Change Notification•Product Traceability(1) Custom temperature ranges available
ORDERING INFORMATION
(1)
OUTPUTT
J
PACKAGE
(2)
ORDERABLE PART NUMBER TOP-SIDE MARKINGVOLTAGE
1.2 to 5.5 V TPS79101DBVREP PEUE1.8 V TPS79118DBVREP PERE– 40 ° C to 125 ° C SOT23 (DBV) Reel of 30003.3 V TPS79133DBVREP PESE4.7 V TPS79147DBVREP PETE– 55 ° C to 125 ° C 3.3 V SOT23 (DBV) Reel of 250 TPS79133MDBVTEP PIDM
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIweb site at www.ti.com .(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2Bluetooth is a trademark of Bluetooth SIG, Inc..
PRODUCTION DATA information is current as of publication date.
Copyright © 2003 – 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the Texas
On products compliant to MIL-PRF-38535, all parameters areInstruments standard warranty. Production processing does not
tested unless otherwise noted. On all other products, productionnecessarily include testing of all parameters.
processing does not necessarily include testing of all parameters.
3
2
4
5
DBV PACKAGE
(TOP VIEW)
1IN
GND
EN
OUT
BYPASS
3
2
4
6
DBV PACKAGE
(TOP VIEW)
1IN
EN
OUT
BYPASS
5FB
Adjustable Option
Fixed Option
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
100 1 k 10 k 100 k
IO = 1 mA
VO = 4.3 V
Co = 1 µF
C(byp) = 0.1 µF
IO = 100 mA
f − Frequency − Hz
Output Spectral Noise Density −
TPS79133
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
V/ Hzµ
60
50
30
2010 100 1 k 10 k
70
90
100
100 k 1 M 10 M
40
80
Ripple Rejection − dB
f − Frequency − Hz
TPS79133
RIPPLE REJECTION
vs
FREQUENCY
VI = 4.3 V
Co = 10 µF
C(byp) = 0.01 µF
IO = 10 mA
IO = 100 mA
GND
ABSOLUTE MAXIMUM RATINGS
(1)
TPS79101-EP , TPS79118-EPTPS79133-EP , TPS79147-EP
SGLS161A – APRIL 2003 – REVISED JUNE 2008 ............................................................................................................................................................
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.
over operating free-air temperature range (unless otherwise noted)
TPS79101, TPS79118,TPS79133, TPS79147
Input voltage range
(2)
– 0.3 V to 6 VVoltage range at EN – 0.3 V to V
I
+ 0.3 VVoltage on OUT – 0.3 V to 6 VPeak output current Internally limitedESD rating, HBM 2 kVESD rating, CDM 500 VContinuous total power dissipation See Dissipation Rating TableAll others – 40 ° C to 150 ° COperating virtual-junction temperature range, T
J
TPS79133MDBVTEP – 55 ° C to 125 ° CAll others – 40 ° C to 120 ° COperating ambient temperature range, T
A
TPS79133MBVTEP – 55 ° C to 125 ° CStorage temperature range, T
stg
– 65 ° C to 150 ° CLow K 63.75 ° C/WR
θJC
(3)
High K 63.75 ° C/WLow K 256 ° C/WR
θJA
(4)
High K 178.3 ° C/W
(1) Stresses beyond those listed under “ absolute maximum ratings ” may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under “ recommended operatingconditions ” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) All voltage values are with respect to network ground terminal.(3) The JEDEC low-K (1s) board design used to derive this data was a 3-inch × 3-inch, two-layer board with 2-ounce copper traces on topof the board.(4) The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch × 3-inch, multilayer board with 1-ounce internal power andground planes and 2-ounce copper traces on top and bottom of the board.
2Submit Documentation Feedback Copyright © 2003 – 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS79101-EP TPS79118-EP TPS79133-EP TPS79147-EP
RECOMMENDED OPERATING CONDITIONS
1
10
100
1000
100 110 120 130 140 150 160
Continuous TJ(°C)
Estimated Life (Years)
Wirebond Voiding
Fail Mode
Electromigration Fail Mode
Notes:
1. See data sheet for absolute maximum and minimum recommended operating conditions.
2. Silicon operating-life design goal is 10 years at 105°C junction temperature (does not include
package interconnect life).
3. Enhanced plastic product disclaimer applies.
TPS79101-EP , TPS79118-EPTPS79133-EP , TPS79147-EP
www.ti.com
............................................................................................................................................................ SGLS161A – APRIL 2003 – REVISED JUNE 2008
MI MA UNIN X T
Input voltage, V
I
(1)
2.7 5.5 VContinuous output current, I
O
(2)
0 100 mA– 40 125Operating junction temperature, T
J
° CTPS79133MBVTEP – 55 125
(1) To calculate the minimum input voltage for your maximum output current, use the following formula: V
I
(min) = V
O
(max) + VDO (maxload)(2) Continuous output current and operating junction temperature are limited by internal protection circuitry, but it is not recommended thatthe device operate under conditions beyond those specified in this table for extended periods of time.
Figure 1. TPS79133 Operating Life Derating Chart
Copyright © 2003 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): TPS79101-EP TPS79118-EP TPS79133-EP TPS79147-EP
ELECTRICAL CHARACTERISTICS
Line regulation (mV) +ǒ%ńVǓ VOǒVImax *2.7 VǓ
100 1000
Line regulation (mV) +ǒ%ńVǓ VOǒVImax *ǒVO)1 VǓǓ
100 1000
TPS79101-EP , TPS79118-EPTPS79133-EP , TPS79147-EP
SGLS161A – APRIL 2003 – REVISED JUNE 2008 ............................................................................................................................................................
www.ti.com
over recommended operating free-air temperature range, (T
J
= – 40 ° C to 125 ° C), V
I
= V
O
(typ) + 1 V, I
O
= 1 mA, EN = 0 V,C
o
= 10 µF, C
o
(byp) = 0.01 µF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
T
J
= 25 ° C, 1.22 V ≤V
O
≤5.2 V V
OTPS79101
0µA < I
O
< 100 mA
(1)
, 1.22 V ≤V
O
≤5.2 V 0.98 V
O
1.02 V
O
T
J
= 25 ° C 1.8TPS79118
0µA < I
O
< 100 mA, 2.8 V < V
I
< 5.5 V 1.764 1.836Output voltage VT
J
= 25 ° C 3.3TPS79133
0µA < I
O
< 100 mA, 4.3 V < V
I
< 5.5 V 3.234 3.366T
J
= 25 ° C 4.7TPS79147
0µA < I
O
< 100 mA, 5.2 V < V
I
< 5.5 V 4.606 4.7940µA < I
O
< 100 mA, T
J
= 25 ° C 170Quiescent current (GND current) µA0µA < I
O
< 100 mA 250Load regulation 0 µA < I
O
< 100 mA, T
J
= 25 ° C 5 mVV
O
+ 1 V < V
I
≤5.5 V, T
J
= 25 ° C 0.05Output voltage line regulation ( ΔV
O
/V
O
)
(2)
%/VV
O
+ 1 V < V
I
≤5.5 V 0.12C
(byp)
= 0.001 µF 32C
(byp)
= 0.0047 µF 17BW = 100 Hz to 100 kHz,Output noise voltage (TPS79118) µV
RMSI
O
= 100 mA, T
J
= 25 ° C
C
(byp)
= 0.01 µF 16C
(byp)
= 0.1 µF 15C
(byp)
= 0.001 µF 53R
L
33 Ω, CO = 1 µF,Time, start-up (TPS79133) C
(byp)
= 0.0047 µF 67 µsT
J
= 25 ° C
C
(byp)
= 0.01 µF 98Output current limit V
O
= 0 V
(1)
285 600 mAUVLO threshold V
CC
rising 2.25 2.65 VUVLO hysteresis T
J
= 25 ° C, V
CC
rising 100 mV
(1) The minimum IN operating voltage is 2.7 V or V
O
(typ) + 1 V, whichever is greater. The maximum IN voltage is 5.5 V. The maximumoutput current is 100 mA.(2) If V
O
≤1.8 V then V
Imin
= 2.7 V, V
Imax
= 5.5 V:
If V
O
≥2.5 V then V
Imin
= V
O
+ 1 V, V
Imax
= 5.5 V:
4Submit Documentation Feedback Copyright © 2003 – 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS79101-EP TPS79118-EP TPS79133-EP TPS79147-EP
TPS79101-EP , TPS79118-EPTPS79133-EP , TPS79147-EP
www.ti.com
............................................................................................................................................................ SGLS161A – APRIL 2003 – REVISED JUNE 2008
ELECTRICAL CHARACTERISTICS (continued)over recommended operating free-air temperature range, (T
J
= – 40 ° C to 125 ° C), V
I
= V
O
(typ) + 1 V, I
O
= 1 mA, EN = 0 V,C
o
= 10 µF, C
o
(byp) = 0.01 µF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Standby current EN = V
I
, 2.7 V < V
I
< 5.5 V 0.07 1 µAHigh-level enable input voltage 2.7 V < V
I
< 5.5 V 2 VLow-level enable input voltage 2.7 V < V
I
< 5.5 V 0.7 VInput current ( EN) EN = V
I
– 1 1 µAf = 100 Hz, T
J
= 25 ° C, I
O
= 10 mA 80f = 100 Hz, T
J
= 25 ° C, I
O
= 100 mA 75TPS79118
f = 10 kHz, T
J
= 25 ° C, I
O
= 100 mA 72f = 100 kHz, T
J
= 25 ° C, I
O
= 100 mA 45Power supply ripple rejection dBf = 100 Hz, T
J
= 25 ° C, I
O
= 10 mA 70f = 100 Hz, T
J
= 25 ° C, I
O
= 100 mA 75TPS79133
f = 10 kHz, T
J
= 25 ° C, I
O
= 100 mA 73f = 100 kHz, T
J
= 25 ° C, I
O
= 100 mA 37I
O
= 100 mA, T
J
= 25 ° C 50TPS79133
I
O
= 100 mA 90Dropout voltage
(3)
mVI
O
= 100 mA, T
J
= 25 ° C 38TPS79147
I
O
= 100 mA 70
(3) IN voltage equals V
O
(typ) – 100 mV. The TPS79118 dropout voltage is limited by the input voltage range limitations.
Copyright © 2003 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): TPS79101-EP TPS79118-EP TPS79133-EP TPS79147-EP
_+
Thermal
Shutdown
Bandgap
Reference
VIN
Current
Sense
R2
VIN
GND
EN
VOUT
SHUTDOWN
Vref
UVLO
ILIM
External to
the Device
FB
R1
UVLO
250 kΩBypass
_+
Thermal
Shutdown
VIN
Current
Sense
R1
R2
VIN
GND
EN
VOUT
SHUTDOWN
Vref
UVLO
ILIM
Bandgap
Reference
UVLO
250 kΩBypass
TPS79101-EP , TPS79118-EPTPS79133-EP , TPS79147-EP
SGLS161A – APRIL 2003 – REVISED JUNE 2008 ............................................................................................................................................................
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FUNCTIONAL BLOCK DIAGRAM — ADJUSTABLE VERSION
FUNCTIONAL BLOCK DIAGRAM — FIXED VERSION
TERMINAL FUNCTIONS
TERMINAL
I/O DESCRIPTIONNAME ADJ FIXED
An external bypass capacitor, connected to this terminal, in conjunction with an internalBYPASS 4 4
resistor, creates a low-pass filter to further reduce regulator noise.The EN terminal is an input which enables or shuts down the device. When EN is a logicEN 3 3 I high, the device will be in shutdown mode. When EN is a logic low, the device will beenabled.FB 5 N/A I This terminal is the feedback input voltage for the adjustable device.GND 2 2 Regulator groundIN 1 1 I The IN terminal is the input to the device.OUT 6 5 O The OUT terminal is the regulated output of the device.
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Product Folder Link(s): TPS79101-EP TPS79118-EP TPS79133-EP TPS79147-EP
TYPICAL CHARACTERISTICS
3.297
3.298
3.299
3.3
3.301
3.302
3.303
0 20 40 60 80 100
IO − Output Current − mA
TPS79133
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
VI = 4.3 V
Co = 10 µF
TJ = 25° C
− Output Voltage − V
VO
3.27
3.28
3.29
3.3
3.31
3.32
−40−25−10 5 20 35 50 65 80 95 110 125
TJ − Junction Temperature − °C
TPS79133
OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
− Output Voltage − V
VO
IO = 100 mA
IO = 1 mA
VI = 4.3 V
Co = 10 µF
100
120
140
160
180
200
220
240
260
−40 −25−10 5 20 35 50 65 80 95 110 125
TJ − Junction Temperature − °C
TPS79133
GROUND CURRENT
vs
JUNCTION TEMPERATURE
Ground Current − Aµ
VI = 4.3 V
Co = 10 µF
IO = 1 mA
IO = 100 mA
100 1 k 10 k 100 k
IO = 1 mA
VI = 2.8 V
Co = 1 µF
C(byp) = 0.1 µF
IO = 100 mA
f − Frequency − Hz
Output Spectral Noise Density −
TPS79118
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
V/ Hzµ
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
0.16
0.18
0.2
100 1 k 10 k 100 k
IO = 0.1 µF
VI = 2.8 V
IO = 100 mA
Co = 10 µF
IO = 0.01 µF
f − Frequency − Hz
TPS79118
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
IO = 0.001 µF
0
0.2
0.4
0.6
0.8
1
1.2
IO = 0.0047 µF
Output Spectral Noise Density − V/ Hzµ
100 1 k 10 k 100 k
IO = 1 mA
VI = 2.8 V
Co = 10 µF
C(byp) = 0.1 µF
IO = 100 mA
f − Frequency − Hz
Output Spectral Noise Density −
TPS79118
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
V/ Hzµ
0
0.05
0.1
0.15
0.2
0.25
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
100 1 k 10 k 100 k
IO = 1 mA
VI = 4.3 V
Co = 1 µF
C(byp) = 0.1 µF
IO = 100 mA
f − Frequency − Hz
Output Spectral Noise Density −
TPS79133
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
V/ Hzµ
TPS79101-EP , TPS79118-EPTPS79133-EP , TPS79147-EP
www.ti.com
............................................................................................................................................................ SGLS161A – APRIL 2003 – REVISED JUNE 2008
Figure 2. Figure 3. Figure 4.
Figure 5. Figure 6. Figure 7.
Figure 8. Figure 9. Figure 10.
Copyright © 2003 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): TPS79101-EP TPS79118-EP TPS79133-EP TPS79147-EP
RMS − Root Mean Squared Output Noise −
ROOT MEAN SQUARED OUTPUT NOISE
vs
BYPASS CAP ACITANCE
(RMS)
Vµ
C(bypass) − Bypass Capacitance − µF
VO = 3.3 V
VO = 1.8 V
0
10
20
30
40
50
60
70
0.001 0.01 0.1
BW = 100 Hz to 100
kHz
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
100 1 k 10 k 100 k
IO = 1 mA
VI = 4.3 V
Co = 10 µF
C(byp) = 0.1 µF
IO = 100 mA
f − Frequency − Hz
Output Spectral Noise Density −
TPS79133
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
V/ Hzµ
100 1 k 10 k 100 k
IO = 0.1 µF
VI = 4.3 V
IO = 100 mA
Co = 10 µF
IO = 0.01 µF
f − Frequency − Hz
TPS79133
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
IO = 0.001 µF
IO = 0.0047 µF
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
Output Spectral Noise Density − V/ Hzµ
0
10
20
30
40
50
60
70
80
−40−25−10 5 20 35 50 65 80 95 110 125
IO = 100 mA
IO = 10 mA
TJ − Junction Temperature − °C
− Dropout Voltage − mV
VDO
TPS79133
DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
VI = 3.2 V,
Co = 10 µF
VI = 4.3 V
Co = 10 µF
TJ = 25°C
100 10 M10 1 k
f − Frequency − Hz
10 k
− Output Impedance −ZoΩ
TPS79133
OUTPUT IMPEDANCE
vs
FREQUENCY
100 k
IO = 100 mA
IO = 1 mA
0
0.5
1
1.5
2
2.5
3
1 M
0
10
20
30
40
50
60
70
80
90
100
0 0.02 0.04 0.06 0.08 0.1
TJ = 125°C
TJ = 25°C
TJ = −40°C
IO − Output Current − A
TPS792133
DROPOUT VOLTAGE
vs
OUTPUT CURRENT
− Dropout Voltage − mV
VDO
VI = 3.2 V
CO = 10 µF
0
10
20
30
40
50
60
70
80
90
100 1 k 10 k 100 k 1 M 10 M
Ripple Rejection − dB
f − Frequency − Hz
TPS79118
RIPPLE REJECTION
vs
FREQUENCY
VI = 2.8 V
Co = 10 µF
C(byp) = 0.01 µF
IO = 100 mA
IO = 1 mA
0
20
40
60
80
100
120
2.5 3 3.5 4 4.5 5
TJ = 125°C
TJ = 25°C
TJ = −40°C
IO = 100 mA
VI − Input Voltage − V
TPS79101
DROPOUT VOLTAGE
vs
INPUT VOLTAGE
− Dropout Voltage − mV
VDO
TPS79101-EP , TPS79118-EPTPS79133-EP , TPS79147-EP
SGLS161A – APRIL 2003 – REVISED JUNE 2008 ............................................................................................................................................................
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TYPICAL CHARACTERISTICS (continued)
Figure 11. Figure 12. Figure 13.
Figure 14. Figure 15. Figure 16.
Figure 17. Figure 18. Figure 19.
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0
10
20
30
40
50
60
70
80
90
100 1 k 10 k 100 k 1 M 10 M
Ripple Rejection − dB
f − Frequency − Hz
TPS79118
RIPPLE REJECTION
vs
FREQUENCY
VI = 2.8 V
Co = 1 µF
C(byp) = 0.01 µF
IO = 100 mA
IO = 10 mA
0
10
20
30
40
50
60
70
80
90
100 1 k 10 k 100 k 1 M 10 M
Ripple Rejection − dB
f − Frequency − Hz
TPS79118
RIPPLE REJECTION
vs
FREQUENCY
VI = 2.8 V
Co = 1 µF
C(byp) = 0.1 µF
IO = 100 mA
IO = 10 mA
60
50
30
2010 100 1 k 10 k
70
90
100
100 k 1 M 10 M
40
80
Ripple Rejection − dB
f − Frequency − Hz
TPS79133
RIPPLE REJECTION
vs
FREQUENCY
VI = 4.3 V
Co = 10 µF
C(byp) = 0.01 µF
IO = 10 mA
IO = 100 mA
3
TPS79133
OUTPUT VOLTAGE, ENABLE VOLTAGE
vs
TIME (START-UP)
VO
t − Time − µs
0 604020 80 100 140120 160 180 200
− Output Voltage − V
VI = 4.3 V
VO = 3.3 V
IO = 100 mA
Co = 1 µF
TJ = 25°C
Enable Voltage − V
1
2
0
0
2
C(byp) = 0.001 µF
C(byp) = 0.01 µF
1
3
C(byp) = 0.0047 µF
TPS79133
RIPPLE REJECTION
vs
FREQUENCY
VI = 4.3 V
Co = 1 µF
C(byp) = 0.1 µF
IO = 10 mA
IO = 100 mA
60
50
30
2010 100 1 k 10 k
70
90
100
100 k 1 M 10 M
40
80
Ripple Rejection − dB
f − Frequency − Hz
60
50
30
2010 100 1 k 10 k
70
90
100
100 k 1 M 10 M
40
80
Ripple Rejection − dB
f − Frequency − Hz
TPS79133
RIPPLE REJECTION
vs
FREQUENCY
VI = 4.3 V
CO = 1 µF
C(byp) = 0.01 µF
IO = 10 mA
IO = 100 mA
TPS79101-EP , TPS79118-EPTPS79133-EP , TPS79147-EP
www.ti.com
............................................................................................................................................................ SGLS161A – APRIL 2003 – REVISED JUNE 2008
TYPICAL CHARACTERISTICS (continued)
Figure 20. Figure 21. Figure 22.
Figure 23. Figure 24. Figure 25.
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12 k600 800
VO
Output Voltage − mV
∆ − Change In
t − Time − µs
TPS79118
LOAD TRANSIENT RESPONSE
−20
100
0 400200 1 k 14 k16 k 18 k 2 k
Current Load − mA
20 VI = 2.8 V
Co = 10 µF
0
0
−40
3.8
TPS79118
LINE TRANSIENT RESPONSE
t − Time − µs
0 302010 40 50 7060 80 90 100
2.8
10
0
VO − Output Voltage − mVVI− Input Voltage − V
−10
IO = 100 mA
Co = 1 µF
C(byp) = 0.01 µF
20
TPS79133
LINE TRANSIENT RESPONSE
VO
t − Time − µs
0 15105 20 25 3530 40 45 50
− Output Voltage − mV
IO = 100 mA
Co = 1 µF
C(byp) = 0.01 µF
VI− Input Voltage − V
0
5.3
4.3
−20
dv
dt +0.4 V
µs
VI = 4.3 V
Co = 10 µF
t − Time − µs
−40
100
0
0 50 100 150200 250 300
−20
0
350 400 450 500
20
TPS79133
LOAD TRANSIENT RESPONSE
VO
Output Voltage − mV
∆ − Change In
− Output Current − mA
IO
0.01
0.1
1
10
100
0 0.02 0.04 0.06 0.08 0.1
IO − Output Current − A
ESR − Equivalent Series Resistance − Ω
TPS79118
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESIST ANCE (ESR)
vs
OUTPUT CURRENT
Region of
Instability
Co = 0.47 µF
VI = 5.5 V
TJ = −40 °C to 125°C
Region of Instability
0.01
0.1
10
100
0 0.02 0.04 0.06 0.08 0.1
IO − Output Current − A
ESR − Equivalent Series Resistance − Ω
TPS79118
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESIST ANCE (ESR)
vs
OUTPUT CURRENT
1
Region of Instability
Region of Stability
Co = 1 µF
VI = 5.5 V
TJ = −40 °C to 125°C
0.01
0.1
10
100
0 0.02 0.04 0.06 0.08 0.1
IO − Output Current − A
ESR − Equivalent Series Resistance − Ω
TPS79118
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESIST ANCE (ESR)
vs
OUTPUT CURRENT
1
Region of Instability
Region of Stability
Co = 10 µF
VI = 5.5 V
TJ = −40 °C to 125°C
TPS79101-EP , TPS79118-EPTPS79133-EP , TPS79147-EP
SGLS161A – APRIL 2003 – REVISED JUNE 2008 ............................................................................................................................................................
www.ti.com
TYPICAL CHARACTERISTICS (continued)
Figure 26. Figure 27.
Figure 28. Figure 29.
Figure 30. Figure 31. Figure 32.
10 Submit Documentation Feedback Copyright © 2003 – 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS79101-EP TPS79118-EP TPS79133-EP TPS79147-EP
APPLICATION INFORMATION
0.1 µF
BYPASS
OUT
1
3
IN
EN
GND
2
4
5
VI
VO
1 µF
+
TPS791xx
0.01 µF
External Capacitor Requirements
Board Layout Recommendation To Improve PSRR And Noise Performance
TPS79101-EP , TPS79118-EPTPS79133-EP , TPS79147-EP
www.ti.com
............................................................................................................................................................ SGLS161A – APRIL 2003 – REVISED JUNE 2008
The TPS791xx family of low-dropout (LDO) regulators have been optimized for use in noise-sensitivebattery-operated equipment. The device features extremely low dropout voltages, high PSRR, ultralow outputnoise, low quiescent current (170 µA typically), and enable-input to reduce supply currents to less than 1 µAwhen the regulator is turned off.
A typical application circuit is shown in Figure 33 .
Figure 33. Typical Application Circuit
A 0.1- µF or larger ceramic input bypass capacitor, connected between IN and GND and located close to theTPS791xx, is required for stability and to improve transient response, noise rejection, and ripple rejection. Ahigher-value electrolytic input capacitor may be necessary if large, fast-rise-time load transients are anticipatedand the device is located several inches from the power source.
Like all low dropout regulators, the TPS791xx requires an output capacitor connected between OUT and GND tostabilize the internal control loop. The minimum recommended capacitance is 1 µF. Any 1- µF or larger ceramiccapacitor is suitable. The device is also stable with a 0.47- µF ceramic capacitor with at least 75 m Ωof ESR.
The internal voltage reference is a key source of noise in an LDO regulator. The TPS791xx has a BYPASS pinwhich is connected to the voltage reference through a 250-k Ωinternal resistor. The 250-k Ωinternal resistor, inconjunction with an external bypass capacitor connected to the BYPASS pin, creates a low pass filter to reducethe voltage reference noise and, therefore, the noise at the regulator output. In order for the regulator to operateproperly, the current flow out of the BYPASS pin must be at a minimum because any leakage current creates anIR drop across the internal resistor thus creating an output error. Therefore, the bypass capacitor must haveminimal leakage current.
For example, the TPS79118 exhibits approximately 15 µV
RMS
of output voltage noise using a 0.1- µF ceramicbypass capacitor and a 1- µF ceramic output capacitor. Note that the output starts up slower as the bypasscapacitance increases due to the RC time constant at the bypass pin that is created by the internal 250 k Ωresistor and external capacitor.
To improve ac measurements like PSRR, output noise, and transient response, it is recommended that the boardbe designed with separate ground planes for V
IN
and V
OUT
, with each ground plane connected only at the groundpin of the device. In addition, the ground connection for the bypass capacitor should connect directly to theground pin of the device.
Copyright © 2003 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Link(s): TPS79101-EP TPS79118-EP TPS79133-EP TPS79147-EP
Power Dissipation and Junction Temperature
PD(max) +TJmax *TA
RqJA
(1)
PD+ǒVI*VOǓ IO
(2)
Programming the TPS79101 Adjustable LDO Regulator
VO+Vref ǒ1)R1
R2Ǔ
(3)
R1 +ǒVO
Vref *1Ǔ R2
(4)
C1 +(3 10*7) (R1 )R2)
(R1 R2)
(5)
TPS79101-EP , TPS79118-EPTPS79133-EP , TPS79147-EP
SGLS161A – APRIL 2003 – REVISED JUNE 2008 ............................................................................................................................................................
www.ti.com
Specified regulator operation is assured to a junction temperature of 125 ° C; the maximum junction temperatureshould be restricted to 125 ° C under normal operating conditions. This restriction limits the power dissipation theregulator can handle in any given application. To ensure the junction temperature is within acceptable limits,calculate the maximum allowable dissipation, P
D(max)
, and the actual dissipation, P
D
, which must be less than orequal to P
D(max)
.
The maximum power-dissipation limit is determined using the following equation:
Where:
T
J
max is the maximum allowable junction temperature.R
θJA
is the junction-to-ambient thermal resistance for the package (see the dissipation rating table).T
A
is the ambient temperature.
The regulator dissipation is calculated using:
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermalprotection circuit.
The output voltage of the TPS79101 adjustable regulator is programmed using an external resistor divider asshown in Figure 34 . The output voltage is calculated using:
Where:
V
ref
= 1.2246 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 50- µA divider current. Lower value resistors can beused for improved noise performance, but the solution consumes more power. Higher resistor values should beavoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificiallyincreases/decreases the feedback voltage and thus erroneously decreases/increases V
O
. The recommendeddesign procedure is to choose R2 = 30.1 k Ωto set the divider current at 50 µA, C1 = 15 pF for stability, and thencalculate R1 using:
In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor beplaced between OUT and FB. For voltages < 1.8 V, the value of this capacitor should be 100 pF. Forvoltages > 1.8 V, the approximate value of this capacitor can be calculated as:
The suggested value of this capacitor for several resistor ratios is shown in the table below. If this capacitor isnot used (such as in a unity-gain configuration) or if an output voltage < 1.8 V is chosen, then the minimumrecommended output capacitor is 2.2 µF instead of 1 µF.
12 Submit Documentation Feedback Copyright © 2003 – 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS79101-EP TPS79118-EP TPS79133-EP TPS79147-EP
OUTPUT VOLTAGE
PROGRAMMING GUIDE
VO
VI
OUT
FB
R1
R2
GND
EN
IN
TPS79101
1 µF
BYPASS
0.01 µF
1 µF
C1 22 pF
15 pF
15 pF
OUTPUT
VOLTAGE R1 R2
2.5 V
3.3 V
3.6 V
C1
31.6 kΩ
51 kΩ
59 kΩ
30.1 kΩ
30.1 kΩ
30.1 kΩ
≤ 0.7 V
≥ 2 V
Regulator Protection
TPS79101-EP , TPS79118-EPTPS79133-EP , TPS79147-EP
www.ti.com
............................................................................................................................................................ SGLS161A – APRIL 2003 – REVISED JUNE 2008
Figure 34. TPS79101 Adjustable LDO Regulator Programming
The TPS791xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the inputvoltage drops below the output voltage (e.g., during power down). Current is conducted from the output to theinput and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might beappropriate.
The TPS791xx features internal current limiting and thermal protection. During normal operation, the TPS791xxlimits output current to approximately 400 mA. When current limiting engages, the output voltage scales backlinearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure,care should be taken not to exceed the power dissipation ratings of the package or the absolute maximumvoltage ratings of the device. If the temperature of the device exceeds approximately 165 ° C, thermal-protectioncircuitry shuts it down. Once the device has cooled down to below approximately 140 ° C, regulator operationresumes.
Copyright © 2003 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): TPS79101-EP TPS79118-EP TPS79133-EP TPS79147-EP
PACKAGE OPTION ADDENDUM
www.ti.com 17-Oct-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS79101DBVREP ACTIVE SOT-23 DBV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79118DBVREP ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79133DBVREP ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79133MDBVTEP ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS79147DBVREP ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
V62/03644-01YE ACTIVE SOT-23 DBV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
V62/03644-02XE ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
V62/03644-03XE ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
V62/03644-04XE ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
V62/03644-05XE ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
PACKAGE OPTION ADDENDUM
www.ti.com 17-Oct-2011
Addendum-Page 2
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS79101-EP, TPS79118-EP, TPS79133-EP, TPS79147-EP :
•Catalog: TPS79101, TPS79118, TPS79133, TPS79147
•Automotive: TPS79101-Q1, TPS79118-Q1, TPS79133-Q1, TPS79147-Q1
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS79101DBVREP SOT-23 DBV 6 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TPS79118DBVREP SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TPS79133DBVREP SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TPS79147DBVREP SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Jun-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS79101DBVREP SOT-23 DBV 6 3000 182.0 182.0 20.0
TPS79118DBVREP SOT-23 DBV 5 3000 182.0 182.0 20.0
TPS79133DBVREP SOT-23 DBV 5 3000 182.0 182.0 20.0
TPS79147DBVREP SOT-23 DBV 5 3000 182.0 182.0 20.0
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Jun-2012
Pack Materials-Page 2
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