SCDS025R - MAY 1995 - REVISED JANUARY 2004 D 5- Switch Connection Between Two Ports D TTL-Compatible Input Levels D Designed to Be Used in Level-Shifting Applications SN54CBTD3384 . . . JT OR W PACKAGE SN74CBTD3384 . . . DB, DBQ, DGV, DW, OR PW PACKAGE (TOP VIEW) 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCC 2B5 2A5 2A4 2B4 2B3 2A3 2A2 2B2 2B1 2A1 2OE 1A2 1B2 1B3 NC 1A3 1A4 1B4 5 4 2B5 2A5 24 2 1A1 1B1 1OE NC V CC 1 3 2 1 28 27 26 25 6 24 7 23 8 22 9 21 10 20 11 19 12 13 14 15 16 17 18 2A4 2B4 2B3 NC 2A3 2A2 2B2 1B5 1A5 GND NC 2OE 2A1 2B1 1OE 1B1 1A1 1A2 1B2 1B3 1A3 1A4 1B4 1B5 1A5 GND SN54CBTD3384 . . . FK PACKAGE (TOP VIEW) NC - No internal connection description/ordering information The 'CBTD3384 devices provide ten bits of high-speed TTL-compatible bus switching. The low on-state resistance of the switches allows connections to be made without adding propagation delay. A diode to VCC is integrated on the die to allow for level shifting from 5-V signals at the device inputs to 3.3-V signals at the device outputs. These devices are organized as two 5-bit switches with separate output-enable (OE) inputs. When OE is low, the switch is on, and port A is connected to port B. When OE is high, the switch is open, and the high-impedance state exists between the two ports. ORDERING INFORMATION SN74CBTD3384DW Tape and reel SN74CBTD3384DWR SSOP - DB Tape and reel SN74CBTD3384DBR CC384 SSOP (QSOP) - DBQ Tape and reel SN74CBTD3384DBQR CBTD3384 Tube SN74CBTD3384PW Tape and reel SN74CBTD3384PWR TVSOP - DGV Tape and reel SN74CBTD3384DGVR CC384 CDIP - JT Tube SNJ54CBTD3384JT SNJ54CBTD3384JT CFP - W Tube SNJ54CBTD3384W SNJ54CBTD3384W LCCC - FK Tube SNJ54CBTD3384FK SNJ54CBTD3384FK TSSOP - PW -55C -55 C to 125 125C C TOP-SIDE MARKING Tube SOIC - DW -40C -40 C to 85 85C C ORDERABLE PART NUMBER PACKAGE TA CBTD3384 CC384 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2004, Texas Instruments Incorporated !"#$%! & '("")% $& ! *(+,'$%! -$%). "!-('%& '!!"# %! &*)''$%!& *)" %/) %)"#& ! )0$& &%"(#)%& &%$-$"- 1$""$%2. "!-('%! *"!')&&3 -!)& !% )')&&$",2 ',(-) %)&%3 ! $,, *$"$#)%)"&. *"!-('%& '!#*,$% %! 4 $,, *$"$#)%)"& $") %)&%)(,)&& !%/)"1&) !%)-. $,, !%/)" *"!-('%& *"!-('%! *"!')&&3 -!)& !% )')&&$",2 ',(-) %)&%3 ! $,, *$"$#)%)"&. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 SCDS025R - MAY 1995 - REVISED JANUARY 2004 FUNCTION TABLE (each 5-bit bus switch) INPUTS INPUTS/OUTPUTS 1OE 2OE 1B1-1B5 2B1-2B5 L L 1A1-1A5 2A1-2A5 L H 1A1-1A5 Z H L Z 2A1-2A5 H H Z Z logic diagram (positive logic) 3 2 11 10 1A1 1A5 1OE 2A1 1B5 1 14 15 22 23 2A5 2OE 1B1 2B1 2B5 13 Pin numbers shown are for the DB, DBQ, DGV, DW, JT, PW, and W packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63C/W DBQ package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SCDS025R - MAY 1995 - REVISED JANUARY 2004 recommended operating conditions (see Note 3) SN54CBTD3384 VCC VIH Supply voltage VIL TA Low-level control input voltage High-level control input voltage SN74CBTD3384 MIN MAX MIN MAX 4.5 5.5 4.5 5.5 2 2 0.8 Operating free-air temperature -55 125 -40 UNIT V V 0.8 V 85 C In applications with fast edge rates, multiple outputs switching, and operating at high frequencies, the output may have little or no level-shifting effect. NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER SN54CBTD3384 TYP MAX TEST CONDITIONS MIN VIK VOH VCC = 4.5 V, See Figure 2 II = -18 mA II ICC VCC = 5.5 V, VCC = 5.5 V, VI = 5.5 V or GND IO = 0, VI = VCC or GND ICC Control inputs VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND Ci Control inputs Cio(OFF) ron VI = 3 V or 0 VO = 3 V or 0, VCC = 4.5 V OE = VCC VI = 0 II = 64 mA II = 30 mA SN74CBTD3384 TYP MAX MIN UNIT -1.2 -1.2 V 1 1 A 1.5 1.5 mA 2.5 2.5 mA 3 3 pF 3.5 3.5 5 5 7 5 5 7 pF VI = 2.4 V, II = 15 mA 35 35 50 Typical values are at VCC = 5 V, TA = 25C. This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND. Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by the lowest voltage of the two (A or B) terminals. switching characteristics over recommended ranges of supply voltage and operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) SN54CBTD3384 PARAMETER FROM (INPUT) TO (OUTPUT) tpd A or B B or A ten OE A or B 2.2 9.7 tdis OE A or B 1.5 8.6 MIN MAX SN74CBTD3384 MIN 0.25 MAX UNIT 0.25 ns 2.3 7 ns 1.7 5.3 ns The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 SCDS025R - MAY 1995 - REVISED JANUARY 2004 PARAMETER MEASUREMENT INFORMATION 7V 500 From Output Under Test S1 Open GND CL = 50 pF (see Note A) 500 TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 7V Open 3V Output Control LOAD CIRCUIT 1.5 V 1.5 V 0V tPZL 3V Input 1.5 V 1.5 V 0V tPLH 1.5 V 3.5 V 1.5 V tPZH tPHL VOH Output Output Waveform 1 S1 at 7 V (see Note B) tPLZ 1.5 V VOL Output Waveform 2 S1 at Open (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOL + 0.3 V VOL tPHZ 1.5 V VOH VOH - 0.3 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SCDS025R - MAY 1995 - REVISED JANUARY 2004 TYPICAL CHARACTERISTICS OUTPUT VOLTAGE HIGH vs SUPPLY VOLTAGE OUTPUT VOLTAGE HIGH vs SUPPLY VOLTAGE 4 3.25 100 A 3.75 6 mA 12 mA 3.5 24 mA 3 2.75 2.5 2.25 2 1.75 1.5 4.5 VOH - Output Voltage High - V 3.5 TA = 25C 100 A 6 mA 12 mA 24 mA 3.25 3 2.75 2.5 2.25 2 1.75 4.75 5 5.25 5.5 5.75 1.5 4.5 4.75 VCC - Supply Voltage - V 5 5.25 5.5 5.75 VCC - Supply Voltage - V OUTPUT VOLTAGE HIGH vs SUPPLY VOLTAGE 4 TA = 0C 3.75 VOH - Output Voltage High - V VOH - Output Voltage High - V 3.75 4 TA = 85C 3.5 100 A 3.25 6 mA 12 mA 3 24 mA 2.75 2.5 2.25 2 1.75 1.5 4.5 4.75 5 5.25 5.5 VCC - Supply Voltage - V 5.75 Figure 2. VOH Values POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 28-Feb-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty 5962-9752701Q3A ACTIVE LCCC FK 28 1 None Call TI Level-NC-NC-NC 5962-9752701QKA ACTIVE CFP W 24 1 None Call TI Level-NC-NC-NC 1 None Call TI Level-NC-NC-NC None Call TI Call TI Lead/Ball Finish MSL Peak Temp (3) 5962-9752701QLA ACTIVE CDIP JT 24 SN74CBTD3384DBLE OBSOLETE SSOP DB 24 SN74CBTD3384DBQR ACTIVE SSOP/ QSOP DBQ 24 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1 YEAR/ Level-1-235C-UNLIM SN74CBTD3384DBR ACTIVE SSOP DB 24 2000 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1 YEAR/ Level-1-235C-UNLIM SN74CBTD3384DGVR ACTIVE TVSOP DGV 24 2000 Pb-Free (RoHS) CU NIPDAU Level-1-250C-UNLIM SN74CBTD3384DW ACTIVE SOIC DW 24 25 Pb-Free (RoHS) CU NIPDAU Level-2-250C-1 YEAR/ Level-1-235C-UNLIM SN74CBTD3384DWR ACTIVE SOIC DW 24 2000 Pb-Free (RoHS) CU NIPDAU Level-2-250C-1 YEAR/ Level-1-235C-UNLIM SN74CBTD3384PW ACTIVE TSSOP PW 24 60 Pb-Free (RoHS) CU NIPDAU Level-1-250C-UNLIM SN74CBTD3384PWLE OBSOLETE TSSOP PW 24 None Call TI SN74CBTD3384PWR ACTIVE TSSOP PW 24 2000 Pb-Free (RoHS) CU NIPDAU SNJ54CBTD3384FK ACTIVE LCCC FK 28 1 None Call TI Level-NC-NC-NC SNJ54CBTD3384JT ACTIVE CDIP JT 24 1 None Call TI Level-NC-NC-NC SNJ54CBTD3384W ACTIVE CFP W 24 1 None Call TI Level-NC-NC-NC Call TI Level-1-250C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. None: Not yet available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 MECHANICAL DATA MCER004A - JANUARY 1995 - REVISED JANUARY 1997 JT (R-GDIP-T**) CERAMIC DUAL-IN-LINE 24 LEADS SHOWN PINS ** A 13 24 B 1 24 28 A MAX 1.280 (32,51) 1.460 (37,08) A MIN 1.240 (31,50) 1.440 (36,58) B MAX 0.300 (7,62) 0.291 (7,39) B MIN 0.245 (6,22) 0.285 (7,24) DIM 12 0.070 (1,78) 0.030 (0,76) 0.100 (2,54) MAX 0.320 (8,13) 0.290 (7,37) 0.015 (0,38) MIN 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0.015 (0,38) 0-15 0.014 (0,36) 0.008 (0,20) 0.100 (2,54) 4040110/C 08/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification. Falls within MIL STD 1835 GDIP3-T24, GDIP4-T28, and JEDEC MO-058 AA, MO-058 AB POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MCFP007 - OCTOBER 1994 W (R-GDFP-F24) CERAMIC DUAL FLATPACK 0.375 (9,53) 0.340 (8,64) Base and Seating Plane 0.006 (0,15) 0.004 (0,10) 0.090 (2,29) 0.045 (1,14) 0.045 (1,14) 0.026 (0,66) 0.395 (10,03) 0.360 (9,14) 0.360 (9,14) 0.240 (6,10) 1 0.360 (9,14) 0.240 (6,10) 24 0.019 (0,48) 0.015 (0,38) 0.050 (1,27) 0.640 (16,26) 0.490 (12,45) 0.030 (0,76) 0.015 (0,38) 12 13 30 TYP 1.115 (28,32) 0.840 (21,34) 4040180-5 / B 03/95 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Falls within MIL-STD-1835 GDFP2-F24 and JEDEC MO-070AD Index point is provided on cap for terminal identification only. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MLCC006B - OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MPDS006C - FEBRUARY 1996 - REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0-8 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins - MO-153 14/16/20/56 Pins - MO-194 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E - JANUARY 1995 - REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0-8 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C - JANUARY 1995 - REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0- 8 A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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