LM1117/LM1117I 800mA Low-Dropout Linear Regulator General Description Features The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load current. It has the same pin-out as National Semiconductor's industry standard LM317. The LM1117 is available in an adjustable version, which can set the output voltage from 1.25V to 13.8V with only two external resistors. In addition, it is also available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V, and 5V. The LM1117 offers current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgap reference to assure output voltage accuracy to within 1%. The LM1117 series is available in LLP, TO-263, SOT-223, TO-220, and TO-252 D-PAK packages. A minimum of 10F tantalum capacitor is required at the output to improve the transient response and stability. Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions Space Saving SOT-223 and LLP Packages Current Limiting and Thermal Protection Output Current 800mA Line Regulation 0.2% (Max) Load Regulation 0.4% (Max) Temperature Range 0C to 125C -- LM1117 -40C to 125C -- LM1117I Applications 2.85V Model for SCSI-2 Active Termination Post Regulator for Switching DC/DC Converter High Efficiency Linear Regulators Battery Charger Battery Powered Instrumentation Typical Application Active Terminator for SCSI-2 Bus 10091905 Fixed Output Regulator 10091928 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. 100919 SNOS412L Copyright (c) 1999-2012, Texas Instruments Incorporated LM1117/LM1117I Ordering Information Package Temperature Range Part Number Packaging Marking Transport Media NSC Drawing 3-lead SOT-223 0C to +125C LM1117MPX-ADJ N03A Tape and Reel MP04A LM1117MPX-2.5 N13A Tape and Reel LM1117MPX-2.85 N04A Tape and Reel LM1117MPX-3.3 N05A Tape and Reel -40C to +125C 3-lead TO-220 3-lead TO-252 0C to +125C 0C to +125C -40C to +125C 8-lead LLP 0C to +125C -40C to 125C TO-263 2 0C to +125C LM1117MPX-5.0 N06A Tape and Reel LM1117IMPX-ADJ N03B Tape and Reel LM1117IMPX-3.3 N05B Tape and Reel LM1117IMPX-5.0 N06B Tape and Reel LM1117T-ADJ LM1117T-ADJ Rails LM1117T-1.8 LM1117T-1.8 Rails LM1117T-2.5 LM1117T-2.5 Rails LM1117T-3.3 LM1117T-3.3 Rails LM1117T-5.0 LM1117T-5.0 Rails LM1117DTX-ADJ LM1117DT-ADJ Tape and Reel LM1117DTX-1.8 LM1117DT-1.8 Tape and Reel LM1117DTX-2.5 LM1117DT-2.5 Tape and Reel LM1117DTX-3.3 LM1117DT-3.3 Tape and Reel LM1117DTX-5.0 LM1117DT-5.0 Tape and Reel LM1117IDTX-ADJ LM1117IDT-ADJ Tape and Reel LM1117IDTX-3.3 LM1117IDT-3.3 Tape and Reel LM1117IDTX-5.0 LM1117IDT-5.0 Tape and Reel LM1117LDX-ADJ 1117ADJ Tape and Reel LM1117LDX-1.8 1117-18 Tape and Reel LM1117LDX-5.0 1117-50 Tape and Reel LM1117ILDX-ADJ 1117IAD Tape and Reel LM1117ILDX-3.3 1117I33 Tape and Reel LM1117ILDX-5.0 1117I50 Tape and Reel LM1117SX-ADJ LM1117SADJ Tape and Reel LM1117SX-3.3 LM1117S3.3 Tape and Reel LM1117SX-5.0 LM1117S5.0 Tape and Reel T03B TD03B LDC08A TS3B Copyright (c) 1999-2012, Texas Instruments Incorporated LM1117/LM1117I Block Diagram 10091901 Connection Diagrams SOT-223 10091904 Top View TO-220 10091902 Top View TO-252 10091938 Top View Copyright (c) 1999-2012, Texas Instruments Incorporated 3 LM1117/LM1117I TO-263 10091944 Top View 10091945 Side View LLP 10091946 When using the LLP package Pins 2, 3 & 4 must be connected together and Pins 5, 6 & 7 must be connected together Top View 4 Copyright (c) 1999-2012, Texas Instruments Incorporated LM1117/LM1117I Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Maximum Input Voltage (VIN to GND) Power Dissipation (Note 2) Junction Temperature (TJ) (Note 2) Storage Temperature Range Lead Temperature TO-220 (T) Package SOT-223 (IMP) Package ESD Tolerance (Note 3) Operating Ratings 20V Internally Limited 150C -65C to 150C 260C, 10 sec 260C, 4 sec 2000V (Note 1) Input Voltage (VIN to GND) Junction Temperature Range (TJ)(Note 2) LM1117 LM1117I 15V 0C to 125C -40C to 125C LM1117 Electrical Characteristics Typicals and limits appearing in normal type apply for TJ = 25C. Limits appearing in Boldface type apply over the entire junction temperature range for operation, 0C to 125C. Symbol VREF Parameter Reference Voltage Conditions LM1117-ADJ IOUT = 10mA, VIN-VOUT = 2V, TJ = 25C 10mA IOUT 800mA, 1.4V VIN-VOUT 10V VOUT Output Voltage LM1117-1.8 IOUT = 10mA, VIN = 3.8V, TJ = 25C 0 IOUT 800mA, 3.2V VIN 10V LM1117-2.5 IOUT = 10mA, VIN = 4.5V, TJ = 25C 0 IOUT 800mA, 3.9V VIN 10V LM1117-2.85 IOUT = 10mA, VIN = 4.85V, TJ = 25C 0 IOUT 800mA, 4.25V VIN 10V 0 IOUT 500mA, VIN = 4.10V LM1117-3.3 IOUT = 10mA, VIN = 5V TJ = 25C 0 IOUT 800mA, 4.75V VIN 10V LM1117-5.0 IOUT = 10mA, VIN = 7V, TJ = 25C 0 IOUT 800mA, 6.5V VIN 12V Copyright (c) 1999-2012, Texas Instruments Incorporated Min (Note 5) Typ (Note 4) Max (Note 5) Units 1.238 1.225 1.250 1.250 1.262 1.270 V V 1.782 1.746 1.800 1.800 1.818 1.854 V V 2.475 2.450 2.500 2.500 2.525 2.550 V V 2.820 2.790 2.790 2.850 2.850 2.850 2.880 2.910 2.910 V V V 3.267 3.235 3.300 3.300 3.333 3.365 V V 4.950 4.900 5.000 5.000 5.050 5.100 V V 5 LM1117/LM1117I Symbol VOUT Typ (Note 4) Max (Note 5) Units 0.035 0.2 % 1 6 mV 1 6 mV 1 6 mV 1 6 mV 1 10 mV 0.2 0.4 % 1 10 mV 1 10 mV 1 10 mV 1 10 mV 1 15 mV IOUT = 100mA 1.10 1.20 V IOUT = 500mA 1.15 1.25 V Parameter Line Regulation (Note 6) Conditions Min (Note 5) LM1117-ADJ IOUT = 10mA, 1.5V VIN-VOUT 13.75V LM1117-1.8 IOUT = 0mA, 3.2V VIN 10V LM1117-2.5 IOUT = 0mA, 3.9V VIN 10V LM1117-2.85 IOUT = 0mA, 4.25V VIN 10V LM1117-3.3 IOUT = 0mA, 4.75V VIN 15V LM1117-5.0 IOUT = 0mA, 6.5V VIN 15V VOUT Load Regulation (Note 6) LM1117-ADJ VIN-VOUT = 3V, 10 IOUT 800mA LM1117-1.8 VIN = 3.2V, 0 IOUT 800mA LM1117-2.5 VIN = 3.9V, 0 IOUT 800mA LM1117-2.85 VIN = 4.25V, 0 IOUT 800mA LM1117-3.3 VIN = 4.75V, 0 IOUT 800mA LM1117-5.0 VIN = 6.5V, 0 IOUT 800mA VIN-V OUT Dropout Voltage (Note 7) IOUT = 800mA ILIMIT Current Limit VIN-VOUT = 5V, TJ = 25C 800 Minimum Load Current LM1117-ADJ (Note 8) VIN = 15V Quiescent Current LM1117-1.8 1.20 1.30 V 1200 1500 mA 1.7 5 mA 5 10 mA 5 10 mA 5 10 mA 5 10 mA 5 10 mA 0.01 0.1 %/W VIN 15V LM1117-2.5 VIN 15V LM1117-2.85 VIN 10V LM1117-3.3 VIN 15V LM1117-5.0 VIN 15V Thermal Regulation TA = 25C, 30ms Pulse Ripple Regulation fRIPPLE =1 20Hz, VIN-VOUT = 3V VRIPPLE = 1VPP Adjust Pin Current Adjust Pin Current Change 6 75 dB 60 120 A 0.2 5 A 10 IOUT 800mA, 1.4V VIN-VOUT 10V Temperature Stability Long Term Stability 60 TA = 125C, 1000Hrs 0.5 % 0.3 % Copyright (c) 1999-2012, Texas Instruments Incorporated LM1117/LM1117I Symbol Parameter Conditions Min (Note 5) Typ (Note 4) Max (Note 5) Units RMS Output Noise (% of VOUT), 10Hz f 10kHz 0.003 % Thermal Resistance Junction-to-Case 3-Lead SOT-223 15.0 C/W 3-Lead TO-220 3.0 C/W 3-Lead TO-252 10 C/W 3-Lead SOT-223 (No heat sink) 136 C/W 3-Lead TO-220 (No heat sink) 79 C/W 3-Lead TO-252 (Note 9) (No heat sink) 92 C/W 3-Lead TO-263 55 C/W 8-Lead LLP(Note 10) 40 C/W Thermal Resistance Junction-to-Ambient (No air flow) LM1117I Electrical Characteristics Typicals and limits appearing in normal type apply for TJ = 25C. Limits appearing in Boldface type apply over the entire junction temperature range for operation, -40C to 125C. Symbol VREF Parameter Reference Voltage Conditions LM1117I-ADJ IOUT = 10mA, VIN-VOUT = 2V, TJ = 25C 10mA IOUT 800mA, 1.4V VIN-VOUT 10V VOUT Output Voltage LM1117I-3.3 IOUT = 10mA, VIN = 5V, TJ = 25C 0 IOUT 800mA, 4.75V VIN 10V LM1117I-5.0 IOUT = 10mA, VIN = 7V, TJ = 25C 0 IOUT 800mA, 6.5V VIN 12V VOUT Line Regulation (Note 6) Min (Note 5) Typ (Note 4) Max (Note 5) Units 1.238 1.200 1.250 1.250 1.262 1.290 V V 3.267 3.168 3.300 3.300 3.333 3.432 V V 4.950 4.800 5.000 5.000 5.050 5.200 V V 0.035 0.3 % 1 10 mV 1 15 mV 0.2 0.5 % 1 15 mV LM1117I-ADJ IOUT = 10mA, 1.5V VIN-VOUT 13.75V LM1117I-3.3 IOUT = 0mA, 4.75V VIN 15V LM1117I-5.0 IOUT = 0mA, 6.5V VIN 15V VOUT Load Regulation (Note 6) LM1117I-ADJ VIN-VOUT = 3V, 10 IOUT 800mA LM1117I-3.3 VIN = 4.75V, 0 IOUT 800mA LM1117I-5.0 VIN = 6.5V, 0 IOUT 800mA VIN-V OUT ILIMIT Dropout Voltage (Note 7) Current Limit 1 20 mV IOUT = 100mA 1.10 1.30 V IOUT = 500mA 1.15 1.35 V IOUT = 800mA 1.20 1.40 V 1200 1500 mA 1.7 5 mA 5 15 mA VIN-VOUT = 5V, TJ = 25C Minimum Load Current LM1117I-ADJ (Note 8) VIN = 15V Quiescent Current 800 LM1117I-3.3 VIN 15V LM1117I-5.0 VIN 15V Thermal Regulation TA = 25C, 30ms Pulse Copyright (c) 1999-2012, Texas Instruments Incorporated 5 15 mA 0.01 0.1 %/W 7 LM1117/LM1117I Symbol Parameter Ripple Regulation Conditions Min (Note 5) Typ (Note 4) 60 75 fRIPPLE =1 20Hz, VIN-VOUT = 3V VRIPPLE = 1VPP Adjust Pin Current Adjust Pin Current Change Max (Note 5) dB 60 120 A 0.2 10 A 10 IOUT 800mA, 1.4V VIN-VOUT 10V Temperature Stability Units 0.5 % 0.3 % (% of VOUT), 10Hz f 10kHz 0.003 % Thermal Resistance Junction-to-Case 3-Lead SOT-223 15.0 C/W 3-Lead TO-252 10 C/W Thermal Resistance Junction-to-Ambient No air flow) 3-Lead SOT-223 (No heat sink) 136 C/W 3-Lead TO-252 (No heat sink)(Note 9) 92 C/W 8-Lead LLP(Note 10) 40 C/W Long Term Stability TA = 125C, 1000Hrs RMS Output Noise Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Note 2: The maximum power dissipation is a function of TJ(max) , JA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max)-TA)/JA. All numbers apply for packages soldered directly into a PC board. Note 3: For testing purposes, ESD was applied using human body model, 1.5k in series with 100pF. Note 4: Typical Values represent the most likely parametric norm. Note 5: All limits are guaranteed by testing or statistical analysis. Note 6: Load and line regulation are measured at constant junction room temperature. Note 7: The dropout voltage is the input/output differential at which the circuit ceases to regulate against further reduction in input voltage. It is measured when the output voltage has dropped 100mV from the nominal value obtained at VIN = VOUT +1.5V. Note 8: The minimum output current required to maintain regulation. Note 9: Minimum pad size of 0.038in2 Note 10: Thermal Performance for the LLP was obtained using JESD51-7 board with six vias and an ambient temperature of 22C. For information about improved thermal performance and power dissipation for the LLP, refer to Application Note AN-1187. 8 Copyright (c) 1999-2012, Texas Instruments Incorporated LM1117/LM1117I Typical Performance Characteristics Dropout Voltage (VIN-V OUT) Short-Circuit Current 10091923 10091922 Load Regulation LM1117-ADJ Ripple Rejection 10091943 LM1117-ADJ Ripple Rejection vs. Current 10091907 Copyright (c) 1999-2012, Texas Instruments Incorporated 10091906 Temperature Stability 10091925 9 LM1117/LM1117I Adjust Pin Current LM1117-2.85 Load Transient Response 10091926 LM1117-5.0 Load Transient Response 10091909 10091908 LM1117-2.85 Line Transient Response 10091910 LM1117-5.0 Line Transient Response 10091911 10 Copyright (c) 1999-2012, Texas Instruments Incorporated LM1117/LM1117I Application Note 1.0 EXTERNAL CAPACITORS/STABILITY 1.1 Input Bypass Capacitor An input capacitor is recommended. A 10F tantalum on the input is a suitable input bypassing for almost all applications. 1.2 Adjust Terminal Bypass Capacitor The adjust terminal can be bypassed to ground with a bypass capacitor (CADJ) to improve ripple rejection. This bypass capacitor prevents ripple from being amplified as the output voltage is increased. At any ripple frequency, the impedance of the CADJ should be less than R1 to prevent the ripple from being amplified: 1/(2*fRIPPLE*CADJ) < R1 The R1 is the resistor between the output and the adjust pin. Its value is normally in the range of 100-200. For example, with R1 = 124 and fRIPPLE = 120Hz, the CADJ should be > 11F. 1.3 Output Capacitor The output capacitor is critical in maintaining regulator stability, and must meet the required conditions for both minimum amount of capacitance and ESR (Equivalent Series Resistance). The minimum output capacitance required by the LM1117 is 10F, if a tantalum capacitor is used. Any increase of the output capacitance will merely improve the loop stability and transient response. The ESR of the output capacitor should range between 0.3 - 22. In the case of the adjustable regulator, when the CADJ is used, a larger output capacitance (22f tantalum) is required. 2.0 OUTPUT VOLTAGE The LM1117 adjustable version develops a 1.25V reference voltage, VREF, between the output and the adjust terminal. As shown in Figure 1, this voltage is applied across resistor R1 to generate a constant current I1. The current IADJ from the adjust terminal could introduce error to the output. But since it is very small (60A) compared with the I1 and very constant with line and load changes, the error can be ignored. The constant current I1 then flows through the output set resistor R2 and sets the output voltage to the desired level. For fixed voltage devices, R1 and R2 are integrated inside the devices. 10091917 FIGURE 1. Basic Adjustable Regulator 3.0 LOAD REGULATION The LM1117 regulates the voltage that appears between its output and ground pins, or between its output and adjust pins. In some cases, line resistances can introduce errors to the voltage across the load. To obtain the best load regulation, a few precautions are needed. Figure 2, shows a typical application using a fixed output regulator. The Rt1 and Rt2 are the line resistances. It is obvious that the VLOAD is less than the VOUT by the sum of the voltage drops along the line resistances. In this case, the load regulation seen at the RLOAD would be degraded from the data sheet specification. To improve this, the load should be tied directly to the output terminal on the positive side and directly tied to the ground terminal on the negative side. Copyright (c) 1999-2012, Texas Instruments Incorporated 11 LM1117/LM1117I 10091918 FIGURE 2. Typical Application using Fixed Output Regulator When the adjustable regulator is used (Figure 3), the best performance is obtained with the positive side of the resistor R1 tied directly to the output terminal of the regulator rather than near the load. This eliminates line drops from appearing effectively in series with the reference and degrading regulation. For example, a 5V regulator with 0.05 resistance between the regulator and load will have a load regulation due to line resistance of 0.05 x IL. If R1 (=125) is connected near the load, the effective line resistance will be 0.05 (1+R2/R1) or in this case, it is 4 times worse. In addition, the ground side of the resistor R2 can be returned near the ground of the load to provide remote ground sensing and improve load regulation. 10091919 FIGURE 3. Best Load Regulation using Adjustable Output Regulator 4.0 PROTECTION DIODES Under normal operation, the LM1117 regulators do not need any protection diode. With the adjustable device, the internal resistance between the adjust and output terminals limits the current. No diode is needed to divert the current around the regulator even with capacitor on the adjust terminal. The adjust pin can take a transient signal of 25V with respect to the output voltage without damaging the device. When a output capacitor is connected to a regulator and the input is shorted to ground, the output capacitor will discharge into the output of the regulator. The discharge current depends on the value of the capacitor, the output voltage of the regulator, and rate of decrease of VIN. In the LM1117 regulators, the internal diode between the output and input pins can withstand microsecond surge currents of 10A to 20A. With an extremely large output capacitor (1000 F), and with input instantaneously shorted to ground, the regulator could be damaged. In this case, an external diode is recommended between the output and input pins to protect the regulator, as shown in Figure 4. 12 Copyright (c) 1999-2012, Texas Instruments Incorporated LM1117/LM1117I 10091915 FIGURE 4. Regulator with Protection Diode 5.0 HEATSINK REQUIREMENTS When an integrated circuit operates with an appreciable current, its junction temperature is elevated. It is important to quantify its thermal limits in order to achieve acceptable performance and reliability. This limit is determined by summing the individual parts consisting of a series of temperature rises from the semiconductor junction to the operating environment. A one-dimensional steadystate model of conduction heat transfer is demonstrated in Figure 5. The heat generated at the device junction flows through the die to the die attach pad, through the lead frame to the surrounding case material, to the printed circuit board, and eventually to the ambient environment. Below is a list of variables that may affect the thermal resistance and in turn the need for a heatsink. RJC (Component Variables) Leadframe Size & Material No. of Conduction Pins Die Size Die Attach Material Molding Compound Size and Material R CA (Application Variables) Mounting Pad Size, Material, & Location Placement of Mounting Pad PCB Size & Material Traces Length & Width Adjacent Heat Sources Volume of Air Ambient Temperatue Shape of Mounting Pad 10091937 FIGURE 5. Cross-sectional view of Integrated Circuit Mounted on a printed circuit board. Note that the case temperature is measured at the point where the leads contact with the mounting pad surface The LM1117 regulators have internal thermal shutdown to protect the device from over-heating. Under all possible operating conditions, the junction temperature of the LM1117 must be within the range of 0C to 125C. A heatsink may be required depending on the maximum power dissipation and maximum ambient temperature of the application. To determine if a heatsink is needed, the power dissipated by the regulator, PD , must be calculated: IIN = IL + IG PD = (VIN-VOUT)I L + VINIG Figure 6 shows the voltages and currents which are present in the circuit. Copyright (c) 1999-2012, Texas Instruments Incorporated 13 LM1117/LM1117I 10091916 FIGURE 6. Power Dissipation Diagram The next parameter which must be calculated is the maximum allowable temperature rise, TR(max): TR(max) = TJ(max)-TA(max) where TJ(max) is the maximum allowable junction temperature (125C), and TA(max) is the maximum ambient temperature which will be encountered in the application. Using the calculated values for TR(max) and PD, the maximum allowable value for the junction-to-ambient thermal resistance (JA) can be calculated: JA = TR(max)/PD If the maximum allowable value for JA is found to be 136C/W for SOT-223 package or 79C/W for TO-220 package or 92 C/W for TO-252 package, no heatsink is needed since the package alone will dissipate enough heat to satisfy these requirements. If the calculated value for JA falls below these limits, a heatsink is required. As a design aid, Table 1 shows the value of the JA of SOT-223 and TO-252 for different heatsink area. The copper patterns that we used to measure these JAs are shown at the end of the Application Notes Section. Figure 7 and Figure 8 reflects the same test results as what are in the Table 1 Figure 9 and Figure 10 shows the maximum allowable power dissipation vs. ambient temperature for the SOT-223 and TO-252 device. Figures Figure 11 and Figure 12 shows the maximum allowable power dissipation vs. copper area (in2) for the SOT-223 and TO-252 devices. Please see AN1028 for power enhancement techniques to be used with SOT-223 and TO-252 packages. *Application Note AN-1187 discusses improved thermal performance and power dissipation for the LLP. TABLE 1. JA Different Heatsink Area Layout Copper Area Top Side (in2)* Thermal Resistance Bottom Side (in2) (JA,C/W) SOT-223 (JA,C/W) TO-252 1 0.0123 0 136 103 2 0.066 0 123 87 3 0.3 0 84 60 4 0.53 0 75 54 5 0.76 0 69 52 6 1 0 66 47 7 0 0.2 115 84 8 0 0.4 98 70 9 0 0.6 89 63 10 0 0.8 82 57 11 0 1 79 57 12 0.066 0.066 125 89 13 0.175 0.175 93 72 14 0.284 0.284 83 61 15 0.392 0.392 75 55 16 0.5 0.5 70 53 *Tab of device attached to topside copper 14 Copyright (c) 1999-2012, Texas Instruments Incorporated LM1117/LM1117I 10091913 FIGURE 7. JA vs. 1oz Copper Area for SOT-223 10091934 FIGURE 8. JA vs. 2oz Copper Area for TO-252 10091912 FIGURE 9. Maximum Allowable Power Dissipation vs. Ambient Temperature for SOT-223 Copyright (c) 1999-2012, Texas Instruments Incorporated 15 LM1117/LM1117I 10091936 FIGURE 10. Maximum Allowable Power Dissipation vs. Ambient Temperature for TO-252 10091914 FIGURE 11. Maximum Allowable Power Dissipation vs. 1oz Copper Area for SOT-223 10091935 FIGURE 12. Maximum Allowable Power Dissipation vs. 2oz Copper Area for TO-252 16 Copyright (c) 1999-2012, Texas Instruments Incorporated LM1117/LM1117I 10091941 FIGURE 13. Top View of the Thermal Test Pattern in Actual Scale Copyright (c) 1999-2012, Texas Instruments Incorporated 17 LM1117/LM1117I 10091942 FIGURE 14. Bottom View of the Thermal Test Pattern in Actual Scale 18 Copyright (c) 1999-2012, Texas Instruments Incorporated LM1117/LM1117I Typical Application Circuits 10091930 Adjusting Output of Fixed Regulators 10091931 Regulator with Reference 10091929 1.25V to 10V Adjustable Regulator with Improved Ripple Rejection 10091927 5V Logic Regulator with Electronic Shutdown* Copyright (c) 1999-2012, Texas Instruments Incorporated 19 LM1117/LM1117I 10091932 Battery Backed-Up Regulated Supply 10091933 Low Dropout Negative Supply 20 Copyright (c) 1999-2012, Texas Instruments Incorporated LM1117/LM1117I Physical Dimensions inches (millimeters) unless otherwise noted 3-Lead SOT-223 NS Package Number MP04A 3-Lead TO-220 NS Package Number T03B Copyright (c) 1999-2012, Texas Instruments Incorporated 21 LM1117/LM1117I 3-Lead TO-263 NS Package Number TS3B 22 Copyright (c) 1999-2012, Texas Instruments Incorporated LM1117/LM1117I 3-Lead TO-252 NS Package Number TD03B 8-Lead LLP NS Package Number LDC08A Copyright (c) 1999-2012, Texas Instruments Incorporated 23 Notes Copyright (c) 1999-2012, Texas Instruments Incorporated IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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