General Description
The MAX4511/MAX4512/MAX4513 are quad, single-
pole/single-throw (SPST), fault-protected analog switch-
es. They are pin-compatible with the industry-standard
nonprotected DG201/DG202/DG213. These new switch-
es feature fault-protected inputs and Rail-to-Rail®signal
handling capability. The normally open (NO_) and
normally closed (NC_) terminals are protected from
overvoltage faults up to 36V during power-up or
power-down. During a fault condition, the NO_ or NC_
terminal becomes an open circuit and only nanoamperes
of leakage current flow from the source, but the switch
output (COM_) furnishes up to 10mA of the appropriate
polarity supply voltage to the load. This ensures unam-
biguous rail-to-rail outputs when a fault begins and ends.
On-resistance is 175Ωmax and is matched between
switches to 10Ωmax. The off-leakage current is only
0.5nA at +25°C and 10nA at +85°C.
The MAX4511 has four normally closed switches. The
MAX4512 has four normally open switches. The
MAX4513 has two normally closed and two normally
open switches.
These CMOS switches can operate with dual power
supplies ranging from ±4.5V to ±18V or a single supply
between +9V and +36V.
All digital inputs have +0.8V and +2.4V logic thresh-
olds, ensuring both TTL- and CMOS-logic compatibility
when using ±15V or a single +12V supply.
Applications
Features
♦±40V Fault Protection with Power Off
±36V Fault Protection with ±15V Supplies
♦All Switches Off with Power Off
♦Rail-to-Rail Signal Handling
♦Output Clamped to Appropriate Supply Voltage
During Fault Condition; No Transition Glitch
♦175Ωmax Signal Paths with ±15V Supplies
♦No Power-Supply Sequencing Required
♦±4.5V to ±18V Dual Supplies
+9V to +36V Single Supply
♦Low Power Consumption, <2mW
♦Four Separately Controlled SPST Switches
♦Pin-Compatible with Industry-Standard
DG411/DG412/DG413, DG201/DG202/DG213
♦TTL- and CMOS-Compatible Logic Inputs with
Single +9V to +15V or ±15V Supplies
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 408-737-7600 ext. 3468.
MAX4511/MAX4512/MAX4513
Quad, Rail-to-Rail, Fault-Protected,
SPST Analog Switches
________________________________________________________________ Maxim Integrated Products 1
TOP VIEW
DIP/SO/TSSOP
MAX4511
LOGIC SWITCH
0
1
ON
OFF
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
IN2
COM2
NC2
V+
V-
NC1
COM1
IN1
MAX4511 N.C.
NC3
COM3
IN3
IN4
COM4
NC4
GND
N.C. = NOT CONNECTED
SWITCHES SHOWN FOR LOGIC "0" INPUT.
ALL SWITCHES ARE OFF WITH POWER REMOVED.
19-4760; Rev 1; 8/02
Ordering Information continued at end of data sheet.
*Contact factory for dice specifications.
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
Ordering Information
PART TEMP RANGE PIN-PACKAGE
MAX4511C/D 0°C to +70°C Dice*
MAX4511CPE 0°C to +70°C 16 Plastic DIP
MAX4511CSE 0°C to +70°C 16 Narrow SO
Continued at end of data sheet.
MAX4511EPE -40°C to +85°C 16 Plastic DIP
MAX4511MJE -55°C to +125°C 16 CERDIP
MAX4511ESE -40°C to +85°C 16 Narrow SO
Pin Configurations/
Functional Diagrams/Truth Tables
ATE Equipment
Data Acquisition
Industrial and Process-
Control Systems
Avionics
Redundant/Backup
Systems
MAX4511CUE 0°C to +70°C 16 TSSOP
MAX4511EUE -40°C to +85°C 16 TSSOP
MAX4511/MAX4512/MAX4513
Quad, Rail-to-Rail, Fault-Protected,
SPST Analog Switches
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS—Dual Supplies
(V+ = +15V, V- = -15V, GND = 0V, TA =T
MIN to TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Note 1: COM_ and IN_ pins are not fault protected. Signals on COM_ or IN_ exceeding V+ or V- are clamped by internal diodes.
Limit forward diode current to maximum current rating.
Note 2: NC_ and NO_ pins are fault protected. Signals on NC_ or NO_ exceeding -36V to +36V may damage the device. These
limits apply with power applied to V+ or V-, or ±40V with V+ = V- = 0.
(Voltages Referenced to GND)
V+ ........................................................................-0.3V to +44.0V
V- .........................................................................-44.0V to +0.3V
V+ to V-................................................................-0.3V to +44.0V
COM_, IN_ (Note 1) ..............................(V- - 0.3V) to (V+ + 0.3V)
NC_, NO_ (Note 2)..................................(V+ - 36V) to (V- + 36V)
NC_, NO_ to COM_ .................................................-36V to +36V
Continuous Current into Any Terminal..............................±30mA
Peak Current into Any Terminal
(pulsed at 1ms, 10% duty cycle)...................................±50mA
Continuous Power Dissipation (TA= +70°C) (Note 2)
Plastic DIP (derate 10.53mW/°C above +70°C) ...........842mW
Narrow SO (derate 8.70mW/°C above +70°C) .............696mW
TSSOP (derate 9.4mW/°C above +70°C) ..................754.7mW
CERDIP (derate 10.00mW/°C above +70°C)................800mW
Operating Temperature Ranges
MAX451_C_ E ......................................................0°C to +70°C
MAX451_E_ E ...................................................-40°C to +85°C
MAX451_MJE .................................................-55°C to +125°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Applies with power on or off
(Note 2)
VCOM_ = ±14V;
VNO_, VCOM = 14V
VCOM_ = ±10V, ICOM_ = 1mA
VCOM_ = ±10V, ICOM_ = 1mA
CONDITIONS
C, E, M
-20 20
nAICOM_(OFF)
-0.5 0.01 0.5
V-36 36VNO_, VNC_
Fault-Protected Analog
Signal Range
∆RON
COM_ -NO_ or COM_ -NC_
On-Resistance Match Between
Channels (Note 4)
Ω
250
RON
COM_ -NO_ or COM_ -NC_
On-Resistance
125 160
UNITS
MIN TYP MAX
(Note 3)
SYMBOLPARAMETER
C, E
+25°C
+25°C
+25°C
TA
Applies with power on or off
(Note 2) C, E, M VV- V+VNO_, VNC_
Fault-Free Analog Signal Range
M
36
Ω
15M
Applies with power on or off
(Note 1) C, E, M VV- - 0.3 V+ + 0.3VCOM_
Non-Protected Analog
Signal Range (COM_ Output)
ANALOG SWITCH
200C, E
C, E 10
COM_ Off Leakage Current
(Note 5)
VCOM_ = ±14V;
VNO_, VCOM = 14V
NO_ or NC_ Off Leakage Current
(Note 5) nA
INO_(OFF),
INC_(OFF)
-0.5 0.01 0.5+25°C
-10 10C, E
-200 200M
±
-10 10C, E
-200 200M
VCOM_ = ±14V nAICOM_(ON)
COM_ On Leakage Current
(Note 5)
-0.5 0.01 0.5+25°C
-400 400M
±
MAX4511/MAX4512/MAX4513
Quad, Rail-to-Rail, Fault-Protected,
SPST Analog Switches
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS—Dual Supplies (continued)
(V+ = +15V, V- = -15V, GND = 0V, TA =T
MIN to TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
VNO_ or VNC_ = ±33V
VNO_ or VNC_ = ±33V
CONDITIONS
+25°C
tON
Turn-On Time 600
kΩRCOM_
COM_ On Output Resistance,
Supplies On
1 2.5
nA
-10 10
ICOM_
COM_ Output Leakage Current,
Supplies On
UNITS
MIN TYP MAX
(Note 3)
SYMBOLPARAMETER
+25°C
+25°C
TA
VNO_ or VNC_ = 33V mAICOM_
COM_ On Output Current,
Supplies On
81113
+25°C
VNO_ or VNC_ = ±40V,
V+ = 0, V- = 0 µA-10 10
INO_, INC_
NO_ or NC_ Input Leakage
Current, Supplies Off M
nA
-200 200
+25°C
M-1 1 µA
1.9 2.4 VVIN_H
IN_ Input Logic Threshold High C, E, M
900M
VCOM_ = ±10V, RL_ = 2kΩ,
Figure 3 nstBBM
Break-Before-Make Time
Delay (MAX4513 Only) 50 100+25°C
-1 0.03 1
VIN_ = 0.8V or 2.4V µAIINH_, IINL
IN_ Input Current Logic High
or Low
+25°C
C, E -200 200
C, E
VNO_ or VNC_ = -33V -12 -10 -7
C, E, M
C, E, M -5 5
C, E
350 500
VCOM_ = ±10V, RL_ = 2kΩ,
Figure 2 ns
tOFF
Turn-Off Time 500C, E
750M
200 400
VCOM_ = ±10V, RL_ = 2kΩ,
Figure 2 ns
+25°C
3
VNO_ or VNC_ = ±25V,
VCOM_ = 10V µA-10 10
INO_, INC_
NO_ or NC_ Off Input Leakage
Current, Supplies On M
nA
-200 200
+25°C
C, E
-20 20
-20 0.1 20
±
SWITCH DYNAMIC CHARAC-
CL= 1.0nF, VNO_ = 0,
RS = 0Ω, Figure 4 pCQCharge Injection (Note 6) 1.5 5+25°C
f = 1MHz, Figure 5 pFCN_(OFF)
NO_ or NC_ Off-Capacitance 10+25°C
f = 1MHz, Figure 5 pFCCOM_(OFF)
COM_ Off-Capacitance 5+25°C
f = 1MHz, Figure 5 pFCCOM_(ON)
COM_ On-Capacitance 10+25°C
LOGIC INPUT
RL= 50Ω, CL= 15pF,
VN_ = 1VRMS, f = 1MHz, Figure 6 dBVCISO
Off Isolation (Note 7) -62+25°C
RL= 50Ω, CL= 15pF,
VN_ = 1VRMS, f = 1MHz, Figure 6 dBVCT
Channel-to-Channel Crosstalk
(Note 9) -66+25°C
0.8 1.9 VVIN_L
IN_ Input Logic Threshold Low C, E, M
FAULT (V+ = +15V, V- = -15V, unless otherwise noted.)
LOGIC INPUT
SWITCH DYNAMIC CHARACTERISTICS
All VIN_ = 0 or 15V
MAX4511/MAX4512/MAX4513
Quad, Rail-to-Rail, Fault-Protected,
SPST Analog Switches
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS—Dual Supplies (continued)
(V+ = +15V, V- = -15V, GND = 0V, TA= TMIN to TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
CONDITIONS UNITS
MIN TYP MAX
(Note 3)
SYMBOLPARAMETER TA
Power-Supply Range V+, V- C,E, M ±4.5 ±18 V
V+ Supply Current I+ All VIN_ = 0 or 5V +25°C 280 400 µA
V- Supply Current I- All VIN_ = 0 or 5V +25°C 90 200 µA
GND Supply Current IGND
All VIN_ = 0 or 15V +25°C -1 0.01 1 µA
600C, E, M
C, E, M 300
C, E, M 10
+25°C 150 250 µA
C, E, M 450
All VIN_ = 5V
POWER SUPPLY
MAX4511/MAX4512/MAX4513
Quad, Rail-to-Rail, Fault-Protected,
SPST Analog Switches
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS—Single +12V Supply
(V+ = +10.8V to +13.2V, V- = 0, TA= TMIN to TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
Applies with power on or off
(Note 2) C, E, M V
Applies with power on or off
(Note 2)
0V+VNO_, VNC_
Fault-Free Analog Signal Range
V+ = 12V; VCOM _ = 0;
VNO_, VNC_ = 12V
V+ = 12V, VCOM_ = 10V,
ICOM_ = 1mA
V+ = 12V, VCOM_ = 10V,
ICOM_ = 1mA M
20
CONDITIONS
C, E, M
Applies with power on or off
(Note 1) C, E, M V-0.3 V+ + 0.3VCOM_
Non-Protected Analog
Signal Range (COM_ Output)
V+ = 12V; VCOM_ = 10V;
VNO_, VNC = 0 or 12V nA
Ω
ION_(OFF),
INC_(OFF)
30M
NO_ or NC_ Off Leakage Current
(Notes 5, 9)
-0.5 0.01 0.5+25°C
nAICOM_(OFF)
COM_ Off Leakage Current
(Notes 5, 9)
-0.5 0.01 0.5
V-36 36VNO_, VNC_
Fault-Protected Analog
Signal Range
∆RON
COM_ -NO_ or COM_ -NC_
On-Resistance Match Between
Channels (Note 4)
Ω
525
RON
COM_ -NO_ or COM_ -NC_
On-Resistance
UNITS
MIN TYP MAX
(Note 3)
SYMBOLPARAMETER
+25°C
C, E
C, E
TA
+25°C
+25°C 410
260 390
450
-10 10C, E
M-200 200
-10 10C, E
-200 200M
V+ = 12V,
VCOM_ = 10V or 12V -20 20C, E nAICOM_(ON)
COM_ On Leakage Current
(Notes 5, 9) -400 400M
-0.5 0.01 0.5+25°C
VNO_ or VNC_ = ±25V,
VCOM_ = 0, V+ = 12V -200 200C, E nA
INO_, INC_
NO_ or NC_ Off Input Leakage
Current, Supply On -10 10M
-20 20+25°C
VNO_ or VNC_ = ±40V,
V+ = 0, V- = 0 -200 200C, E nA
INO_, INC_
NO_ or NC_ Input Leakage
Current, Supply Off -10 10M
-20 0.1 20+25°C
VNO_ or VNC_ = 25V,
V+ = 12V 235mAICOM_
COM_ Output Current,
Supply On +25°C
VNO_ or VNC_ = 10V
V+ = 12V kΩRCOM_
COM_ Output Resistance,
Supply On 2.4 5+25°C
µA
µA
VNO_ or VNC_ = ±30V,
V+ = 12V -200 200C, E nA
ICOM_
COM_ Output Leakage
Current, Supply On -1 1M
-10 10+25°C
µA
FAULT
ANALOG SWITCH
µA
MAX4511/MAX4512/MAX4513
Quad, Rail-to-Rail, Fault-Protected,
SPST Analog Switches
6 _______________________________________________________________________________________
Note 1: COM_ and IN_ pins are not fault protected. Signals on COM_ or IN_ exceeding V+ or V- are clamped by internal diodes.
Limit forward diode current to maximum current rating.
Note 2: NC_ and NO_ pins are fault protected. Signals on NC_ or NO_ exceeding -36V to +36V may damage the device. These
limits apply with power applied to V+ or V-, or ±40V with V+ = V- = 0.
Note 3: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Note 4: ∆RON = ∆RON(MAX) - ∆RON(MIN).
Note 5: Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at TA= +25°C.
Note 6: Guaranteed by design.
Note 7: Off isolation = 20 log10 [ VCOM_ / (VNC_ or VNO_) ], VCOM_ = output, VNC_ or VNO_ = input to off switch.
Note 8: Between any two switches.
Note 9: Leakage testing for single-supply operation is guaranteed by testing with dual supplies.
ELECTRICAL CHARACTERISTICS—Single +12V Supply (continued)
(V+ = +10.8V to +13.2V, V- = 0, TA= TMIN to TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
VCOM_ = 10V, RL_ = 2kΩ,
Figure 2
CONDITIONS
VCOM_ = 10V, RL_ = 2kΩ,
Figure 3
nstON
Turn-On Time
1.8 2.4
500 1000
VVIN_H
IN_ Input Logic Threshold High C, E, M
0.8 1.8 VVIN_L
IN_ Input Logic Threshold Low C, E, M
VCOM_ = 10V, RL_ = 2kΩ,
Figure 2 ns
-1 0.03 1
tOFF
Turn-Off Time 400 900
ns
+25°C
tBBM
Break-Before-Make Time
Delay (MAX4513 Only) 50 100+25°C
VIN_ = 0.8V or 2.4V µAIIN_H, IIN_L
UNITS
MIN TYP MAX
(Note 3)
SYMBOLPARAMETER
IN_ Input Current Logic High
or Low
+25°C
+25°C
TA
LOGIC INPUT
C, E, M -5 5
C, E, M
C, E, M 1500
1200
CL= 1.0nF, VNO_ = 0,
RS= 0Ω, Figure 4 pCQCharge Injection (Note 6) 15+25°C
f = 1MHz, Figure 5 pFCN_ (OFF)
NO_ or NC_ Off Capacitance 9+25°C
VCOM_ = GND, f = 1MHz,
Figure 5 pFCCOM_ (OFF)
COM_ Off Capacitance 9+25°C
VCOM_ = VNO_ = GND,
f = 1MHz, Figure 5 pFCCOM_ (ON)
COM_ On Capacitance 22+25°C
RL= 50Ω, CL= 15pF,
VN_ = 1VRMS, f = 1MHz, Figure 6 dBVISO
Off Isolation (Note 7) -62+25°C
RL= 50Ω, CL= 15pF,
VN_ = 1VRMS, f = 1MHz, Figure 5 dBVCT
Channel-to-Channel Crosstalk
(Note 8) -65+25°C
VV+Power-Supply Range 936C,E, M
All VIN_ = 0 or 5V µAI+V+ Supply Current 150 300+25°C
All VIN_ = 0 or 12V
IGND
V- and GND Supply Current
50 100+25°C
All VIN_ = 5V
µA
150 300+25°C
450C, E, M
C, E, M
C, E, M
200
450
SWITCH DYNAMIC CHARACTERISTICS
POWER SUPPLY
MAX4511/MAX4512/MAX4513
Quad, Rail-to-Rail, Fault-Protected,
SPST Analog Switches
_______________________________________________________________________________________ 7
__________________________________________Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
0
100
50
250
200
150
300
350
-20 -5 0-15 -10 5 10 15 20
SWITCH ON-RESISTANCE
vs. VCOM (DUAL SUPPLIES)
MAX4511-01
VCOM (V)
SWITCH ON-RESISTANCE (Ω)
V+ = +5V
V- = -5V
V+ = +10V
V- = -10V
V+ = +15V
V- = -15V
V+ = +12V
V- = -12V
V+ = +20V
V- = -20V
0
80
60
20
40
160
140
100
120
180
200
-15 -5 0-10 5 10 15
SWITCH ON-RESISTANCE vs. VCOM AND
TEMPERATURE (DUAL SUPPLIES)
MAX4511-02
VCOM (V)
SWITCH ON-RESISTANCE (Ω)
TA = +125°C
TA = -55°C
V+ = +15V
V- = -15V
TA = -40°C
TA = +25°C
TA = +85°C
1000
100
0 5 10 15 20 25 30
SWITCH ON-RESISTANCE
vs. VCOM (SINGLE SUPPLY)
MA4511-03
VCOM (V)
SWITCH ON-RESISITANCE (Ω)
V+ = +12V
V+ = +5V V- = 0
V+ = +15V
V+ = +20V
V+ = +24V
V+ = +30V
0
50
200
150
100
300
350
250
400
0462 8 10 12
SWITCH ON-RESISTANCE vs. VCOM
AND TEMPERATURE (SINGLE SUPPLY)
MAX4511-04
VCOM (V)
SWITCH ON-RESISTANCE (Ω)
TA = +125°CTA = +85°C
TA = +25°CTA = -40°C
TA = -55°C
V+ = +12V
0
300
200
100
700
800
600
500
400
900
1000
0 5 10 15 20
ON AND OFF TIMES
vs. SUPPLY VOLTAGE
MAX4511-07
SUPPLY VOLTAGE (±V)
tON, tOFF (ns)
tON
(SINGLE SUPPLY)
tON
(DUAL SUPPLIES)
tOFF
(DUAL SUPPLIES)
tOFF
(SINGLE
SUPPLY)
1p
10p
100p
1n
10n
100n
-50 0-25 25 50 75 100 125 150
ID(ON), IS(OFF), AND ID(OFF)
LEAKAGES vs. TEMPERATURE
MAX4511-05
TEMPERATURE (°C)
LEAKAGE (A)
INO(OFF) @VNO = -14V,
VCOM = +14V
ICOM(ON) @VNO
= VCOM = +14V
INO(OFF) @VNO = +14V,
VCOM = -14V
ICOM(OFF) @VNO = -14V,
VCOM = +14V
ICOM(OFF) @VNO = +14V,
VCOM = -14V
ICOM(ON) @VNO
= VCOM = -14V
0
2
8
10
6
4
12
14
-15 -10 -5 0 5 10 15
CHARGE INJECTION
vs. VCOM (DUAL SUPPLIES)
MAX4511-06
VCOM (V)
Q (pC)
DUAL ±15V
SUPPLIES
SINGLE +12V
SUPPLY
V+ = +15V
V- = -15V
0
100
300
200
500
400
600
-50 0 25-25 50 75 100 125
ON AND OFF TIMES
vs. TEMPERATURE
MAX4511-08
TEMPERATURE (°C)
tON, tOFF (ns)
tON
tOFF
0
100
300
200
500
400
600
-50 0 25-25 50 75 100 125
POWER-SUPPLY CURRENT
vs. TEMPERATURE
MAX4511-09
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
IV+
IV-
IGND
MAX4511/MAX4512/MAX4513
Quad, Rail-to-Rail, Fault-Protected,
SPST Analog Switches
8 _______________________________________________________________________________________
0
0.5
1.5
1.0
2.5
2.0
3.0
010155 20253035
LOGIC-LEVEL THRESHOLD vs. V+
MAX4511-10
V+ (V)
LOGIC-LEVEL THRESHOLD (V)
Typical Operating Characteristics (continued)
(TA= +25°C, unless otherwise noted.)
0
-10
-20
-120
0.01 0.1 1 10 100 1000
FREQUENCY RESPONSE
-90
-100
-110
MAX186-14A
FREQUENCY (MHz)
LOSS (dB)
PHASE (DEGREES)
-70
-80
-50
-60
-30
-40
120
100
80
-120
-60
-80
-100
-20
-40
20
0
60
40
ON LOSS
OFF LOSS
ON PHASE
NAME FUNCTION
1, 16,
9, 8 IN1–IN4 Logic Control Digital Inputs
2, 15,
10, 7
COM1–
COM4 Analog Switch Common* Terminals
PIN
3, 14,
11, 6
NO1–NO4
or
NC1–NC4
Analog Switch Fault-Protected Normally
Open* or Normally Closed* Terminals
4V- Negative Analog Supply Voltage Input.
Connect to GND for single-supply operation.
13 V+ Positive Analog and Digital Supply-Voltage
Input. Internally connected to substrate.
12 N.C. No Connection—not internally connected
5GND Ground. Connect to digital ground. (Analog
signals have no ground reference.)
Pin Description
*As long as the voltage on NO_ or NC_ does not exceed V+ or
V-, NO_ (or NC_) and COM_ pins are identical and interchange-
able. Either may be considered as an input or output; signals
pass equally well in either direction.
Detailed Description
Overview of Traditional
Fault-Protected Switches
The MAX4511/MAX4512/MAX4513 are fault-protected
CMOS analog switches with unusual operation and
construction. Traditional fault-protected switches are
constructed by three series FETs. This produces good
off characteristics, but fairly high on-resistance when
the signals are within about 3V of each supply rail. As
the voltage on one side of the switch approaches with-
in about 3V of either supply rail (a fault condition), the
switch impedance becomes higher, limiting the output
signal range (on the protected side of the switch) to
approximately 3V less than the appropriate polarity
supply voltage.
During a fault condition, the output current that flows
from the protected side of the switch into its load
comes from the fault source on the other side of the
switch. If the switch is open or the load is extremely
high impedance, the input current will be very low. If
the switch is on and the load is low impedance,
enough current will flow from the source to maintain the
load voltage at 3V less than the supply.
MAX4511/MAX4512/MAX4513
Quad, Rail-to-Rail, Fault-Protected,
SPST Analog Switches
_______________________________________________________________________________________ 9
Overview of MAX4511/MAX4512/MAX4513
The MAX4511/MAX4512/MAX4513 differ considerably
from traditional fault-protection switches, with several
advantages. First, they are constructed with two paral-
lel FETs, allowing very low on-resistance when the
switch is on. Second, they allow signals on the NC_ or
NO_ pins that are within or slightly beyond the supply
rails to be passed through the switch to the COM termi-
nal, allowing rail-to-rail signal operation. Third, when a
signal on NC_ or NO_ exceeds the supply rails by
about 50mV (a fault condition), the voltage on COM_ is
limited to the appropriate polarity supply voltage.
Operation is identical for both fault polarities. The fault-
protection extends to ±36V from GND.
During a fault condition, the NO_ or NC_ input pin
becomes high impedance regardless of the switch
state or load resistance. If the switch is on, the COM_
output current is furnished from the V+ or V- pin by
“booster” FETs connected to each supply pin. These
FETs can typically source or sink up to 10mA.
When power is removed, the fault protection is still in
effect. In this case, the NO_ or NC_ terminals are a vir-
tual open circuit. The fault can be up to ±40V.
The COM_ pins are not fault protected; they act as nor-
mal CMOS switch pins. If a voltage source is connect-
ed to any COM_ pin, it should be limited to the supply
voltages. Exceeding the supply voltage will cause high
currents to flow through the ESD protection diodes,
possibly damaging the device (see Absolute Maximum
Ratings).
Pin Compatibility
These switches have identical pinouts to common non-
fault-protected CMOS switches. Care should be exer-
cised in considering them for direct replacements in
existing printed circuit boards, however, since only the
NO_ and NC_ pins of each switch are fault protected.
Internal Construction
Internal construction is shown in Figure 1, with the ana-
log signal paths shown in bold. A single normally open
V+
NO_
(NC_)
IN_
GND
V-
HIGH
FAULT
LOW
FAULT
ON
N1
P1
P2
COM_
N2
NC SWITCH
-ESD DIODE
NORMALLY OPEN SWITCH CONSTRUCTION
Figure 1. Block Diagram
MAX4511/MAX4512/MAX4513
Quad, Rail-to-Rail, Fault-Protected,
SPST Analog Switches
10 ______________________________________________________________________________________
(NO) switch is shown; the normally closed (NC) config-
uration is identical except the logic-level translator
becomes an inverter. The analog switch is formed by
the parallel combination of N-channel FET N1 and P-
channel FET P1, which are driven on and off simultane-
ously according to the input fault condition and the
logic-level state.
Normal Operation
Two comparators continuously compare the voltage on
the NO_ (or NC_) pin with V+ and V-. When the signal
on NO_ or NC_ is between V+ and V- the switch acts
normally, with FETs N1 and P1 turning on and off in
response to IN_ signals. The parallel combination of
N1 and P1 forms a low-value resistor between NO_ (or
NC_) and COM_ so that signals pass equally well in
either direction.
Positive Fault Condition
When the signal on NO_ (or NC_) exceeds V+ by about
50mV, the high-fault comparator output is high, turning
off FETs N1 and P1. This makes the NO_ (or NC_) pin
high impedance regardless of the switch state. If the
switch state is “off”, all FETs are turned off and both
NO_ (or NC_) and COM_ are high impedance. If the
switch state is “on”, FET P2 is turned on, sourcing cur-
rent from V+ to COM_.
Negative Fault Condition
When the signal on NO_ (or NC_) exceeds V- by about
50mV, the low-fault comparator output is high, turning
off FETs N1 and P1. This makes the NO_ (or NC_) pin
high impedance regardless of the switch state. If the
switch state is “off,” all FETs are turned off and both
NO_ (or NC_) and COM_ are high impedance. If the
switch state is “on,” FET N2 is turned on, sinking cur-
rent from COM_ to V-.
Transient Fault Response and Recovery
When a fast rise-time and fall-time transient on IN_
exceeds V+ or V-, the output (COM_) follows the input
(IN_) to the supply rail with only a few nanoseconds
delay. This delay is due to the switch on-resistance and
circuit capacitance to ground. When the input transient
returns to within the supply rails, however, there is a
longer output recovery time delay. For positive faults, the
recovery time is typically 3.5µs. For negative faults, the
recovery time is typically 1.3µs. These values depend on
the COM_ output resistance and capacitance, and are
not production tested or guaranteed. The delays are not
dependent on the fault amplitude. Higher COM_ output
resistance and capacitance increase recovery times.
COM_ and IN_ Pins
FETs N2 and P2 can source about ±10mA from V+ or V-
to the COM_ pin in the fault condition. Ensure that if the
COM_ pin is connected to a low-resistance load, the
absolute maximum current rating of 30mA is never
exceeded, both in normal and fault conditions.
The GND, COM_, and IN_ pins do not have fault protec-
tion. Reverse ESD-protection diodes are internally con-
nected between GND, COM_, IN_ and both V+ and V-. If
a signal on GND, COM_, or IN_ exceeds V+ or V- by
more than 300mV, one of these diodes will conduct
heavily. During normal operation these reverse-biased
ESD diodes leak a few nanoamps of current to V+ and V-.
Fault-Protection Voltage and Power Off
The maximum fault voltage on the NC_ or NO_ pins is
±36V with power applied and ±40V with power off.
Failure Modes
The MAX4511/MAX4512/MAX4513 are not lightning
arrestors or surge protectors.
Exceeding the fault-protection voltage limits on NO_ or
NC_, even for very short periods, can cause the device
to fail. The failure modes may not be obvious, and fail-
ure in one switch may or may not affect other switches
in the same package.
Ground
There is no connection between the analog signal
paths and GND. The analog signal paths consist of an
N-channel and P-channel MOSFET with their sources
and drains paralleled and their gates driven out of
phase to V+ and V- by the logic-level translators.
V+ and GND power the internal logic and logic-level
translators and set the input logic thresholds. The logic-
level translators convert the logic levels to switched V+
and V- signals to drive the gates of the analog switch-
es. This drive signal is the only connection between the
power supplies and the analog signals. GND, IN_, and
COM_ have ESD-protection diodes to V+ and V-.
IN_ Logic-Level Thresholds
The logic-level thresholds are CMOS and TTL compati-
ble when V+ is +15V. As V+ is raised the threshold
increases slightly, and when V+ reaches 25V the level
threshold is about 2.8V—above the TTL output high
level minimum of 2.4V, but still compatible with CMOS
outputs (see Typical Operating Characteristics).
Increasing V- has no effect on the logic-level thresholds,
but it does increase the gate-drive voltage to the signal
FETs, reducing their on-resistance.
MAX4511/MAX4512/MAX4513
Quad, Rail-to-Rail, Fault-Protected,
SPST Analog Switches
______________________________________________________________________________________ 11
Bipolar Supplies
The MAX4511/MAX4512/MAX4513 operate with bipolar
supplies between ±4.5V and ±18V. The V+ and V- sup-
plies need not be symmetrical, but their difference can
not exceed the absolute maximum rating of 44V.
Single Supply
The MAX4511/MAX4512/MAX4513 operate from a sin-
gle supply between +9V and +36V when V- is connect-
ed to GND.
High-Frequency Performance
In 50Ωsystems, signal response is reasonably flat up to
50MHz (see Typical Operating Characteristics). Above
20MHz, the on-response has several minor peaks that
are highly layout dependent. The problem with high-fre-
quency operation is not turning the switch on, but turn-
ing it off. The off-state switch acts like a capacitor and
passes higher frequencies with less attenuation. At
10MHz, off isolation is about -42dB in 50Ωsystems,
becoming worse (approximately 20dB per decade) as
frequency increases. Higher circuit impedances also
make off isolation worse. Adjacent channel attenuation
is about 3dB above that of a bare IC socket and is due
entirely to capacitive coupling.
50%
tON
V+
0V
+10V
VOUT
VIN_
0V
90%
90%
tOFF
VIN_
V+
VOUT
GND
V+
IN_
NO_ OR NC_
COM_
+10V
MAX4511
MAX4512
MAX4513
2k
50Ω10pF
V-
V-
V- IS CONNECTED TO GND (0V) FOR SINGLE-SUPPLY OPERATION.
Figure 2. Switch Turn-On/Turn-Off Times
Test Circuits/Timing Diagrams
50%
V+
0V
VNO_, VNC_
VOUT
VIN_
0V
80%
tOPEN
V+
VOUT
VIN_
GND V-
V-
2k
V+
IN_
IN_ NO_
NC_
COM_
COM_
+10V
MAX4513
50Ω
10pF
V- IS CONNECTED TO GND (0V) FOR SINGLE-SUPPLY OPERATION.
tR < 5ns
tF < 5ns
Figure 3. MAX4513 Break-Before-Make Interval
MAX4511/MAX4512/MAX4513
Quad, Rail-to-Rail, Fault-Protected,
SPST Analog Switches
12 ______________________________________________________________________________________
0V
V+
VIN_
∆ VOUT IS THE MEASURED VOLTAGE DUE TO CHARGE-
TRANSFER ERROR Q WHEN THE CHANNEL TURNS OFF.
∆ VOUT
V- IS CONNECTED TO GND (0V) FOR SINGLE-SUPPLY OPERATION. Q = ∆ VOUT x CL
VOUT
V+
VOUT
VIN_
GND
V+
V-
V-
IN_ NO_ OR NC_
COM_
MAX4511
MAX4512
MAX4513
50Ω
CL
1000pF
Figure 4. Charge Injection
V- IS CONNECTED TO GND (0V) FOR SINGLE-SUPPLY OPERATION.
V+
V+
GND
V+
V-
V-
IN_
NO_
COM_
MAX4511
MAX4512
MAX4513
NC_
ADDRESS SELECT
1MHz
CAPACITANCE
ANALYZER
Figure 5. COM_, NO_, NC_ Capacitance
Test Circuits/Timing Diagrams (continued)
MAX4511/MAX4512/MAX4513
Quad, Rail-to-Rail, Fault-Protected,
SPST Analog Switches
______________________________________________________________________________________ 13
MEASUREMENTS ARE STANDARDIZED AGAINST SHORT AT SOCKET TERMINALS.
OFF ISOLATION IS MEASURED BETWEEN COM_ AND “OFF” NO_ OR NC_ TERMINALS.
ON LOSS IS MEASURED BETWEEN COM_ AND “ON” NO_ OR NC_ TERMINALS.
CROSSTALK IS MEASURED BETWEEN COM_ TERMINALS WITH ALL SWITCHES ON.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
V- IS CONNECTED TO GND (0V) FOR SINGLE-SUPPLY OPERATION.
V+
GND
MEAS. REF.
V+
V-
V-
IN_
COM_
MAX4511
MAX4512
MAX4513
NO_, NC_
ADDRESS SELECT
10nF
10nF
NETWORK
ANALYZER
50Ω
50Ω50Ω
50ΩOFF ISOLATION = 20 log
ON LOSS = 20 log
CROSSTALK = 20 log
VOUT
VIN
VOUT
VIN
VOUT
VIN
VIN
VOUT
Figure 6. Frequency Response, Off Isolation, and Crosstalk
Test Circuits/Timing Diagrams (continued)
N.C. = NOT CONNECTED
SWITCHES SHOWN FOR LOGIC “0” INPUT.
ALL SWITCHES ARE OFF WITH POWER REMOVED.
DIP/SO
MAX4512
LOGIC SWITCH
0
1
OFF
ON
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
IN2
COM2
NO2
V+
V-
NO1
COM1
IN1
MAX4512 N.C.
NO3
COM3
IN3
IN4
COM4
NO4
GND
TOP VIEW
DIP/SO
MAX4513
LOGIC SWITCHES
1, 4
0
1
OFF
ON
SWITCHES
2, 3
ON
OFF
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
IN2
COM2
NC2
V+
V-
NO1
COM1
IN1
MAX4513 N.C.
NC3
COM3
IN3
IN4
COM4
NO4
GND
Pin Configurations/Functional Diagrams/Truth Tables (continued)
MAX4511/MAX4512/MAX4513
Quad, Rail-to-Rail, Fault-Protected,
SPST Analog Switches
14 ______________________________________________________________________________________
NC1 COM1 IN1 IN2 COM2
V-
GND
NC4
COM4 IN4 IN3 COM3
0.086"
(2.261mm)
0.138"
(3.51mm)
V+
NC2
NC3
MAX4511
NO1 NO2COM1 IN1 IN2 COM2
V-
GND
COM4NO4 IN4 IN3 NO3COM3
0.086"
(2.261mm)
V+
MAX4512
0.138"
(3.51mm)
PART
MAX4512CPE 0°C to +70°C
TEMP RANGE PIN-PACKAGE
16 Plastic DIP
MAX4512CSE 0°C to +70°C 16 Narrow SO
MAX4512C/D 0°C to +70°C Dice*
MAX4512EPE -40°C to +85°C 16 Plastic DIP
MAX4512ESE -40°C to +85°C 16 Narrow SO
MAX4512MJE -55°C to +125°C 16 CERDIP
MAX4513CPE 0°C to +70°C 16 Plastic DIP
MAX4513CSE 0°C to +70°C 16 Narrow SO
MAX4513C/D 0°C to +70°C Dice*
MAX4513EPE -40°C to +85°C 16 Plastic DIP
MAX4513ESE -40°C to +85°C 16 Narrow SO
MAX4513MJE -55°C to +125°C 16 CERDIP
Ordering Information (continued)Chip Topographies
NO1 NC2COM1 IN1 IN2 COM2
V-
GND
COM4NO4 IN4 IN3 NC3COM3
V+
MAX4513
0.086"
(2.261mm)
0.138"
(3.51mm)
TRANSISTOR COUNT: 139
SUBSTRATE CONNECTED TO: V+
*Contact factory for dice specifications.
MAX4512CUE 0°C to +70°C 16 TSSOP
MAX4512EUE -40°C to +85°C 16 TSSOP
MAX4513CUE 0°C to +70°C 16 TSSOP
MAX4513EUE -40°C to +85°C 16 TSSOP
MAX4511/MAX4512/MAX4513
Quad, Rail-to-Rail, Fault-Protected,
SPST Analog Switches
______________________________________________________________________________________ 15
SOICN .EPS
PACKAGE OUTLINE, .150" SOIC
1
1
21-0041 B
REV.DOCUMENT CONTROL NO.APPROVAL
PROPRIETARY INFORMATION
TITLE:
TOP VIEW
FRONT VIEW
MAX
0.010
0.069
0.019
0.157
0.010
INCHES
0.150
0.007
E
C
DIM
0.014
0.004
B
A1
MIN
0.053A
0.19
3.80 4.00
0.25
MILLIMETERS
0.10
0.35
1.35
MIN
0.49
0.25
MAX
1.75
0.050
0.016L0.40 1.27
0.3940.386D
D
MINDIM
D
INCHES
MAX
9.80 10.00
MILLIMETERS
MIN MAX
16 AC
0.337 0.344 AB8.758.55 14
0.189 0.197 AA5.004.80 8
N MS012
N
SIDE VIEW
H 0.2440.228 5.80 6.20
e 0.050 BSC 1.27 BSC
C
HE
eBA1
A
D
0-8
L
1
VARIATIONS:
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
MAX4511/MAX4512/MAX4513
Quad, Rail-to-Rail, Fault-Protected,
SPST Analog Switches
16 ______________________________________________________________________________________
CDIPS.EPS
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
PDIPN.EPS
MAX4511/MAX4512/MAX4513
Quad, Rail-to-Rail, Fault-Protected,
SPST Analog Switches
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600______________________17
© 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
TSSOP4.40mm.EPS
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
