REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
a
ADG784
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2001
CMOS 3 V/5 V, Wide Bandwidth Quad 2:1
Mux in Chip Scale Package
FUNCTIONAL BLOCK DIAGRAM
ADG784
S1A
S1B
D1
S2A
S2B
S3B
S3A
S4A
S4B
D2
D3
D4
IN
EN
1-OF-2
DECODER
FEATURES
Low Insertion Loss and On Resistance: 4 Typical
On-Resistance Flatness <2
Bandwidth >200 MHz
Single 3 V/5 V Supply Operation
Rail-to-Rail Operation
Very Low Distortion: <1%
Low Quiescent Supply Current (100 nA Typical)
Fast Switching Times
tON 10 ns
tOFF 4 ns
TTL/CMOS Compatible
For Functionally Equivalent Devices in 16-Lead QSOP/
SOIC Packages, See ADG774
APPLICATIONS
100VG-AnyLAN
Token Ring 4 Mbps/16 Mbps
ATM25/155
NIC Adapter and Hubs
Audio and Video Switching
Relay Replacement
GENERAL DESCRIPTION
The ADG784 is a monolithic CMOS device comprising four
2:1 multiplexer/demultiplexers with high impedance outputs.
The CMOS process provides low power dissipation yet gives
high switching speed and low on resistance. The on-resistance
variation is typically less than 0.5 Ω with an input signal ranging
from 0 V to 5 V.
The bandwidth of the ADG784 is greater than 200 MHz and
this, coupled with low distortion (typically 0.5%), makes the
part suitable for switching fast ethernet signals.
The on-resistance profile is very flat over the full analog input
range ensuring excellent linearity and low distortion when switch-
ing audio signals. Fast switching speed, coupled with high signal
bandwidth, also makes the parts suitable for video signal switch-
ing. CMOS construction ensures ultralow power dissipation
making the parts ideally suited for portable and battery powered
instruments.
The ADG784 operates from a single 3.3 V/5 V supply and is
TTL logic compatible. The control logic for each switch is shown
in the Truth Table.
These switches conduct equally well in both directions when
ON, and have an input signal range that extends to the sup-
plies. In the OFF condition, signal levels up to the supplies
are blocked. The ADG784 switches exhibit break-before-
make switching action.
PRODUCT HIGHLIGHTS
1. Also Available as ADG774 in 16-Lead QSOP and SOIC.
2. Wide Bandwidth Data Rates >200 MHz.
3. Ultralow Power Dissipation.
4. Extended Signal Range.
The ADG784 is fabricated on a CMOS process giving an
increased signal range that fully extends to the supply rails.
5. Low Leakage over Temperature.
6. Break-Before-Make Switching.
This prevents channel shorting when the switches are config-
ured as a multiplexer.
7. Crosstalk is typically –70 dB @ 30 MHz.
8. Off isolation is typically –60 dB @ 10 MHz.
9. Available in Chip Scale Package (CSP).
REV. 0
–2–
ADG784–SPECIFICATIONS
B Version
T
MIN
to
Parameter 25CT
MAX
Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
DD
V
On Resistance (R
ON
) 2.2 Ω typ V
D
= 0 V to V
DD
, I
S
= –10 mA
5Ω max
On Resistance Match Between
Channels (∆R
ON
)0.15 Ω typ V
D
= 0 V to V
DD
, I
S
= –10 mA
0.5 Ω max
On Resistance Flatness (R
FLAT(ON)
)0.5 Ω typ V
D
= 0 V to V
DD
; I
S
= –10 mA
1Ω max
LEAKAGE CURRENTS
Source OFF Leakage I
S
(OFF) ±0.01 nA typ V
D
= 4.5 V, V
S
= 1 V; V
D
= 1 V, V
S
= 4.5 V;
±0.5 ±1 nA max Test Circuit 2
Drain OFF Leakage I
D
(OFF) ±0.01 nA typ V
D
= 4.5 V, V
S
= 1 V; V
D
= 1 V, V
S
= 4.5 V;
±0.5 ±1 nA max Test Circuit 2
Channel ON Leakage I
D
, I
S
(ON) ±0.01 nA typ V
D
= V
S
= 4.5 V; V
D
= V
S
= 1 V; Test Circuit 3
±0.5 ±1 nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.4 V min
Input Low Voltage, V
INL
0.8 V max
Input Current
I
INL
or I
INH
0.001 µA typ V
IN
= V
INL
or V
INH
±0.5 µA max
DYNAMIC CHARACTERISTICS
2
t
ON
10 ns typ R
L
= 100 Ω, C
L
= 35 pF,
20 ns max V
S
= 3 V; Test Circuit 4
t
OFF
4 ns typ R
L
= 100 Ω, C
L
= 35 pF,
8 ns max V
S
= 3 V; Test Circuit 4
Break-Before-Make Time Delay, t
D
5 ns typ R
L
= 100 Ω, C
L
= 35 pF,
1 ns min V
S1
= V
S2
= 5 V; Test Circuit 5
Off Isolation –65 dB typ R
L
= 100 Ω, f = 10 MHz; Test Circuit 7
Channel-to-Channel Crosstalk –75 dB typ R
L
= 100 Ω, f = 10 MHz; Test Circuit 8
Bandwidth –3 dB 240 MHz typ R
L
= 100 Ω; Test Circuit 6
Distortion 0.5 % typ R
L
= 100 Ω
Charge Injection 10 pC typ C
L
= 1 nF; Test Circuit 9
C
S
(OFF) 10 pF typ f = 1 kHz
C
D
(OFF) 20 pF typ f = 1 kHz
C
D
, C
S
(ON) 30 pF typ f = 1 MHz
POWER REQUIREMENTS V
DD
= 5.5 V
Digital Inputs = 0 V or V
DD
I
DD
1µA max
0.001 µA typ
I
IN
1µA typ V
IN
= 5 V
I
O
100 mA max V
S
/V
D
= 0 V
NOTES
1
Temperature ranges are as follows: B Version, –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(VDD = 5 V 10%, GND = 0 V. All specifications TMIN to TMAX unless otherwise noted.)
SINGLE SUPPLY
REV. 0 –3–
ADG784
B Version
T
MIN
to
Parameter 25CT
MAX
Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
DD
V
On Resistance (R
ON
)4 Ω typ V
D
= 0 V to V
DD
, I
S
= –10 mA
10 Ω max
On Resistance Match Between
Channels (∆R
ON
)0.15 Ω typ V
D
= 0 V to V
DD
, I
S
= –10 mA
0.5 Ω max
On Resistance Flatness (R
FLAT(ON)
)2Ω typ V
D
= 0 V to V
DD
, I
S
= –10 mA
4Ω max
LEAKAGE CURRENTS
Source OFF Leakage I
S
(OFF) ±0.01 nA typ V
D
= 3 V, V
S
= 1 V; V
D
= 1 V, V
S
= 3 V;
±0.5 ±1 nA max Test Circuit 2
Drain OFF Leakage I
D
(OFF) ±0.01 nA typ V
D
= 3 V, V
S
= 1 V; V
D
= 1 V, V
S
= 3 V;
±0.5 ±1 nA max Test Circuit 2
Channel ON Leakage I
D
, I
S
(ON) ±0.01 nA typ V
D
= V
S
= 3 V; V
D
= V
S
= 1 V; Test Circuit 3
±0.5 ±1 nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.0 V min
Input Low Voltage, V
INL
0.4 V max
Input Current
I
INL
or I
INH
0.001 µA typ V
IN
= V
INL
or V
INH
±0.5 µA max
DYNAMIC CHARACTERISTICS
2
t
ON
12 ns typ R
L
= 100 Ω, C
L
= 35 pF,
25 ns max V
S
= 1.5 V; Test Circuit 4
t
OFF
5 ns typ R
L
= 100 Ω, C
L
= 35 pF,
10 ns max V
S
= 1.5 V; Test Circuit 4
Break-Before-Make Time Delay, t
D
5 ns typ R
L
= 100 Ω, C
L
= 35 pF,
1 ns min V
S1
= V
S2
= 3 V; Test Circuit 5
Off Isolation –65 dB typ R
L
= 50 Ω, f = 10 MHz; Test Circuit 7
Channel-to-Channel Crosstalk –75 dB typ R
L
= 50 Ω, f = 10 MHz; Test Circuit 8
Bandwidth –3 dB 240 MHz typ R
L
= 50 Ω; Test Circuit 6
Distortion 2 % typ R
L
= 50 Ω
Charge Injection 3 pC typ C
L
= 1 nF; Test Circuit 9
C
S
(OFF) 10 pF typ f = 1 kHz
C
D
(OFF) 20 pF typ f = 1 kHz
C
D
, C
S
(ON) 30 pF typ f = 1 MHz
POWER REQUIREMENTS V
DD
= 3.3 V
Digital Inputs = 0 V or V
DD
I
DD
1µA max
0.001 µA typ
I
IN
1µA typ V
IN
= 3 V
I
O
100 mA max V
S
/V
D
= 0 V
NOTES
1
Temperature ranges are as follows: B Version, –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(VDD = 3 V 10%, GND = 0 V. All specifications TMIN to TMAX unless otherwise noted.)
SINGLE SUPPLY
Table I. Truth Table
EN IN D1 D2 D3 D4 Function
1 X Hi-Z Hi-Z Hi-Z Hi-Z DISABLE
0 0 S1A S2A S3A S4A IN = 0
0 1 S1B S2B S3B S4B IN = 1
REV. 0
ADG784
–4–
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG784 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= 25°C unless otherwise noted.)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
Analog, Digital Inputs
2
. . . . . . . . . . –0.3 V to V
DD
+ 0.3 V or
30 mA, Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 100 mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Chip Scale Package
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 32°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
PIN CONFIGURATION
NC = NO CONNECT
NOTE: EXPOSED PAD TIED TO SUBSTRATE, GND.
15 S4A
14 S4B
13 D4
12 S3A
S1A 1
S1B 2
D1 3
20 IN
11 S3B
D2 6
NC 7
GND 8
NC 9
D3 10
S2A 4
S2B 5
19 NC
18 VDD
17 NC
16 EN
PIN 1
INDICATOR
TOP VIEW
ADG784
TERMINOLOGY
V
DD
Most Positive Power Supply Potential.
GND Ground (0 V) Reference.
S Source Terminal. May be an input or output.
D Drain Terminal. May be an input or output.
IN Logic Control Input.
EN Logic Control Input.
R
ON
Ohmic resistance between D and S.
∆R
ON
On Resistance match between any two channels
i.e., R
ON
max – R
ON
min.
R
FLAT(ON)
Flatness is defined as the difference between
the maximum and minimum value of on resis-
tance as measured over the specified analog
signal range.
I
S
(OFF) Source Leakage Current with the switch “OFF.”
I
D
(OFF) Drain Leakage Current with the switch “OFF.”
I
D
, I
S
(ON) Channel Leakage Current with the switch “ON.”
V
D
(V
S
) Analog Voltage on Terminals D, S.
C
S
(OFF) “OFF” Switch Source Capacitance.
C
D
(OFF) “OFF” Switch Drain Capacitance.
C
D
, C
S
(ON) “ON” Switch Capacitance.
t
ON
Delay between applying the digital control input
and the output switching on. See Test Circuit 4.
t
OFF
Delay between applying the digital control input
and the output switching Off.
t
D
“OFF” time or “ON” time measured between
the 90% points of both switches, when switching
from one address state to another. See Test
Circuit 5.
Crosstalk A measure of unwanted signal that is coupled
through from one channel to another as a result
of parasitic capacitance.
Off Isolation A measure of unwanted signal coupling through an
“OFF” switch.
Bandwidth Frequency response of the switch in the ON
state measured at 3 dB down.
Distortion R
FLAT(ON)
/R
L
ORDERING GUIDE
Model Temperature Range Package Description Package Option
ADG784BCP –40°C to +85°C Chip Scale Package CP-20
REV. 0
T
A
= 25C
V
S
OR V
D
DRAIN OR SOURCE VOLTAGE – V
1.3 2.5 3.7 4.9
5.0
4.5
0
R
ON
–
2.0
1.5
1.0
0.5
3.0
2.5
3.5
4.0
V
DD
= 2.7V
V
DD
= 3.0V
V
DD
= 4.5V
V
DD
= 5.0V
TPC 1. On Resistance as a Function of V
D
(V
S
) for
Various Single Supplies
VDD = 5V
3.0
0
RON –
1.5
1.0
0.5
2.0
2.5
VS OR VO DRAIN OR SOURCE VOLTAGE – V
1.3 2.5 3.7 4.9
+85C
+25C
–40C
TPC 2. On Resistance as a Function of V
D
(V
S
) for
Different Temperatures with 5 V Single Supplies
+85C
+25C
–40C
4.5
0
R
ON
–
2.0
1.5
1.0
3.0
2.5
3.5
4.0
0.5
V
DD
= 3V
V
S
OR V
D
DRAIN OR SOURCE VOLTAGE – V
0.6 1.1 1.6 2.1 2.6
TPC 3. On Resistance as a Function of V
D
(V
S
) for
Different Temperatures with 3 V Single Supplies
VDD = 5V
FREQUENCY – Hz
0
10M10k
ON RESPONSE – dB
–4
–2
100k 1M 100M
–6
TPC 4. On Response vs. Frequency
FREQUENCY – Hz
0
–10
–100
100k 1G1M 10M 100M
–40
–70
–80
–90
–20
–30
–60
–50
ATTENUATION – dB
VDD = 5V
RL = 100
TPC 5. Off Isolation vs. Frequency
FREQUENCY – Hz
0
–10
–100
100k 1G1M 10M 100M
–40
–70
–80
–90
–20
–30
–60
–50
ATTENUATION – dB
V
DD
= 5V
R
L
= 100
V
P-P
= 0.316V
TPC 6. Crosstalk vs. Frequency
Typical Performance Characteristics–ADG784
–5–
REV. 0
ADG784
–6–
ADG784
TRANSFORMER
TX1
TX2
RX1
RX2
10 BASE TX+
10 BASE TX–
100 BASE TX+
100 BASE TX–
10 BASE TX+
10 BASE TX–
100 BASE TX+
100 BASE TX–
10 BASE TX
100 BASE TX
RJ45
Figure 1. Full Duplex Transceiver
Figure 4. Line Clamp
120100
Figure 3. Line Termination
TX1
RX1
Figure 2. Loop Back
SOURCE VOLTAGE – V
20
5
–10
15
10
0
–5
0 5.00.5 1.0 1.5 2.0 2.5
3.0
3.5 4.0 4.5
CHARGE INJECTION – pC
V
DD
= 5V
T
A
= 25 C
TPC 7. Charge Injection vs. Source Voltage
REV. 0
ADG784
–7–
Test Circuits
I
DS
V1
SD
V
S
R
ON
= V1/I
DS
Test Circuit 1. On Resistance
SD
VS
A A
VD
IS (OFF) ID (OFF)
Test Circuit 2. Off Leakage
SD
VS
A
VD
ID (ON)
Test Circuit 3. On Leakage
0.1F
5V
V
S
IN
SD
V
DD
GND
R
L
100
C
L
35pF
V
OUT
EN
3V
50% 50%
90% 90%
V
IN
V
OUT
t
ON
t
OFF
Test Circuit 4. Switching Times
0.1F
5V
V
S
EN
S1A
D1
V
DD
GND
R
L
100
C
L
35pF
V
OUT
S1B
DECODER
V
S
50% 50%
V
IN
V
OUT
tDtD
50% 50%
3V
0V
V
S
Test Circuit 5. Break-Before-Make Time Delay
0.1F
V
DD
GND
EN
50
V
OUT
V
S
IN
D1
V
IN
S1A
ADG784
50
NETWORK
ANALYZER
Test Circuit 6. Bandwidth
0.1F
V
DD
GND
EN
50
V
OUT
V
S
IN
D1
V
IN
S1A
ADG784
50
NETWORK
ANALYZER
50
Test Circuit 7. Off Isolation
REV. 0
–8–
C02374–2.5–4/01(0)
PRINTED IN U.S.A.
ADG784
PRINTED IN U.S.A.
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
20-Lead CSP
(CP-20)
1
20
5
6
11
16
15
BOTTOM
VIEW
10
0.080 (2.25)
0.083 (2.10) SQ
0.077 (1.95)
0.024 (0.60)
0.017 (0.42)
0.009 (0.24)
0.024 (0.60)
0.017 (0.42)
0.009 (0.24)
0.030 (0.75)
0.022 (0.60)
0.014 (0.50)
0.012 (0.30)
0.009 (0.23)
0.007 (0.18)
0.080 (2.00)
REF
0.010 (0.25)
MIN
0.020 (0.50)
BSC
12MAX
0.008 (0.20)
REF
0.031 (0.80) MAX
0.026 (0.65) NOM
0.002 (0.05)
0.0004 (0.01)
0.0 (0.0)
0.035 (0.90) MAX
0.033 (0.85) NOM
SEATING
PLANE
CONTROLLING DIMENSIONS ARE IN MILLIMETERS
PIN 1
INDICATOR
TOP
VIEW
0.148 (3.75)
BSC SQ
0.157 (4.0)
BSC SQ
0.1F
V
DD
GND
EN
IN
V
IN
50
V
S
D1
S2A
ADG784
D2
50
NETWORK
ANALYZER
V
OUT
S1A
50
Test Circuit 8. Channel-to-Channel Crosstalk
5V
EN
S1A
VDD
CL
1nF
S1B
VIN
VOUT
3V
VOUT
QINJ = CL  VOUT
CL
1nF
CL
1nF
CL
1nF
D1 VOUT
D2 VOUT
D3 VOUT
D4 VOUT
ADG784
1-OF-2
DECODER
IN
S2A
S2B
S3A
S3B
S4A
S4B
VS
RS
Test Circuit 9. Charge Injection