Winbond ACPI-STR Controller W83305S W83305G W83305S/W83305G W83305S Data Sheet Revision History PAGES 1 DATES VERSION Apr./06 0.5 VERSION ON WEB N.A. MAIN CONTENTS All version before 0.5 are for internal use only Please note that all data and specifications are subject to change without notice. All the trademarks of products and companies mentioned in this datasheet belong to their respective owners. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales. -I- Publication Release Date: April, 2006 Revision 0.5 W83305S/W83305G Table of Contents1. GENERAL DESCRIPTION ......................................................................................................... 1 2. FEATURES ................................................................................................................................. 1 3. PIN CONFIGURATION ............................................................................................................... 1 4. PIN DESCRIPTION..................................................................................................................... 2 5. REGISTER DESCRIPTION ........................................................................................................ 3 5.1 CR01 (VAGP Over-clocking Configuration Register, Default 0x00h, Read/Write) ........ 3 5.2 CR02 (VRAM Over-clocking Configuration Register, Default 0x00h, Read/Write) ........ 3 5.3 Index 4Ch - Winbond Vendor ID (Low Byte) .................................................................. 4 5.4 Index 4Dh - Winbond Vendor ID (High Byte) ................................................................. 4 5.5 Chip ID -- Index 4Eh ....................................................................................................... 4 5.6 Reversion ID -- Index 4Fh............................................................................................... 4 6. APPLICATION CIRCUIT............................................................................................................. 5 7. INTERNAL BLOCK DIAGRAM ................................................................................................... 5 8. ELECTRICAL CHARACTERISTICS........................................................................................... 6 9. PACKAGE SPECIFICATION ...................................................................................................... 7 10. ORDERING INFORMATION ...................................................................................................... 8 11. HOW TO READ THE TOP MARKING........................................................................................ 8 - II - W83305S/W83305G 1. GENERAL DESCRIPTION W83305S is a new power management IC which compliant ACPI specification 2.0 for desktop PC and motherboard. The chip regulates two most voltage-relative powers for DDR SDRAM and AGP slot applications. As the two devices on board, a stable, reliable, and programmable power should be performed for higher reliability, stability, compatibility and better-performance for diverse combination of devices (RAM module and AGP card). The chip is operated basing on a simple dual-wire bus SMBus. Via SMBus control, the power for DDR SDRAM can be adjusted ranging from 2.50V to 3.00V; and the power for AGP slot can be adjusted ranging from 1.50V to 2.00V with 50mV/step. Besides for safety consideration, linear under voltage and soft-start are applied on the two regulated powers. With design of W83305S, a cost-effective, sample, modular, stable, reliable, flexible and highperformance power solution is provides for the motherboard and desktop PC design. 2. FEATURES y Provides ACPI-Compliant Voltages - Programmable 2.55VSTR Power for DDR SDRAM - Programmable 1.55VCC Power for AGP Slot y I2C Interface y Internal Charge Pump Support Voltage Up to 9.5V y Drive All N-Channel MOSFET y Soft Start y Under-Voltage Protection for VAGP, VRAM y Small footprint package 14-SOP 150mil 3. PIN CONFIGURATION S4# 1 14 S3# SDA 2 13 VAGP_SEN SCL 3 SS 4 VCC5 5 VRAM_SEN 6 9 CIN VRAM_DRV 7 8 GND inbond W83305S 12 VAGP_DRV 11 5VSB 10 CHARPMP -1- Publication Release Date: April, 2006 Revision 0.5 W83305S/W83305G 4. PIN DESCRIPTION NO NAME I/O FUNCTION DESCRIPTION 1 S4# IST ACPI control signal. 2 SDA I/O 3 SCL I 4 SS I 5 VCC5 6 VRAM_SEN I 7 VRAM_DRV O 8 GND P 9 CIN I 10 CHRPMP P 11 5VSB P 12 VAGP_DRV O 13 VAGP_SEN I 14 S3# I2C Interface Pins. The address is defined as 5EH (0101 111X), and X is used to control read/write. Soft-Start Pin. Attach an external capacitor (0.1u) on this pin to adjust the soft-start slope-rate. IST Power VCC5 Input. Linear Regulator for DDR SDRAM. Power Ground. Charge Pump Pins. It supports 5mA driving current and insures output voltage 10V or above. Power Pin. Linear Regulator for AGP slot. IST ACPI Control Signal. -2- W83305S/W83305G 5. REGISTER DESCRIPTION 5.1 5.2 CR01 (VAGP Over-clocking Configuration Register, Default 0x00h, Read/Write) BIT0 BIT1 BIT2 VAGP OUTPUT (V) 0 0 0 1.55 0 0 1 1.50 0 1 0 1.60 0 1 1 1.65 1 0 0 1.70 1 0 1 1.80 1 1 0 1.90 1 1 1 2.00 CR02 (VRAM Over-clocking Configuration Register, Default 0x00h, Read/Write) BIT0 BIT1 BIT2 VRAM OUTPUT (V) 0 0 0 2.55 0 0 1 2.50 0 1 0 2.60 0 1 1 2.65 1 0 0 2.70 1 0 1 2.80 1 1 0 2.90 1 1 1 3.00 CR03 (Linear Under Voltage Enable/Disable Register, Default 0x03h, Read/Write) Bit1: Linear under voltage protection enable/disable bit for VAGP 0: Disable 1: Enable Bit0: Linear under voltage protection enable/disable bit for VRAM 0: disable 1: Enable -3- Publication Release Date: April, 2006 Revision 0.5 W83305S/W83305G 5.3 Index 4Ch - Winbond Vendor ID (Low Byte) Power-on default [7:0] = 1010, 0011 b (A3h) BIT 7:0 5.4 NAME VIDL[7:0] READ/WRITE Read Only DESCRIPTION Vendor ID Low Byte. Default A3h. Index 4Dh - Winbond Vendor ID (High Byte) Power-on default [7:0] = 0101, 1100 b (5Ch) BIT 7:0 5.5 NAME VIDH[7:0] READ/WRITE Read Only DESCRIPTION Vendor ID High Byte. Default 5Ch Chip ID -- Index 4Eh Power on default [7:0] = 1010, 0000 b BIT 7-0 5.6 NAME CHIPID[7:0] READ/WRITE Read Only DESCRIPTION Winbond Chip ID number. Read this register will return 0xa0h for W83305S. Reversion ID -- Index 4Fh Power on default [7:0] = 0000, 0000 b BIT 7-0 NAME CHIPID[7:0] READ/WRITE Read Only DESCRIPTION Winbond Chip ID number. Read this register will return 0x00h for W83305S. -4- W83305S/W83305G 6. APPLICATION CIRCUIT VCC3 3VDUAL/3VSTR Support S3 State D1 VCC3 Only Support S0 State C3 0.1U C4 0.1U 2 C7 0.1U 1 2 3 4 5 6 7 S4# SDA SCL C6 4000U VCC5 S4# SDA SCL SS VCC5 VRAM_SEN VRAM_DRV S3# VAGP_SEN VAGP_DRV 5VSB CHARPMP CIN GND 14 13 12 11 10 9 8 1 VAGP S3# 2 3 U1 Q2 NMOS 1 Q1 NMOS 1 3VDUAL/3VSTR/VCC3 VRAM C1 100U BAT54S/SOT 3 3 2 5VSB C5 2000U R1 5VSB W83305R C2 0.1U C8 0.1U C9 1U 5 7. INTERNAL BLOCK DIAGRAM 5VSB SDA ChrPmp Charge Pump SS SCL CIN To Power MOS drivers VRAM_DRV VRAM_SEN I2C Interface Monitor and Control VAGP_DRV VAGP_SEN S3# S4# ACPI Control Signal 1.2 V VCC5 -5- GND Publication Release Date: April, 2006 Revision 0.5 W83305S/W83305G 8. ELECTRICAL CHARACTERISTICS AC Characteristics VCC=5V 5 %, TA = 0C TO +70C PARAMETER VAGP REGULATOR 0 SYMBOL MIN TYP MAX UNITS TEST CONDITIONS Nominal Output Voltage Nominal Output Voltage Nominal Output Voltage Nominal Output Voltage Nominal Output Voltage Nominal Output Voltage 1.55 1.50 1.60 1.65 1.70 1.80 V V V V V V CR01(bit0,bit1,bit2)=000 CR01(bit0,bit1,bit2)=001 CR01(bit0,bit1,bit2)=010 CR01(bit0,bit1,bit2)=011 CR01(bit0,bit1,bit2)=100 CR01(bit0,bit1,bit2)=101 Nominal Output Voltage Nominal Output Voltage Regulation Under-Voltage Falling Threshold VAGP_DRV Output Voltage 1.90 2.00 V V % % CR01(bit0,bit1,bit2)=110 CR01(bit0,bit1,bit2)=111 V CR0F=80h I(VAGP_DRV) < 0.1mA V V V V V V V V % % CR02(bit0,bit1,bit2)=000 CR02(bit0,bit1,bit2)=001 CR02(bit0,bit1,bit2)=010 CR02(bit0,bit1,bit2)=011 CR02(bit0,bit1,bit2)=100 CR02(bit0,bit1,bit2)=101 CR02(bit0,bit1,bit2)=110 CR02(bit0,bit1,bit2)=111 V I(VRAM_2.5_DRV) 0.1mA 5 73.3 % 8 VRAM2.5 REGULATOR Nominal Output Voltage Nominal Output Voltage Nominal Output Voltage Nominal Output Voltage Nominal Output Voltage Nominal Output Voltage Nominal Output Voltage Nominal Output Voltage Regulation Under-Voltage Falling Threshold MAX VRAM_2.5_DRV Output Voltage 2.55 2.50 2.60 2.65 2.70 2.80 2.90 3.00 5 76% 8 CHARGE PUMP Charge Pump Frequency Charge Pump Voltage 160 9.2 200 9.5 LOGIC LEVEL 240 HIGH S3 2.550.3V 2.550.3V S4 2.550.3V 2.550.3V -6- KHz LOW < W83305S/W83305G 9. PACKAGE SPECIFICATION 8 14 c E HE L 7 1 D 0.25 O A Y SEATING PLANE e GAUGE PLANE A1 b Control demensions are in milmeters . SYMBOL A A1 b c E D e HE Y L DIMENSION IN MM MAX. MIN. 1.35 1.75 0.10 0.25 0.51 0.33 0.19 0.25 3.80 4.00 8.75 8.55 1.27 BSC 6.20 5.80 0.10 0.40 1.27 0 8 DIMENSION IN INCH MIN. MAX. 0.053 0.069 0.010 0.004 0.013 0.020 0.008 0.010 0.150 0.157 0.344 0.337 0.050 BSC 0.228 0.016 0 -7- 0.244 0.004 0.050 8 Publication Release Date: April, 2006 Revision 0.5 W83305S/W83305G 10. ORDERING INFORMATION PART NO. PACKAGE REMARKS W83305S 14-SSOP Operation - Commercial 0~70 W83305G 14 SSOP Operation - Commercial 0~70 PB-free package 11. HOW TO READ THE TOP MARKING W83305S 1135968D-M 539GA W83305G 1135968D-M 539GA Left Line: Winbond Logo 1st Line: IC Part No - W83305S,W83305G(Pb-free package) 2nd Line: IC Lot No - XXXXXXXX 3rd Line: Assembly Date (X: Assembly Year + XX: Assembly Week) + Assembly House Code (G- GR; O- OSE; A- ASE, etc...) + IC Version (X) -8- W83305S/W83305G Please note that all data and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this data sheet belong to their respective owners. Important Notice Winbond products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other applications intended to support or sustain life. Further more, Winbond products are not intended for applications wherein failure of Winbond products could result or lead to a situation wherein personal injury, death or severe property or environmental damage could occur. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales. -9- Publication Release Date: April, 2006 Revision 0.5