© Semiconductor Components Industries, LLC, 2014
October, 2014 − Rev. 0 1Publication Order Number:
LM324S/D
LM324S, LM2902S
Single Supply Quad
Operational Amplifiers
The LM324S and LM2902S are low−cost, quad operational
amplifiers with true differential inputs. They have several distinct
advantages over standard operational amplifier types in single supply
applications. The common mode input range includes the negative
supply, thereby eliminating the necessity for external biasing
components in many applications. The output voltage range also
includes the negative power supply voltage.
Features
Short Circuited Protected Outputs
True Differential Input Stage
Single Supply Operation: 3.0 V to 32 V
Four Amplifiers Per Package
Internally Compensated
Common Mode Range Extends to Negative Supply
Industry Standard Pinouts
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
PIN CONNECTIONS
8
Out 4
Inputs 4
VEE, GND
Inputs 3
Out 3
9
10
11
12
13
14
2
Out 1
VCC
Out 2
1
3
4
5
6
7
*
)
Inputs 1
Inputs 2
(Top View)
4
23
1
)
*
*
)
)
*
See detailed ordering and shipping information on page 7 o
f
this data sheet.
ORDERING INFORMATION
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MARKING DIAGRAMS
1PDIP−14
N SUFFIX
CASE 646
LMxxxx = Specific Device Code
A = Assembly Location
WL = Wafer Lot
Y, YY = Year
WW = Work Week
G = Pb−Free Package
LM324SN
AWLYYWWG
1
14
LM2902SN
AWLYYWWG
1
14
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2
MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)
Rating Symbol Value Unit
Power Supply Voltages Vdc
Single Supply VCC 32
Split Supplies VCC, VEE ±16
Input Differential Voltage Range (Note 1) VIDR ±32 Vdc
Input Common Mode Voltage Range (Note 2) VICR −0.3 to 32 Vdc
Output Short Circuit Duration tSC Continuous
Junction Temperature TJ150 °C
Thermal Resistance, Junction−to−Air (Note 3) Case 646 RJA 118 °C/W
Storage Temperature Range Tstg −65 to +150 °C
Operating Ambient Temperature Range TA°C
LM324S 0 to +70
LM2902S −40 to +105
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be af fected.
1. Split Power Supplies.
2. For supply voltages less than 32 V, the absolute maximum input voltage is equal to the supply voltage.
3. All RJA measurements made on evaluation board with 1 oz. copper traces of minimum pad size. All device outputs were active.
LM324S, LM2902S
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3
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = GND, TA = 25°C, unless otherwise noted.)
Characteristics Symbo
l
LM324S LM2902S
Unit
Min Typ Max Min Typ Max
Input Offset Voltage VIO mV
VCC = 5.0 V to 30 V, VICR = 0 V to VCC −1.7 V, VO = 1.4 V,
RS = 0
TA = 25°C 2.0 7.0 2.0 7.0
TA = Thigh (Note 4) 9.0 10
TA = Tlow (Note 4) 9.0 10
Average Temperature C oefficient of Input Offset Voltage VIO/T 7.0 7.0 V/°C
TA = Thigh to Tlow (Notes 4 and 6)
Input Offset Current IIO 5.0 50 5.0 50 nA
TA = Thigh to Tlow (Note 4) 150 200
Average Temperature Coefficient of Input Offset Current
TA = Thigh to Tlow (Notes 4 and 6) IIO/T 10 10 pA/°C
Input Bias Current IIB −90 −250 −90 −250 nA
TA = Thigh to Tlow (Note 4) −500 −500
Input Common Mode Voltage Range (Note 5) VICR V
VCC = 30 V
TA = +25°C 0 28.3 0 28.3
TA = Thigh to Tlow (Note 4) 0 28 0 28
Differential Input Voltage Range VIDR VCC VCC V
Large Signal Open Loop Voltage Gain AVOL V/mV
RL = 2.0 k, VCC = 15 V, for Large V O Swing 25 100 25 100
TA = Thigh to Tlow (Note 4) 15 15
Channel Separation
10 kHz f 20 kHz, Input Referenced CS −120 −120 dB
Common Mode Rejection,
RS 10 kCMR 65 70 50 70 dB
Power Supply Rejection PSR 65 100 50 100 dB
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. LM324S: Tlow = 0°C, Thigh = +70°C
LM2902S: Tlow = −40°C, Thigh = +105°C
5. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of
the common mode voltage range is VCC −1.7 V, but either or both inputs can go to +32 V without damage, independent of the magnitude
of VCC.
6. Guaranteed by design.
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4
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = GND, TA = 25°C, unless otherwise noted.)
Characteristics
LM324S LM2902S
Unit
Symbol Min Typ Max Min Typ Max
Output Voltage High Limit VOH V
VCC = 5.0 V, RL = 2.0 k, TA = 25°C3.3 3.5 3.3 3.5
VCC = 30 V, RL = 2.0 k, (TA = Thigh to Tlow) (Note 7) 26 26
VCC = 30 V, RL = 10 k, (TA = Thigh to Tlow) (Note 7) 27 28 27 28
Output Voltage − Low Limit,
VCC = 5.0 V, RL = 10 k, TA = Thigh to Tlow (Note 7) VOL 5.0 20 5.0 100 mV
Output Source Current (VID = +1.0 V, VCC = 15 V) IO + mA
TA = 25°C 20 40 20 40
TA = Thigh to Tlow (Note 7) 10 20 10 20
Output Sink Current IO mA
VID = −1.0 V, VCC = 15 V, TA = 25°C 10 20 10 20
TA = Thigh to Tlow (Note 7) 5.0 8.0 5.0 8.0
VID = −1.0 V, VO = 200 mV, TA = 25°C 12 50 A
Output Short Circuit to Ground (Note 8) ISC 40 60 40 60 mA
Power Supply Current (TA = Thigh to Tlow) (Note 7) ICC mA
VCC = 30 V VO = 0 V, RL = 3.0 3.0
VCC = 5.0 V, VO = 0 V, RL = 1.2 1.2
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
7. LM324S: Tlow = 0°C, Thigh = +70°C
LM2902S: Tlow = −40°C, Thigh = +105°C
8. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of
the common mode voltage range is VCC −1.7 V, but either or both inputs can go to +32 V without damage, independent of the magnitude
of VCC.
Figure 1. Representative Circuit Diagram
(One−Fourth of Circuit Shown)
Output
Bias Circuitry
Common to Four
Amplifiers
VCC
VEE/GND
Inputs
Q2
Q3 Q4
Q5
Q26
Q7
Q8
Q6
Q9
Q11
Q10
Q1 2.4 k
Q25
Q22
40 k
Q13
Q14
Q15
Q16
Q19
5.0 pF
Q18
Q17
Q20
Q21
2.0 k
Q24
Q23
Q12
25
+
-
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5
CIRCUIT DESCRIPTION
The LM324S and LM2902S are made using four
internally compensated, two−stage operational amplifiers.
The first stage of each consists of differential input devices
Q20 and Q18 with input buffer transistors Q21 and Q17 and
the differential to single ended converter Q3 and Q4. The
first stage performs not only the first stage gain function but
also performs the level shifting and transconductance
reduction functions. By reducing the transconductance, a
smaller compensation capacitor (only 5.0 pF) can be
employed, thus saving chip area. The transconductance
reduction is accomplished by splitting the collectors of Q20
and Q18. Another feature of this input stage is that the input
common mode range can include the negative supply or
ground, in single supply operation, without saturating either
the input devices or the differential to single−ended
converter. The second stage consists of a standard current
source load amplifier stage.
Each amplifier is biased from an internal−voltage
regulator which has a low temperature coefficient thus
giving each amplifier good temperature characteristics as
well as excellent power supply rejection.
Single Supply Split Supplies
VCC
VEE/GND
3.0 V to VCC(max)
1
2
3
4
VCC
1
2
3
4
VEE
1.5 V to VCC(max)
1.5 V to VEE(max)
Figure 2.
LM324S, LM2902S
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6
2
1
R1
TBP
R1 + R2
R1
R1 + R2
eo
e1
e2
eo = C (1 + a + b) (e2 - e1)
R1 a R1
b R1
R
-
+
+
-
-
+R
+
-
R1
R2
VO
Vref
Vin
VOH
VO
VOL
VinL = R1 (VOL - Vref) + Vref
VinH =(VOH - Vref) + Vref
H = R1 + R2 (VOH - VOL)
R1
-
+
-
+
-
+
R
C
R2 R1
R3
C1
100 k
R
C
R
C1 R2
100 k
Vin
Vref
Vref
Vref
Vref
Bandpass
Output
fo =2 RC
R1 = QR
R2 =
R3 = TN R2
C1 = 10C
1
Notch Output
Vref =V
CC
Hysteresis
1
CR
VinL VinH
Vref
Where:TBP=Center Frequency Gain
Where:TN=Passband Notch Gain
R = 160 k
C = 0.001 F
R1 = 1.6 M
R2 = 1.6 M
R3 = 1.6 M
For:fo=1.0 kHz
For:Q= 10
For:TBP= 1
For:TN= 1
-
+
MC1403
1/4
LM324S
-
+
R1
VCC
VCC
VO
2.5 V
R2
50 k
10 k
Vref
Vref = VCC
2
5.0 k
RC
RC
+
-
VO
2 RC
1
For: fo = 1.0 kHz
R = 16 k
C = 0.01 F
VO = 2.5 V 1 + R1
R2
1
VCC
fo =
1/4
LM324S
1/4
LM324S
1/4
LM324S
1/4
LM324S
1
CR
1/4
LM324S
1/4
LM324S 1/4
LM324S 1/4
LM324S
1/4
LM324S
Figure 3. Voltage Reference Figure 4. Wien Bridge Oscillator
Figure 5. High Impedance Differential Amplifier Figure 6. Comparator with Hysteresis
Figure 7. Bi−Quad Filter
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7
2
1
For less than 10% error from operational amplifier,
If source impedance varies, filter may be preceded with
voltage follower buffer to stabilize filter parameters.
where fo and BW are expressed in Hz.
Qo fo
BW < 0.1
Given:fo=center frequency
A(fo)=gain at center frequency
Choose value fo, C
Then: R3 = Q
fo C
R3
R1 = 2 A(fo)
R1 R3
4Q2 R1 - R3
R2 =
+
-
+
-
Vref =V
CC
Vref
f = R1 + RC
4 CRf R1 R3 = R2 R1
R2 + R1
R2
300 k
75 k
R3
R1
100 k
C
Triangle Wave
Output
Square
Wave
Output
Vin
Rf
if
Vref
1/4
LM324S
1/4
LM324S
Figure 8. Function Generator Figure 9. Multiple Feedback Bandpass Filter
Vref =V
CC
1
2
-
+
VCC
R3
R1
R2
Vref
CC
V
O
CO = 10 C
CO
1/4
LM324S
ORDERING INFORMATION
Device Operating Temperature Range Package Shipping
LM324SNG 0°C to +70°CPDIP−14
(Pb−Free) 25 Units / Rail
LM2902SNG −40°C to +105°CPDIP−14
(Pb−Free) 25 Units / Rail
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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8
PACKAGE DIMENSIONS
PDIP−14
CASE 646−06
ISSUE R
17
14 8
b2
NOTE 8
DA
TOP VIEW
E1
B
b
L
A1
A
C
SEATING
PLANE
0.010 CA
SIDE VIEW M
14X
D1 e
A2
NOTE 3
MBM
eB
E
END VIEW
END VIEW
WITH LEADS CONSTRAINED
DIM MIN MAX
INCHES
A−−−− 0.210
A1 0.015 −−−−
b0.014 0.022
C0.008 0.014
D0.735 0.775
D1 0.005 −−−−
e0.100 BSC
E0.300 0.325
M−−−− 10
−− 5.33
0.38 −−
0.35 0.56
0.20 0.36
18.67 19.69
0.13 −−
2.54 BSC
7.62 8.26
−−− 10
MIN MAX
MILLIMETERS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACK-
AGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.
4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE
NOT TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
TO DATUM C.
6. DIMENSION E3 IS MEASURED AT THE LEAD TIPS WITH THE
LEADS UNCONSTRAINED.
7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
LEADS, WHERE THE LEADS EXIT THE BODY.
8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
CORNERS).
E1 0.240 0.280 6.10 7.11
b2
eB −−−− 0.430 −− 10.92
0.060 TYP 1.52 TYP
c
A2 0.115 0.195 2.92 4.95
L0.115 0.150 2.92 3.81
°°
H
NOTE 5
NOTE 6
M
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P
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USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
LM324S/D
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