Semiconductor Components Industries, LLC, 2011
December, 2011 − Rev. 10
1Publication Order Number:
UMC2NT1/D
UMC2NT1G,
NSVUMC2NT1G,
UMC3NT1G,
NSVUMC3NT1G,
UMC5NT1G,
NSVUMC5NT2G
Dual Common
Base-Collector Bias
Resistor Transistors
NPN and PNP Silicon Surface Mount
Transistors with Monolithic Bias
Resistor Network
The Bias Resistor Transistor (BRT) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a base−emitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the UMC2NT1G series, two
complementary BRT devices are housed in the SOT−353 package
which is ideal for low power surface mount applications where board
space is at a premium.
Features
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
Available in 8 mm, 7 inch/3000 Unit Tape and Reel
AEC−Q101 Qualified and PPAP Capable
NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant*
MAXIMUM RATINGS (TA = 25C unless otherwise noted, common for
Q1 and Q2, − minus sign for Q1 (PNP) omitted)
Rating Symbol Value Unit
Collector-Base Voltage VCBO 50 Vdc
Collector-Emitter Voltage VCEO 50 Vdc
Collector Current IC100 mAdc
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
SC−88A/SOT−353
CASE 419A
STYLE 6
Ux = Device Marking
x = 2, 3 or 5
M = Date Code
G= Pb−Free Package
MARKING DIAGRAM
132
54
45
Q1
Q2
R1
R1 R2
R2
312
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
Ux M G
G
(Note: Microdot may be in either location)
UMC2NT1G, NSVUMC2NT1G, UMC3NT1G, NSVUMC3NT1G, UMC5NT1G,
NSVUMC5NT2G
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2
MAXIMUM RATINGS (TA = 25C unless otherwise noted, common for Q1 and Q2, − minus sign for Q1 (PNP) omitted)
Rating Symbol Value Unit
THERMAL CHARACTERISTICS
Thermal Resistance − Junction-to-Ambient (surface mounted) RqJA 833 C/W
Operating and Storage Temperature Range TJ, Tstg −65 to +150 C
Total Package Dissipation @ TA = 25C (Note 1) PD*150 mW
1. Device mounted on a FR-4 glass epoxy printed circuit board using the minimum recommended footprint.
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
Q1 TRANSISTOR: PNP
OFF CHARACTERISTICS
Collector-Base Cutoff Current
(VCB = 50 V, IE = 0)
ICBO
− − 100
nAdc
Collector-Emitter Cutoff Current
(VCE = 50 V, IB = 0)
ICEO
− − 500
nAdc
Emitter-Base Cutoff Current
(VEB = 6.0, IC = 0 mA)
UMC2NT1G, NSVUMC2NT1G
UMC3NT1G, NSVUMC3NT1G
UMC5NT1G/T2G, NSVUMC5NT2G
IEBO
−
−
−
−
−
−
0.2
0.5
1.0
mAdc
ON CHARACTERISTICS
Collector-Base Breakdown Voltage
(IC = 10 mA, IE = 0)
V(BR)CBO 50 − −
Vdc
Collector-Emitter Breakdown Voltage
(IC = 2.0 mA, IB = 0)
V(BR)CEO 50 − −
Vdc
DC Current Gain
(VCE = 10 V, IC = 5.0 mA)
UMC2NT1G, NSVUMC2NT1G
UMC3NT1G, NSVUMC3NT1G
UMC5NT1G/T2G, NSVUMC5NT2G
hFE
60
35
20
100
60
35
−
−
−
Collector−Emitter Saturation Voltage
(IC = 10 mA, IB = 0.3 mA)
VCE(SAT)
− − 0.25
Vdc
Output Voltage (on)
(VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW)
VOL
− − 0.2
Vdc
Output Voltage (off)
(VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW)
VOH 4.9 − −
Vdc
Input Resistor
UMC2NT1G
UMC3NT1G
UMC5NT1G/T2G
R1
15.4
7.0
3.3
22
10
4.7
28.6
13
6.1
kW
Resistor Ratio
UMC2NT1G
UMC3NT1G
UMC5NT1G/T2G
R1/R2
0.8
0.8
0.38
1.0
1.0
0.47
1.2
1.2
0.56
UMC2NT1G, NSVUMC2NT1G, UMC3NT1G, NSVUMC3NT1G, UMC5NT1G,
NSVUMC5NT2G
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3
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
Q2 TRANSISTOR: NPN
OFF CHARACTERISTICS
Collector-Base Cutoff Current
(VCB = 50 V, IE = 0)
ICBO
− − 100
nAdc
Collector-Emitter Cutoff Current
(VCE = 50 V, IB = 0)
ICEO
− − 500
nAdc
Emitter-Base Cutoff Current
(VEB = 6.0, IC = 0 mA)
UMC2NT1G
UMC3NT1G
UMC5NT1G/T2G
IEBO
−
−
−
−
−
−
0.2
0.5
0.1
mAdc
ON CHARACTERISTICS
Collector-Base Breakdown Voltage
(IC = 10 mA, IE = 0)
V(BR)CBO 50 − −
Vdc
Collector-Emitter Breakdown Voltage
(IC = 2.0 mA, IB = 0)
V(BR)CEO 50 − −
Vdc
DC Current Gain
(VCE = 10 V, IC = 5.0 mA)
UMC2NT1G
UMC3NT1G
UMC5NT1G/T2G
hFE
60
35
80
100
60
140
−
−
−
Collector−Emitter Saturation Voltage
(IC = 10 mA, IB = 0.3 mA)
VCE(SAT)
− − 0.25
Vdc
Output Voltage (on)
(VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW)
VOL
− − 0.2
Vdc
Output Voltage (off)
(VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW)
VOH 4.9 − −
Vdc
Input Resistor
UMC2NT1G
UMC3NT1G
UMC5NT1G/T2G
R1
15.4
7.0
33
22
10
47
28.6
13
61
kW
Resistor Ratio
UMC2NT1G
UMC3NT1G
UMC5NT1G/T2G
R1/R2
0.8
0.8
0.8
1.0
1.0
1.0
1.2
1.2
1.2
UMC2NT1G, NSVUMC2NT1G, UMC3NT1G, NSVUMC3NT1G, UMC5NT1G,
NSVUMC5NT2G
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4
ORDERING INFORMATION
Device Package Shipping†
UMC2NT1G SC−88A/SOT−353
(Pb−Free)
3,000 / Tape & Reel
NSVUMC2NT1G SC−88A/SOT−353
(Pb−Free)
3,000 / Tape & Reel
UMC3NT1G SC−88A/SOT−353
(Pb−Free)
3,000 / Tape & Reel
NSVUMC3NT1G SC−88A/SOT−353
(Pb−Free)
3,000 / Tape & Reel
UMC3NT2G SC−88A/SOT−353
(Pb−Free)
3,000 / Tape & Reel
UMC5NT1G SC−88A/SOT−353
(Pb−Free)
3,000 / Tape & Reel
UMC5NT2G SC−88A/SOT−353
(Pb−Free)
3,000 / Tape & Reel
NSVUMC5NT2G SC−88A/SOT−353
(Pb−Free)
3,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
DEVICE MARKING AND RESISTOR VALUES
Device Marking
Transistor 1 − PNP Transistor 2 − NPN
R1 (K) R2 (K) R1 (K) R2 (K)
UMC2NT1G, NSVUMC2NT1G
UMC3NT1G, NSVUMC3NT1G
UMC3NT2G
UMC5NT1G
UMC5NT2G, NSVUMC5NT2G
U2
U3
U3
U5
U5
22
10
10
4.7
4.7
22
10
10
10
10
22
10
10
47
47
22
10
10
47
47
Figure 1. Derating Curve
250
200
150
100
50
0
-50 0 50 100 150
TA, AMBIENT TEMPERATURE (C)
PD, POWER DISSIPATION (MILLIWATTS)
RqJA = 833C/W
UMC2NT1G, NSVUMC2NT1G, UMC3NT1G, NSVUMC3NT1G, UMC5NT1G,
NSVUMC5NT2G
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5
TYPICAL ELECTRICAL CHARACTERISTICS — UMC2NT1G, NSVUMC2NT1G PNP TRANSISTOR
Vin, INPUT VOLTAGE (VOLTS)
IC, COLLECTOR CURRENT (mA) hFE, DC CURRENT GAIN
Figure 2. VCE(sat) versus ICFigure 3. DC Current Gain
1000
10
IC, COLLECTOR CURRENT (mA)
100
10
1100
Figure 4. Output Capacitance
IC, COLLECTOR CURRENT (mA)
0 10 20 30
VO = 0.2 V
TA=-25C
75C
100
10
1
0.1 40 50
Figure 5. Output Current versus Input Voltage
100
10
1
0.1
0.01
0.001 0 1 2 3 4
Vin, INPUT VOLTAGE (V)
5 6 7 8 9 10
Figure 6. Input Voltage versus Output Current
0.01
VCE(sat), MAXIMUM COLLECTOR VOLTAGE (VOLTS)
0.1
1
10
40
IC, COLLECTOR CURRENT (mA)
0 20 50
75C
25C
TA=-25C
50
010 20 30 40
4
3
2
1
0
VR, REVERSE BIAS VOLTAGE (V)
Cob , CAPACITANCE (pF)
25C
IC/IB = 10
25C
-25C
VCE = 10 V
TA=75C
f = 1 MHz
lE = 0 mA
TA = 25C
75C25C
TA=-25C
VO = 5 V
UMC2NT1G, NSVUMC2NT1G, UMC3NT1G, NSVUMC3NT1G, UMC5NT1G,
NSVUMC5NT2G
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6
TYPICAL ELECTRICAL CHARACTERISTICS — UMC2NT1G, NSVUMC2NT1G NPN TRANSISTOR
Vin, INPUT VOLTAGE (VOLTS)
IC, COLLECTOR CURRENT (mA) hFE, DC CURRENT GAIN
Figure 7. VCE(sat) versus IC
1002030
IC, COLLECTOR CURRENT (mA)
10
1
0.1
TA=-25C
75C
25C
40 50
Figure 8. DC Current Gain
Figure 9. Output Capacitance
1
0.1
0.01
0.001 020 40 50
IC, COLLECTOR CURRENT (mA)
VCE(sat), MAXIMUM COLLECTOR VOLTAGE (VOLTS)
1000
100
10 1 10 100
IC, COLLECTOR CURRENT (mA)
TA=75C
25C
-25C
TA=-25C
25C
Figure 10. Output Current versus Input Voltage
75C
25C
TA=-25C
100
10
1
0.1
0.01
0.001 01 234
Vin, INPUT VOLTAGE (V)
56 78 910
Figure 11. Input Voltage versus Output
Current
50
010203040
4
3
1
2
0
VR, REVERSE BIAS VOLTAGE (V)
Cob, CAPACITANCE (pF)
75C
VCE = 10 V
f = 1 MHz
IE = 0 mA
TA = 25C
VO = 5 V
VO = 0.2 V
IC/IB = 10
UMC2NT1G, NSVUMC2NT1G, UMC3NT1G, NSVUMC3NT1G, UMC5NT1G,
NSVUMC5NT2G
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7
TYPICAL ELECTRICAL CHARACTERISTICS — UMC3NT1G PNP TRANSISTOR
Vin, INPUT VOLTAGE (VOLTS)
IC, COLLECTOR CURRENT (mA)
hFE, DC CURRENT GAIN
Figure 12. VCE(sat) versus IC
100
10
1
0.1
0.01
0.001 0
Vin, INPUT VOLTAGE (V)
TA=-25C
25C
1 2 3 4 5 6 7 8 9 10
Figure 13. DC Current Gain
Figure 14. Output Capacitance Figure 15. Output Current versus Input
Voltage
Figure 16. Input Voltage versus Output
Current
0.01
20
IC, COLLECTOR CURRENT (mA)
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
0.1
1
0 40 50
1000
1 10 100
IC, COLLECTOR CURRENT (mA)
TA=75C
-25C
100
10
0
IC, COLLECTOR CURRENT (mA)
0.1
1
10
100
10 20 30 40 50
TA=-25C
25C
75C
75C
IC/IB = 10
50
010203040
4
3
1
2
VR, REVERSE BIAS VOLTAGE (V)
Cob , CAPACITANCE (pF)
0
TA=-25C
25C
75C
25C
VCE = 10 V
f = 1 MHz
lE = 0 mA
TA = 25C
VO = 5 V
VO = 0.2 V
UMC2NT1G, NSVUMC2NT1G, UMC3NT1G, NSVUMC3NT1G, UMC5NT1G,
NSVUMC5NT2G
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8
TYPICAL ELECTRICAL CHARACTERISTICS — UMC3NT1G NPN TRANSISTOR
Vin, INPUT VOLTAGE (VOLTS)
IC, COLLECTOR CURRENT (mA) hFE, DC CURRENT GAIN
Figure 17. VCE(sat) versus ICFigure 18. DC Current Gain
Figure 19. Output Capacitance Figure 20. Output Current versus Input Voltage
1000
10
IC, COLLECTOR CURRENT (mA)
TA=75C
25C
-25C
100
101 100
75C 25C
100
0
Vin, INPUT VOLTAGE (V)
10
1
0.1
0.01
0.001 246810
TA=-25C
0
IC, COLLECTOR CURRENT (mA)
100
TA=-25C
75C
10
1
0.1 10 20 30 40 50
25C
Figure 21. Input Voltage versus Output
Current
0.001
VCE(sat), MAXIMUM COLLECTOR VOLTAGE (VOLTS)
TA=-25C
75C
25C
0.01
0.1
1
40
IC, COLLECTOR CURRENT (mA)
020 50
50
0 10 203040
4
3
2
1
0
VR, REVERSE BIAS VOLTAGE (V)
Cob, CAPACITANCE (pF)
IC/IB = 10 VCE = 10 V
f = 1 MHz
IE = 0 mA
TA = 25C
VO = 5 V
VO = 0.2 V
UMC2NT1G, NSVUMC2NT1G, UMC3NT1G, NSVUMC3NT1G, UMC5NT1G,
NSVUMC5NT2G
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9
TYPICAL ELECTRICAL CHARACTERISTICS — UMC5NT1G PNP TRANSISTOR
25C
IC, COLLECTOR CURRENT (mA) hFE, DC CURRENT GAIN
Figure 22. VCE(sat) versus ICFigure 23. DC Current Gain
Figure 24. Output Capacitance Figure 25. Output Current versus Input Voltage
1000
10
IC, COLLECTOR CURRENT (mA)
TA=75C
25C
-25C
100
11 1000
75C
25C
100
0
Vin, INPUT VOLTAGE (V)
10
1
0.1
0.01 2468 12
TA=-25C
VCE(sat), MAXIMUM COLLECTOR VOLTAGE (VOLTS)
TA=75C
-25C
0.01
0.1
1
40
IC, COLLECTOR CURRENT (mA)
020 50
010203040
12
6
4
2
0
VR, REVERSE BIAS VOLTAGE (V)
Cob, CAPACITANCE (pF)
IC/IB = 10 VCE = 10 V
f = 1 MHz
IE = 0 mA
TA = 25C
VO = 5 V
3010 60 100
10
10
8
15 25 35 455
SERIES 1
10
UMC2NT1G, NSVUMC2NT1G, UMC3NT1G, NSVUMC3NT1G, UMC5NT1G,
NSVUMC5NT2G
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10
TYPICAL ELECTRICAL CHARACTERISTICS — UMC5NT1G NPN TRANSISTOR
Vin, INPUT VOLTAGE (VOLTS)
IC, COLLECTOR CURRENT (mA) hFE, DC CURRENT GAIN
Figure 26. VCE(sat) versus IC
0246810
100
10
1
0.1
0.01
0.001
Vin, INPUT VOLTAGE (V)
TA=-25C
75C25C
Figure 27. DC Current Gain
Figure 28. Output Capacitance
100
10
1
0.1
010 203040 50
IC, COLLECTOR CURRENT (mA)
Figure 29. Output Current versus Input Voltage
1000
10
IC, COLLECTOR CURRENT (mA)
TA=75C
25C
-25C
100
10 1 100
25C
75C
50
010203040
1
0.8
0.6
0.4
0.2
0
VR, REVERSE BIAS VOLTAGE (V)
Cob, CAPACITANCE (pF)
Figure 30. Input Voltage versus Output Current
020 40 50
10
1
0.1
0.01
IC, COLLECTOR CURRENT (mA)
25C
75C
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
VCE = 10 V
f = 1 MHz
IE = 0 mA
TA = 25C
VO = 5 V
VO = 0.2 V
IC/IB = 10
TA=-25C
TA=-25C
UMC2NT1G, NSVUMC2NT1G, UMC3NT1G, NSVUMC3NT1G, UMC5NT1G,
NSVUMC5NT2G
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11
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD 419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
DIM
A
MIN MAX MIN MAX
MILLIMETERS
1.80 2.200.071 0.087
INCHES
B1.15 1.350.045 0.053
C0.80 1.100.031 0.043
D0.10 0.300.004 0.012
G0.65 BSC0.026 BSC
H--- 0.10---0.004
J0.10 0.250.004 0.010
K0.10 0.300.004 0.012
N0.20 REF0.008 REF
S2.00 2.200.079 0.087
B0.2 (0.008) MM
12 3
45
A
G
S
D 5 PL
H
C
N
J
K
−B−
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE K
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
ǒmm
inchesǓ
SCALE 20:1
0.65
0.025
0.65
0.025
0.50
0.0197
0.40
0.0157
1.9
0.0748
STYLE 6:
PIN 1. EMITTER 2
2. BASE 2
3. EMITTER 1
4. COLLECTOR
5. COLLECTOR 2/BASE 1
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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Phone: 81−3−5817−1050
UMC2NT1/D
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