© Semiconductor Components Industries, LLC, 2011
June, 2011 − Rev. 0
1Publication Order Number:
NTP5864N/D
NTP5864N
Power MOSFET
60 V, 63 A, 12.4 mW
Features
•Low RDS(on)
•High Current Capability
•Avalanche Energy Specified
•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter Symbol Value Units
Drain−to−Source Voltage VDSS 60 V
Gate−to−Source Voltage − Continuous VGS ±20 V
Gate−to−Source Voltage −
Non−Repetitive (tp = 10 s)
VGS ±30 V
Continuous Drain
Current − RJC (Note 1) Steady
State
TC = 25°CID63 A
TC = 100°C 45
Power Dissipation −
RJC (Note 1) Steady
State
TC = 25°CPD107 W
TC = 100°C54
Pulsed Drain Current tp = 10 sIDM 252 A
Operating Junction and Storage Temperature TJ,
TSTG
−55 to
175
°C
Source Current (Body Diode) Pulsed IS63 A
Single Pulse Drain−to Source Avalanche
Energy − (L = 0.1 mH)
EAS 80 mJ
IAS 40 A
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s) TL260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
THERMAL RESISTANCE RATINGS
Parameter Symbol Max Units
Junction−to−Case (Drain) − Steady State
(Note 1)
RθJC 1.4 °C/W
Junction−to−Ambient − Steady State (Note 1) RθJA 33 °C/W
1. Surface mounted on FR4 board using 1 in sq pad size
(Cu area = 1.127 in sq [2 oz] including traces).
Device Package Shipping
ORDERING INFORMATION
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V(BR)DSS RDS(ON) MAX
ID MAX
(Note 1)
60 V 12.4 mΩ @ 10 V 63 A
N−Channel
D
S
G
NTP5864NG TO−220
(Pb−Free)
50 Units / Rail
TO−220AB
CASE 221A
STYLE 5
123
4
MARKING DIAGRAM
& PIN ASSIGNMENT
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
NTP5864NG
AYWW
1
Gate
3
Source
4
Drain
2
Drain
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ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise stated)
Parameter Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 A60 V
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ58 mV/°C
Zero Gate Voltage Drain Current IDSS VGS = 0 V,
VDS = 60 V
TJ = 25°C 1.0 A
Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = ±20 V ±100 nA
ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250 A2.0 4.0 V
Gate Threshold Temperature
Coefficient
VGS(TH)/TJ−10 mV/°C
Drain−to−Source On Resistance RDS(on) VGS = 10 V, ID = 20 A 10.2 12.4 m
Forward Transconductance gFS VDS = 15 V, ID = 20 A 10 S
CHARGES AND CAPACITANCES
Input Capacitance CISS
VGS = 0 V, f = 1.0 MHz,
VDS = 25 V
1680 pF
Output Capacitance COSS 189
Reverse Transfer Capacitance CRSS 124
Total Gate Charge QG(TOT)
VGS = 10 V, VDS = 48 V,
ID = 20 A
31 nC
Threshold Gate Charge QG(TH) 2.0
Gate−to−Source Charge QGS 7.3
Gate−to−Drain Charge QGD 10
Gate Resistance Rg0.5
SWITCHING CHARACTERISTICS, VGS = 10 V (Note 3)
Turn−On Delay Time td(ON)
VGS = 10 V, VDD = 48 V,
ID = 20 A, RG = 2.5
10 ns
Rise Time tr6.4
Turn−Off Delay Time td(OFF) 18
Fall Time tf4.6
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage VSD VGS = 0 V,
IS = 40 A
TJ = 25°C 0.94 1.2 V
TJ = 125°C 0.84
Reverse Recovery Time tRR
VGS = 0 V, dISD/dt = 100 A/s,
IS = 20 A
24 ns
Charge Time ta16
Discharge Time tb7.9
Reverse Recovery Charge QRR 20 nC
2. Pulse Test: pulse width ≤ 300 s, duty cycle ≤ 2%.
3. Switching characteristics are independent of operating junction temperatures.
NTP5864N
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3
TYPICAL CHARACTERISTICS
0
25
50
75
100
125
012345
Figure 1. On−Region Characteristics
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
5.5 V
VGS = 10 V
5.0 V
4.5 V
TJ = 25°C
0
25
50
75
125
24567
VDS ≥ 10 V
TJ = 25°C
TJ = −55°C
TJ = 125°C
Figure 2. Transfer Characteristics
VGS, GATE−TO−SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
0.010
0.015
0.020
0.025
0.030
0.000
0.005
45678910
Figure 3. On−Resistance vs. Gate Voltage
VGS, GATE−TO−SOURCE VOLTAGE (V)
RDS(on), DRAIN−TO−SOURCE RESISTANCE ()
ID = 20 A
TJ = 25°C
0.0095
0.0100
0.0110
0.0115
10 20 25 30 35 40 45 50
Figure 4. On−Resistance vs. Drain Current
ID, DRAIN CURRENT (A)
RDS(on), DRAIN−TO−SOURCE RESISTANCE ()
VGS = 10 V
TJ = 25°C
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.2
−50 −25 0 25 50 75 100 125 175
Figure 5. On−Resistance Variation with
Temperature
TJ, JUNCTION TEMPERATURE (°C)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
VGS = 10 V
ID = 20 A
100
10000
100000
10 20 30 40 50 60
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
IDSS, LEAKAGE (nA)
TJ = 125°C
TJ = 150°C
VGS = 0 V
55 60
7.5 V
3
15
0.0105
2.0
150
1000
100
7 V
6.5 V
NTP5864N
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4
TYPICAL CHARACTERISTICS
0
500
1000
1500
2000
2500
0 102030405060
Figure 7. Capacitance Variation
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
TJ = 25°C
VGS = 0 V
Ciss
Coss
Crss 0
2
4
6
8
10
0 5 10 15 20 25
Qgs
QT
Qgd
Figure 8. Gate−to−Source vs. Total Charge
Qg, TOTAL GATE CHARGE (nC)
VGS, GATE−TO−SOURCE VOLTAGE (V)
ID = 20 A
TJ = 25°C
1
10
100
1000
1 10 100
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
RG, GATE RESISTANCE ()
t, TIME (ns)
VDD = 48 V
ID = 20 A
VGS = 10 V
td(off)
td(on)
tr
tf
0
20
40
60
80
100
0.50 0.60 0.70 0.80 1.000.90 1.10
Figure 10. Diode Forward Voltage vs. Current
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
IS, SOURCE CURRENT (A)
TJ = 25°C
VGS = 0 V
0.1
1
10
100
1000
0.1 1 10 100
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
VGS = 10 V
SINGLE PULSE
TC = 25°C
10 s
100 s
10 ms
dc
1 ms
0
10
20
30
40
50
60
80
25 50 75 100 125 175
AVALANCHE ENERGY (mJ)
TJ, STARTING JUNCTION TEMPERATURE
Figure 12. Maximum Avalanche Energy versus
Starting Junction Temperature
ID = 40 A
30
10
30
50
70
90
0.40 1.20
70
150
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TYPICAL CHARACTERISTICS
0.1
1
10
0.000001 0.00001 0.0001 0.001 0.01 0.1 1
Figure 13. Thermal Response
t, PULSE TIME (s)
RJC(t) (°C/W) EFFECTIVE TRANSIENT
THERMAL RESISTANCE
0.02
0.2
0.01
0.05
Duty Cycle = 0.5
SINGLE PULSE
0.1
10
0.01
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6
PACKAGE DIMENSIONS
TO−220
CASE 221A−09
ISSUE AF
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.570 0.620 14.48 15.75
B0.380 0.405 9.66 10.28
C0.160 0.190 4.07 4.82
D0.025 0.035 0.64 0.88
F0.142 0.161 3.61 4.09
G0.095 0.105 2.42 2.66
H0.110 0.155 2.80 3.93
J0.014 0.025 0.36 0.64
K0.500 0.562 12.70 14.27
L0.045 0.060 1.15 1.52
N0.190 0.210 4.83 5.33
Q0.100 0.120 2.54 3.04
R0.080 0.110 2.04 2.79
S0.045 0.055 1.15 1.39
T0.235 0.255 5.97 6.47
U0.000 0.050 0.00 1.27
V0.045 --- 1.15 ---
Z--- 0.080 --- 2.04
B
Q
H
Z
L
V
G
N
A
K
F
123
4
D
SEATING
PLANE
−T−
C
S
T
U
R
J
STYLE 5:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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NTP5864N/D
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