March 1996 NDC7001C Dual N & P-Channel Enhancement Mode Field Effect Transistor General Description Features These dual N and P-channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process has been designed to minimize on-state resistance, provide rugged and reliable performance and fast switching. These devices is particularly suited for low voltage, low current, switching, and power supply applications. N-Channel 0.51A, 50V, RDS(ON) = 2 @ VGS=10V P-Channel -0.34A, -50V. RDS(ON)= 5 @ VGS=-10V. High density cell design for low RDS(ON). Proprietary SuperSOTTM-6 package design using copper lead frame for superior thermal and electrical capabilities. High saturation current. ____________________________________________________________________________________________ 4 3 5 2 6 1 SuperSOTTM-6 Absolute Maximum Ratings T A = 25C unless otherwise noted Symbol Parameter VDSS Drain-Source Voltage VGSS Gate-Source Voltage - Continuous ID Drain Current - Continuous (Note 1a) - Pulsed PD Maximum Power Dissipation P-Channel Units 50 -50 V 20 -20 V 0.51 -0.34 A 1.5 -1 (Note 1a) 0.96 (Note 1b) 0.9 (Note 1c) TJ,TSTG N-Channel Operating and Storage Temperature Range W 0.7 -55 to 150 C (Note 1a) 130 C/W (Note 1) 60 C/W THERMAL CHARACTERISTICS RJA Thermal Resistance, Junction-to-Ambient RJC Thermal Resistance, Junction-to-Case (c) 1997 Fairchild Semiconductor Corporation NDC7001C.SAM ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted) Symbol Parameter Conditions Type Min VGS = 0 V, ID = 250 A N-Ch 50 VGS = 0 V, ID = -250 A P-Ch -50 Typ Max Units OFF CHARACTERISTICS BVDSS IDSS Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VDS = 40 V, VGS = 0 V V N-Ch 1 TJ = 125C P-Ch VDS = -40 V, VGS = 0 V A 500 -1 -500 TJ = 125C IGSSF Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V All 100 nA IGSSR Gate - Body Leakage, Reverse VGS = -20 V, VDS= 0 V All -100 nA VDS = VGS, ID = 250 A N-Ch 2.5 V ON CHARACTERISTICS (Note 2) VGS(th) Gate Threshold Voltage TJ = 125C VDS = VGS, ID = -250 .A P-Ch TJ = 125C RDS(ON) Static Drain-Source On-Resistance VGS = 10 V, ID = 0.51 A 1 0.8 1.5 2.2 -1 -2.5 -3.5 -0.8 -2.2 -3 1 2 1.7 3.5 1.6 4 N-Ch TJ = 125C VGS = 4.5 V, ID = 0.35 A VGS = -10 V, ID = -0.34 A P-Ch TJ = 125C VGS = -4.5 V, ID = -0.25 A ID(on) On-State Drain Current gFS Forward Transconductance 1.9 2.5 5 4 10 5.3 7.5 N-Ch 1.5 VGS = -10 V, VDS = -10 V P-Ch -1 VDS = 10 V, ID = 0.51 A N-Ch 400 VDS = -10 V, ID = -0.34 A P-Ch 250 N-Channel VDS = 25 V, VGS = 0 V, f = 1.0 MHz N-Ch 20 VGS = 10 V, VDS = 10 V A mS DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance P-Channel VDS = -25 V, VGS = 0 V, f = 1.0 MHz P-Ch 40 N-Ch 13 P-Ch 13 N-Ch 5 P-Ch 4 pF pF pF NDC7001C.SAM Electrical Characteristics (TA = 25oC unless otherwise noted) Symbol Parameters Conditions Type N-Channel VDD = 25 V, ID = 0.25 A, VGS = 10 V, RGEN = 25 Min Typ Max Units N-Ch 6 20 nS P-Ch 14 20 N-Ch 6 20 SWITCHING CHARACTERISTICS (Note 2) tD(on) Turn - On Delay Time tr Turn - On Rise Time tD(off) Turn - Off Delay Time tf Turn - Off Fall Time Qg P-Channel VDD = -25 V, ID = -0.25 A, VGS = -10 V, RGEN = 25 Total Gate Charge Qgs Qgd Gate-Source Charge Gate-Drain Charge P-Ch 6 20 N-Ch 11 20 P-Ch 13 20 N-Ch 5 20 P-Ch 6 20 N-Channel VDS = 25 V, ID = 0.51 A, VGS = 10 V N-Ch 1 P-Ch 1.3 N-Ch 0.19 P-Channel VDS = -25 V, ID = -0.34 A, VGS = -10 V P-Ch 0.23 N-Ch 0.33 P-Ch 0.38 nC nC nC DRAIN-SOURCE DIODE CHARACTERISTICS IS Maximum Continuous Source Current ISM Maximum Pulse Source Current (Note 2) VSD Drain-Source Diode Forward Voltage N-Ch 0.51 P-Ch -0.34 N-Ch 1.5 P-Ch -1 VGS = 0 V, IS = 0.51 A (Note 2) N-Ch 0.8 1.2 VGS = 0 V, IS = -0.34 A (Note 2) P-Ch -0.8 -1.2 A A V Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. PD (t ) = T J -TA R JA(t ) = T J-TA R JC+RCA(t ) = I 2D (t ) x RDS (ON ) TJ Typical RJA for single device operation using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 130oC/W when mounted on a 0.125 in2 pad of 2oz cpper. b. 140oC/W when mounted on a 0.005 in2 pad of 2oz cpper. c. 180oC/W when mounted on a 0.0015 in2 pad of 2oz cpper. 1a 1b 1c Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%. NDC7001C.SAM Typical Electrical Characteristics: N-Channel 1.5 3 8.0 7.0 VGS = 3.5V 6.0 1.2 RDS(on) , NORMALIZED 5.5 5.0 0.9 4.5 0.6 4.0 3.5 0.3 DRAIN-SOURCE ON-RESISTANCE I D , DRAIN-SOURCE CURRENT (A) V GS =10V 3.0 5.0 6.0 1.5 2 3 4 , DRAIN-SOURCE VOLTAGE (V) 8.0 10 1 0.3 0.6 0.9 I D , DRAIN CURRENT (A) 5 1.2 1.5 Figure 2. N-Channel On-Resistance Variation with Gate Voltage and Drain Current. 2 2.5 V GS = 10V R DS(on), NORMALIZED DRAIN-SOURCE ON-RESISTANCE I D = 0.51A 1.8 R DS(ON), NORMALIZED 7.0 0 1 VDS DRAIN-SOURCE ON-RESISTANCE 5.5 0.5 Figure 1. N-Channel On-Region Characteristics. V GS = 10V 1.6 1.4 1.2 1 0.8 0.6 0.4 -50 2 TJ = 125C 1.5 25C 1 -55C 0.5 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C) 125 0 150 0.3 I Figure 3. N-Channel On-Resistance Variation with Temperature. D 0.6 0.9 , DRAIN CURRENT (A) 1.2 1.5 Figure 4. N-Channel On-Resistance Variation with Drain Current and Temperature. 1.2 V DS = 10V T J = -55C 25C 125C V th, NORMALIZED 1.2 0.9 0.6 0.3 0 1 2 3 4 5 6 V GS , GATE TO SOURCE VOLTAGE (V) 7 Figure 5. N-Channel Transfer Characteristics. 8 GATE-SOURCE THRESHOLD VOLTAGE 1.5 I D , DRAIN CURRENT (A) 4.5 2 0 0 4.0 2.5 V DS = V GS I D = 250A 1.1 1 0.9 0.8 0.7 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C) 125 150 Figure 6. N-Channel Gate Threshold Variation with Temperature. NDC7001C.SAM 1.16 I D 1.5 1 = 250A 1.12 I S , REVERSE DRAIN CURRENT (A) 1.08 1.04 1 0.96 0.92 0.88 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C) 125 TJ = 125C -55C 0.01 0.4 0.6 0.8 1 V SD , BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 8. N-Channel Body Diode Forward Voltage Variation with Current and Temperature. 10 100 VDS = 25V V GS , GATE-SOURCE VOLTAGE (V) 50 CAPACITANCE (pF) 25C 0.1 0.001 0.2 150 V GS = 0V 0.5 Figure 7. N-Channel Breakdown Voltage Variation with Temperature. C iss 20 C oss 10 C rss 5 f = 1 MHz 2 V GS = 0 V 1 0.1 8 I D = 0.51A 6 4 2 0 0.2 0.5 1 2 5 10 20 50 V DS , DRAIN TO SOURCE VOLTAGE (V) Figure 9. N-Channel Capacitance Characteristics. 0 0.2 0.4 0.6 0.8 Q g , GATE CHARGE (nC) 1 1.2 Figure 10. N-Channel Gate Charge Characteristics. 0.7 V DS = 10V T 0.6 I D , DRAIN CURRENT (A) BV DSS , NORMALIZED DRAIN-SOURCE BREAKDOWN VOLTAGE Typical Electrical Characteristics: N-Channel (continued) 0.5 J = -55C 25C 0.4 125C 0.3 0.2 0.1 0 0 0.3 V GS 0.6 0.9 1.2 , GATE TO SOURCE VOLTAGE (V) 1.5 Figure 11. N-Channel Transconductance Variation with Drain Current and Temperature. NDC7001C.SAM Typical Electrical Characteristics: P-Channel (continued) -1 3 -9.0 -8.0 -7.0 -0.8 R DS(ON) , NORMALIZED -6.0 -0.6 -5.0 -0.4 -0.2 -4.0 DRAIN-SOURCE ON-RESISTANCE I D , DRAIN-SOURCE CURRENT (A) V GS = -10V VGS =-4.5V 2.5 -5.0 2 -6.0 -7.0 1.5 -8.0 -9.0 -10 1 -3.5 0.5 -0.2 0 -1 VDS -6 I -0.4 -0.6 , DRAIN CURRENT (A) -0.8 -1 1.8 2.5 , NORMALIZED 1.4 1.2 DS(on) 1 0.8 0.6 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C) 125 DRAIN-SOURCE ON-RESISTANCE V GS =-10 V I D = -0.34A VG S = -10V 0.4 -50 2 T J = 125C 1.5 25C 1 -55C 0.5 150 -0.2 Figure 14. P-Channel On-Resistance Variation with Temperature. -0.4 -0.6 I D , DRAIN CURRENT (A) -0.8 -1 Figure 15. P-Channel On-Resistance Variation with Drain Current and Temperature. 1.1 V DS =- 10V T = -55C J 25C 125C V th, NORMALIZED -0.8 -0.6 -0.4 -0.2 -1 -2 -3 V GS -4 -5 -6 -7 , GATE TO SOURCE VOLTAGE (V) Figure 16. P-Channel Transfer Characteristics. -8 GATE-SOURCE THRESHOLD VOLTAGE -1 ID , DRAIN CURRENT (A) D Figure 13. P-Channel On-Resistance Variation with Gate Voltage and Drain Current. R R DS(ON) , NORMALIZED -5 Figure 12. P-Channel On-Region Characteristics. 1.6 DRAIN-SOURCE ON-RESISTANCE -2 -3 -4 , DRAIN-SOURCE VOLTAGE (V) VDS = V GS 1.05 I D = -250A 1 0.95 0.9 0.85 0.8 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C) 125 150 Figure 17. P-Channel Gate Threshold Variation with Temperature. NDC7001C.SAM Typical Electrical Characteristics: P-Channel (continued) 1 0.5 -I S, REVERSE DRAIN CURRENT (A) DRAIN-SOURCE BREAKDOWN VOLTAGE I D = 250A 1.1 1.05 1 0.95 0.9 -50 -25 0 T J 25 50 75 100 , JUNCTION TEMPERATURE (C) 125 0.1 VGS =0V TJ = 125C 25C -55C 0.05 0.01 0.005 0.001 0.2 150 Figure 18. P-Channel Breakdown Voltage Variation with Temperature. 0.4 0.6 0.8 1 1.2 1.4 1.6 -V SD , BODY DIODE FORWARD VOLTAGE (V) 1.8 Figure 19. P-Channel Body Diode Forward Voltage Variation with Current and Temperature. -10 100 I D = -0.34A CAPACITANCE (pF) , GATE-SOURCE VOLTAGE (V) Ciss 50 Coss 20 10 Crss 5 f = 1 MHz -24 -48 -6 -4 -2 GS V GS = 0 V V DS = -12V V 2 -8 1 0.1 0 0.2 0.5 -V DS 1 2 5 10 20 50 , DRAIN TO SOURCE VOLTAGE (V) Figure 20. P-Channel Capacitance Characteristics. 0 0.2 0.4 0.6 0.8 1 Q g , GATE CHARGE (nC) 1.2 1.4 1.6 Figure 21. P-Channel Gate Charge Characteristics. 0.5 TJ = -55C 25C 0.3 125C 0.2 0.1 FS , TRANSCONDUCTANCE (SIEMENS) V DS =- 10V 0.4 g BV DSS , NORMALIZED 1.15 0 -0.2 -0.4 -0.6 -0.8 -1 I D , DRAIN CURRENT (A) Figure 22. P-Channel Transconductance Variation with Drain Current and Temperature. NDC7001C.SAM Typical Thermal Characteristics: N & P-Channel 0.55 I D , STEADY-STATE DRAIN CURRENT (A) STEADY-STATE POWER DISSIPATION (W) 1.2 1.1 1a 1 0.9 1b 0.8 1c 4.5"x5" FR-4 Board 0.7 o TA = 2 5 C Still Air 0.6 0 0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 ) 1 1a 0.5 1b 0.45 1c 0.4 4.5"x5" FR-4 Board o TA = 2 5 C Still Air VG S = 1 0 V 0.35 0 Figure 23. SOT-6 Dual Package Maximum Steady-State Power Dissipation versus Copper Mounting Pad Area. 0.025 0.05 0.075 0.1 2 2oz COPPER MOUNTING PAD AREA (in ) Figure 24. N-Ch Maximum Steady-State Drain Current versus Copper Mounting Pad Area. 3 0.4 2 1 0.35 1a 1b 0.3 1c 0.25 I D , DRAIN CURRENT (A) -I D , STEADY-STATE DRAIN CURRENT (A) 0.125 RD LIM IT 10 0 1m us s 10 0.2 10 0.1 V 0.05 GS = 10V SINGLE PULSE 0m ms s 1s DC R J A = See Note 1c o TA = 2 5 C 0.02 T A = 25C Still Air VG S = - 1 0 V 0 N) 0.5 4.5"x5" FR-4 Board 0.2 S(O 0.01 0.025 0.05 0.075 0.1 2oz COPPER MOUNTING PAD AREA (in 2 ) 0.125 Figure 25. P-Ch Maximum Steady-State Drain Current versus Copper Mounting Pad Area. 1 2 5 10 20 V DS , DRAIN-SOURCE VOLTAGE (V) 50 70 Figure 26. N-Channel Maximum Safe Operating Area. 3 2 10 0u -I D, DRAIN CURRENT (A) 1 0.5 RD S(O N) LIM 1m IT 10 0.2 10 0.1 V GS = -10V 0.05 SINGLE PULSE 0m s s ms s 1s DC R J A = See Note 1c 0.02 T A = 25C 0.01 1 2 5 10 20 -V DS , DRAIN-SOURCE VOLTAGE (V) 50 70 Figure 27. P-Channel Maximum Safe Operating Area. NDC7001C.SAM Typical Thermal Characteristics: N & P-Channel r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 0 .5 D = 0.5 0 .2 0.2 0 .1 R JA (t) = r(t) * R JA R JA = See Note 1c 0.1 P(pk) 0.05 t1 0.05 0.02 0.01 0.02 = P * R JA (t) Duty Cycle, D = t 1 / t 2 A Single Pulse 0.01 0 .0 0 0 1 t2 TJ - T 0 .001 0 .0 1 0 .1 t 1, TIME (sec) 1 10 100 300 Figure 28. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design. ton VDD t d(on) tf 90% 90% V OUT D VGS tr RL V IN to f f t d(off) VO U T 10% R GEN 10% DUT G 90% V IN S 50% 50% 10% PULSE WIDTH Figure 29. N or P-Channel Switching Test Circuit. Figure 30. N or P-Channel Switching Waveforms. NDC7001C.SAM SuperSOTTM-6 Tape and Reel Data and Package Dimensions SSOT-6 Packaging Configuration: Figur e 1.0 Packaging Description: Customize Label SSOT-6 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 3,000 units per 7" or 177cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 10,000 units per 13" or 330cm diameter reel. This and some other options are described in the Packaging Information table. Anti static Cover Tape These full reels are individually barcode labeled and placed inside a pizza box (illustrated in figure 1.0) made of recyclable corrugated brown paper with a Fairchild logo printing. One pizza box contains three reels maximum. And these pizza boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped. F63TNR Label Embossed Carrier Tape 631 631 631 631 631 SSOT-6 Packaging Information Packaging Option Standard (no f l ow c ode ) Pin 1 D87Z SSOT-6 Unit Orientation Packaging type TNR TNR Qty per Reel/Tube/Bag 3,000 10,000 Reel Size 7" Dia 13" 184x187x47 343x343x64 Max qty per Box 9,000 30,000 Weight per unit (gm) 0.0158 0.0158 Weight per Reel (kg) 0.1440 0.4700 Box Dimension (mm) 343mm x 342mm x 64mm Intermediate box fo r D87Z Option F63TNR Label Note/Comments F63TNR Label F63TNR Label sa mpl e 184mm x 187mm x 47mm Pizza Box fo r Standar d Opti on F63TNR Label LOT: CBVK741B019 QTY: 3000 FSID: FDC633N SPEC: D/C1: D9842 D/C2: SSOT-6 Tape Leader and Trailer Configuration: Figur e 2.0 QTY1: QTY2: SPEC REV: CPN: N/F: F (F63TNR)3 Carrier Tape Cover Tape 1998 Fairchild Semiconductor Corporation Comp onent s Traile r Tape 300mm mi nimum or 75 empty poc kets Lead er Tape 500mm mi nimum or 125 emp ty poc kets August 1999, Rev. C SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued SSOT-6 Embossed Carrier Tape Configuration: Figure 3.0 P0 D0 T E1 F K0 Wc W E2 B0 Tc A0 D1 P1 User Direction of Feed Dimensions are in millimeter Pkg type A0 B0 SSOT-6 (8mm) 3.23 +/-0.10 3.18 +/-0.10 W 8.0 +/-0.3 D0 D1 E1 E2 1.55 +/-0.05 1.125 +/-0.125 1.75 +/-0.10 F 6.25 min 3.50 +/-0.05 P1 P0 4.0 +/-0.1 4.0 +/-0.1 K0 T 1.37 +/-0.10 0.255 +/-0.150 Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C). Wc 0.06 +/-0.02 0.5mm maximum 20 deg maximum Typical component cavity center line B0 5.2 +/-0.3 Tc 0.5mm maximum 20 deg maximum component rotation Typical component center line Sketch A (Side or Front Sectional View) A0 Component Rotation Sketch C (Top View) Component lateral movement Sketch B (Top View) SSOT-6 Reel Configuration: Figure 4.0 Component Rotation W1 Measured at Hub Dim A Max Dim A max See detail AA Dim N 7" Diameter Option B Min Dim C See detail AA W3 13" Diameter Option Dim D min W2 max Measured at Hub DETAIL AA Dimensions are in inches and millimeters Tape Size Reel Option Dim A Dim B 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 2.165 55 0.331 +0.059/-0.000 8.4 +1.5/0 0.567 14.4 0.311 - 0.429 7.9 - 10.9 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 4.00 100 0.331 +0.059/-0.000 8.4 +1.5/0 0.567 14.4 0.311 - 0.429 7.9 - 10.9 8mm 7" Dia 7.00 177.8 8mm 13" Dia 13.00 330 Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL) July 1999, Rev. C SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued SuperSOT -6 (FS PKG Code 31, 33) 1:1 Scale 1:1 on letter size paper Dimensions shown below are in: inches [millimeters] Part Weight per unit (gram): 0.0158 1998 Fairchild Semiconductor Corporation September 1998, Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ISOPLANARTM MICROWIRETM POPTM PowerTrench QFETTM QSTM Quiet SeriesTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 ACExTM CoolFETTM CROSSVOLTTM E2CMOSTM FACTTM FACT Quiet SeriesTM FAST(R) FASTrTM GTOTM HiSeCTM SyncFETTM TinyLogicTM UHCTM VCXTM DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. D