Issue 3 - July 2006
© Zetex Semiconductors plc 2006
DEVICE DESCRIPTION
These devices are precision timing circuits for
generation of accurate time delays or
oscillation. Advanced circuit design means that
these devices can operate from a single battery
cell with the minimum of quiescent current.
In monostable mode time delays are
controlled by a single resistor and capacitor
network. In astable mode the frequency and
duty cycle can be accurately and
independently controlled with two external
resistors and one capacitor.
The threshold and trigger levels are normally
set as a proportion of VCC by internal resistors.
These levels can be programmed by the use
of the control input pin.
When the trigger input reduces to a value
below the trigger level, the flip-flop is set and
the output goes high. With the trigger input
above the trigger level and the threshold input
above the threshold level, the flip-flop is reset
and the output goes low. The reset pin has
priority over all the other inputs and is used
to start new timing cycles. A low on the reset
input causes the flip-flop to reset forcing the
output low. Whenever the output is forced
low then the internal discharge transistor is
turned on.
FEATURES
0.9V supply operating voltage guaranteed
Pin connections comparable with 555
series timers
Very low quiescent current 74 µA
SO8 and DIL8 packages
Operating temperature range
compatible with battery technologies
APPLICATIONS
Portable and battery powered
equipment
Low voltage and low power systems
PRECISION SINGLE CELL TIMER
ISSUE 3 - JULY 2006
ZSCT1555
7
DISCHARGE
6
THRESH
2
TRIGGER
5
CONTROL
8
VCC
4
RESET
3
OUTPUT
1
GND
SCHEMATIC DIAGRAM
Issue 3 - July 2006 www.zetex.com
© Zetex Semiconductors plc 2006
ABSOLUTE MAXIMUM RATINGS
Supply Voltage 9V
Input Voltages 9V
(Cont, Reset, Thres, Trig)
Output Current 100mA
Operating Temperature -20 to 100°C
Storage Temperature -55 to 150°C
Power Dissipation (Tamb=25°C)
DIL8 625mW
SO8 625mW
Recommended Operating Conditions
Supply Voltage 0.9V(min) 6V(max)
Input Voltages 6V(max)
(Cont, Reset, Thres, Trig)
Output Current Sink 100mA(max)
Source 150µA(max)
ELECTRICAL CHARACTERISTICS
TEST CONDITIONS (Unless otherwise stated):Tamb= 25°C,VCC= 1.5V
SYMBOL PARAMETER CONDITIONS LIMITS UNITS
MIN. TYP. MAX.
VCC Supply Voltage 0.9 6 V
ICC Supply Current no load
VCC= 5V, no load
74
150
120
200
µA
VTH Threshold Voltage
VCC= 5V
1.195
3.9
1.22
4
1.245
4.1
V
ITH Threshold Current (Note 1) 0 20 100 nA
VTR Trigger Voltage
VCC= 5V
0.2
0.57
0.25
0.62
0.3
0.67
V
ITR Trigger Current 0 -35 -100 nA
tPD Trigger Propagation delay Delay from trigger
to output
2µs
VRS Reset Voltage 0.1 0.2 0.4 V
IRS Reset Current Reset @ 0V 0 -5 -10 µA
IDS Discharge switch Off-state
current
0 10 100 nA
VDS Discharge switch On-state
voltage
IDS= 0.2mA
VCC= 5V, IDS= 0.3mA
0
0
180
240
225
350
mV
VCT Control Voltage (Open Circuit)
VCC= 5V
1.195
3.9
1.22
4
1.245
4.1
V
VOL Output Voltage (Low) IOL=10mA
IOL=50mA
VCC=5V, IOL=10mA
VCC=5V, IOL=100mA
0
0
0
0
0.15
0.45
0.13
0.65
0.3
0.65
0.3
1
V
VOH Output Voltage (High) IOH= 100µA
VCC= 5V, IOH= 150µA
1
4.5
1.1
4.6
1.5
5
V
ZSCT1555
Issue 3 - July 2006 www.zetex.com
© Zetex Semiconductors plc 2006
SYMBOL PARAMETER CONDITIONS LIMITS UNITS
MIN. TYP. MAX.
tROutput pulse rise time CL= 10pF
VCC=5V, CL=10pF
1.6
1.2 µs
tFOutput pulse fall time CL= 10pF
VCC=5V, CL=10pF
240
24
ns
tIA(m)
tV(m)
tT(m)
Timing error, Monostable
Initial accuracy (Note 2)
Drift with supply voltage
Drift with temperature
RA= 10 to 50 k
RB= 10 to 50 k
CT = 68nF
1.6
0.262
100
%
%/V
ppm/°C
tIA(a)
tV(a)
tT(a)
Timing error, Astable
Initial accuracy (Note 2)
Drift with supply voltage
Drift with temperature
RA= 10 to 50 k
RB= 10 to 50 k
CT = 68nF
4.8
0.662
150
%
%/V
ppm/°C
fAAstable maximum frequency RA=20 k
RB= 10 k
CT =47pF
330 kHz
Note 1: This will influence the maximum values of RA and RB (RAMAX=10M,RBMAX=1.5M)
Note 2: Is defined as the difference between the measured value and the average value of a
random sample taken on a batch basis
ZSCT1555
ELECTRICAL CHARACTERISTICS (Continued)
TEST CONDITIONS (Unless otherwise stated):Tamb=25°C,VCC=1.5V
Issue 3 - July 2006 www.zetex.com
© Zetex Semiconductors plc 2006
ZSCT1555
01234 5
0.80
0.85
0.90
0.95
1.00
1.05
Pulse Duration
relative to Vcc=5v
Supply Voltage (V)
Normalized Output Pulse Duration
v Supply Voltage
6
-20°C
+25°C
+100°C
200
160
120
80
40
01.0 2.0 3.0 4.0 5.00.0
Supply Current (µA)
Supply Voltage (V)
Supply Current v Supply Voltage
8
6
4
2
000.2
Propagation Delay (µs)
Lowest Voltage Level of Trigger Pulse (xVcc)
Output Propagation Delay
Vcc=5v
0.1
+100°C
+25°C
-20°C
Rout/Vcc=1K
5
4
3
2
1
000.10.2
Propagation Delay (µs)
Lowest Voltage Level of Trigger Pulse (xVcc)
Output Propagation Delay
Vcc=1.5v
+25°C
-20°C
Rout/Vcc=1K
5
4
3
2
1
000.1
+100°C
+25°C
-20°C
Minimum Pulse Width s)
Lowest Voltage Level of Trigger Pulse (xVcc)
Minimum Pulse Width Required for
Triggering
Vcc=1.5v
Rout/Vcc = 1K
5
4
3
2
1
000.2
+100°C
+25°C
-20°C
Minimum Pulse Width (µs)
Lowest Voltage Level of Trigger Pulse (xVcc)
Minimum Pulse Width Required for
Triggering
Vcc=5v
0.1
Rout/Vcc = 1K
+100°C
TYPICAL CHARACTERISTICS
Issue 3 - July 2006 www.zetex.com
© Zetex Semiconductors plc 2006
ZSCT1555
Vcc=5v
-20°C
+25°C
+100°C
1
0.10.010.001
Sink Current (mA)
Discharge Transistor Voltage
v Sink Current
10
1
0.1
0.01
Discharge Transistor Voltage (V)
Vcc=1.5v
-20°C
+25°C
+100°C
1
0.10.010.001
Sink Current (mA)
Discharge Transistor Voltage
v Sink Current
10
1
0.1
0.001
Discharge Transistor Voltage (V)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.01 0.1 1 10 100
Low Level Output Current (mA)
Output Low Voltage Drop v
Output Current
Low Level Output Voltage (V)
Vcc=1.5v
-20°C
+25°C
+100°C
1.0
0.8
0.6
0.4
0.2
0.0
0.01 0.1 1 10 100
Low Level Output Current (mA)
Output Low Voltage Drop v
Output Current
Low Level Output Voltage (V)
-20°C
+25°C
+100°C
Vcc=5v
0.5
0.4
0.3
0.2
0.1
0.0
-20°C
+25°C
+100°C
Vcc=5v
Vcc - Vout (V)
0.001 0.01 0.1 1.0
High Level Output Current (mA)
Output High Voltage Drop v
Output Current
1.0
0.8
0.6
0.4
0.2
0.0 1.0
0.10.01
0.001
-20°C
+25°C
+100°C
Vcc=1.5v
High-Level Output Current (mA)
Output High Voltage Drop v
Output Current
Vcc - Vout (V)
TYPICAL CHARACTERISTICS
Issue 3 - July 2006 www.zetex.com
© Zetex Semiconductors plc 2006
FUNCTIONAL DIAGRAM
FUNCTIONAL TABLE
RESET TRIGGER VALUE THRESHOLD
VOLTAGE
OUTPUT DISCHARGE
SWITCH
Low N/A N/A Low On
High <VCC/5 N/A High Off
High >VCC/5 >4VCC/5 Low On
High >VCC/5 <4VCC/5 As Previously established
POWER DERATING TABLE
Package TA25°C
Power Rating
Derating Factor
Above TA=25°C
TA=70°C Power
Rating
TA=85°C Power
Rating
N8 625mW 6.25mW/°C 330mW 250mW
D8 625mW 6.25mW/°C 330mW 250mW
ZSCT1555
Issue 3 - July 2006 www.zetex.com
© Zetex Semiconductors plc 2006
APPLICATIONS INFORMATION
Many configurations of the ZSCT1555 are
possible. The following gives a selection of a
few of these using the most basic monostable
and astable connections. The final application
example in astable mode shows the device
optimum use for low voltage and power
economy in a single cell boost converter.
Monostable Operation
Figure 1 shows connection of the timer as a
one-shot whose pulse period is independent
of supply voltage. Initially the capacitor is held
discharged. The application of a negative
going trigger pulse sets an internal flip flop
which allows the capacitor to start to charge
up via RA and forces the output high. The
voltage on the capacitor increases for time t,
where t = 1.63RACT, at the end of this period
the voltage on the capacitor is 0.8 VCC. At this
point the flip flop resets, the capacitor is
discharged and the output is driven low.
Figure 2 shows the timing diagram for this
function. During the output high period
further trigger pulses are locked out however
the circuit can be reset by application of a
negative going pulse on the reset pin. Once
the output is driven low it remains in this state
until the application of the next trigger pulse.
If the reset function is not used then it is
recommended to connect to VCC to eliminate
any possibility of false triggering.
Figure 3 gives an easy selection of RA and CT
values for various time delays.
This configuration of circuit can be used as a
frequency divider by adjusting the timing
period. Figure 4 indicates a divide by three.
Figure 1
Figure 2
Figure 3
100
10
1
0.1
0.01
0.001
10us 100us 1ms 10ms 100ms 1s 10s
C - Capacitance (uF)
Time Delay
100k
1M
10M
RA
Figure 4
ZSCT1555
Issue 3 - July 2006 www.zetex.com
© Zetex Semiconductors plc 2006
Figure 5 shows the monostable mode used as
a pulse width modulator. Here the trigger pin
is supplied with a continuous pulse train, the
resulting output pulse width is modulated by
a signal applied to the control pin.
Figure 6 shows typical waveform examples.
Astable operation
The configuration of Figure 7 produces a free
running multivibrator circuit whose frequency
is independent of supply voltage. The ratio of
resistors RA and RB precisely sets the circuit
duty cycle. The capacitor is charged and
discharged between thresholds at 0.2VCC and
0.8VCC. Oscillation frequency (f) and duty cycle
(d) can be calculated using the following
equations:-
f = 0.62/(RA + 2RB)CT
d = RB /(RA + 2RB)
Figure 8 shows the waveforms generated in
this mode of operation.
Figure 5
Figure 6
Figure 8
ZSCT1555
Figure 7
Issue 3 - July 2006 www.zetex.com
© Zetex Semiconductors plc 2006
ZSCT1555
Figure 9 gives an easy selection for RA, RB and
CT values.
Similar to the PWM circuit of Figure 5 the astable
circuit can be configured with modulation of the
control input as shown in Figure 10. The result is a
pulse position modulated, PPM, circuit where the
pulse position is altered by the control input voltage.
Figure 11 shows the result of modulation with
a triangle wave input to the control pin.
Figure 11
(RA+2RB)
100
10
1
0.1
0.01
0.001
0.1 1 10 100 1k 10k 100k
C - Capacitance (uF)
Free Running Frequency (Hz)
10M
1M
100k
Figure 10
Figure 9
Issue 3 - July 2006 www.zetex.com
© Zetex Semiconductors plc 2006
Figure 12
ZSCT1555
The circuit of Figure 12 shows the device in
astable mode operating as part of a single
cell boost converter. This circuit generates
a 5 volt supply from a single battery cell. The
circuit output voltage is maintained down
to 0.9 volts input and power economy is
optimised for extended battery life.
ORDERING INFORMATION
Part Number Package Part Mark
ZSCT1555D8 DIL8 ZSCT1555
ZSCT1555N8 SO8 ZSCT1555
CONNECTION DIAGRAM
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Issue 3 - July 2006 www.zetex.com
© Zetex Semiconductors plc 2006