FDS6679D84Z - Fairchild Semiconductor Corporation

May 2001

2001 Fairchild Semiconductor Corporation FDS6679 Rev C (W)

FDS6679

30 Volt P-Channel PowerTrench MOSFET

General Description

This P-Channel MOSFET has been designed

specifically to improve the overall efficiency of DC/DC

converters using either synchronous or conventional

switching PWM controllers, and battery chargers.

These MOSFETs feature faster switching and lower

gate charge than other MOSFETs with comparable

RDS(ON) specifications.

The result is a MOSFET that is easy and safer to drive

(even at very high frequencies), and DC/DC power

supply designs with higher overall efficiency.

Features

• –13 A, –30 V. RDS(ON) = 9 mΩ @ VGS = –10 V

RDS(ON) = 13 mΩ @ VGS = – 4.5 V

• Extended VGSS range (±25V) for battery applications

• High performance trench technology for extremely

low RDS(ON)

• High power and current handling capability

SO-8

Absolute Maximum Ratings TA=25oC unless otherwise noted

Symbol Parameter Ratings Units

VDSS Drain-Source Voltage –30 V

VGSS Gate-Source Voltage ±25 V

ID Drain Current – Continuous (Note 1a) –13 A

– Pulsed –50

Power Dissipation for Single Operation (Note 1a) 2.5

(Note 1b) 1.2

(Note 1c) 1.0

TJ, TSTG Operating and Storage Junction Temperature Range –55 to +175 °C

Thermal Characteristics

RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 50 °C/W

RθJC Thermal Resistance, Junction-to-Case (Note 1) 25 °C/W

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

FDS6679 FDS6679 13’’ 12mm 2500 units

FDS6679

FDS6679 Rev C(W)

Electrical Characteristics TA = 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = –250 µA –30 V

∆BVDSS

∆TJ Breakdown Voltage Temperature

Coefficient ID = –250 µA, Referenced to 25°C –23 mV/°C

IDSS Zero Gate Voltage Drain Current VDS = –24 V, VGS = 0 V –1 µA

IGSSF Gate–Body Leakage, Forward VGS = –25 V, VDS = 0 V 100 nA

IGSSR Gate–Body Leakage, Reverse VGS = –25 V, VDS = 0 V –100 nA

On Characteristics (Note 2)

VGS(th) Gate Threshold Voltage VDS = VGS, ID = –250 µA –1 –1.6 –3 V

∆VGS(th)

∆TJ Gate Threshold Voltage

Temperature Coefficient ID = –250 µA, Referenced to 25°C

5 mV/°C

RDS(on) Static Drain–Source

On–Resistance VGS = –10 V, ID = –13 A

VGS = –4.5 V, ID = –11 A

VGS=–10 V, ID =–13 A, TJ=125°C

7.3

9.5

mΩ

ID(on) On–State Drain Current VGS = –10 V, VDS = –5 V –50 A

gFS Forward Transconductance VDS = –5 V, ID = –13 A 44 S

Dynamic Characteristics

Ciss Input Capacitance 3939 pF

Coss Output Capacitance 972 pF

Crss Reverse Transfer Capacitance

VDS = –15 V, V GS = 0 V,

f = 1.0 MHz 498 pF

Switching Characteristics (Note 2)

td(on) Turn–On Delay Time 19 34 ns

tr Turn–On Rise Time 10 20 ns

td(off) Turn–Off Delay Time 110 176 ns

tf Turn–Off Fall Time

VDD = –15 V, ID = –1 A,

VGS = –10 V, RGEN = 6 Ω

65 104 ns

Qg Total Gate Charge 71 100 nC

Qgs Gate–Source Charge 12 nC

Qgd Gate–Drain Charge

VDS = –15 V, ID = –13 A,

VGS = –10 V

15 nC

Drain–Source Diode Characteristics and Maximum Ratings

IS Maximum Continuous Drain–Source Diode Forward Current –2.1 A

VSD Drain–Source Diode Forward

Voltage VGS = 0 V, IS = –2.1 A (Note 2) –0.7 –1.2 V

Notes:

1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of

the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.

a) 50°C/W (10 sec)

62.5°C/W steady state

when mounted on a

1in2 pad of 2 oz

copper

b) 105°C/W when

mounted on a .04 in2

pad of 2 oz copper

c) 125°C/W when mounted on a

minimum pad.

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%

FDS6679

FDS6679 Rev C(W)

Typical Characteristics

00.5 11.5 2

-VDS , DRAIN TO SOURCE VOLTAGE (V)

-ID

, DRAIN CURRENT (A)

VGS = -10V

-2.5V

-3.0V

-3.5V

-4.0V

-4.5V

-6.0V

0.6

1.4

1.8

2.2

2.6

0 10 20 30 40 50

-ID

, DIRAIN CURRENT (A)

RDS(ON)

, NORMALIZED

DRAIN-SOURCE ON-RESISTANCE

VGS = -3.0V

-4.5V

-6.0V

-3.5V

-4.0V

-5.0V

-10V

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with

Drain Current and Gate Voltage.

0.6

0.8

1.2

1.4

1.6

-50 -25 0 25 50 75 100 125 150 175

, JUNCTION TEMPERATURE (oC)

RDS(ON)

, NORMALIZED

DRAIN-SOURCE ON-RESISTANCE

ID = -13A

VGS = -10V

0.01

0.02

0.03

0.04

22.5 33.5 44.5 5

-VGS, GATE TO SOURCE VOLTAGE (V)

RDS(ON)

, ON-RESISTANCE (OHM)

ID = -7.0A

TA = 125oC

TA = 25oC

Figure 3. On-Resistance Variation with

Temperature. Figure 4. On-Resistance Variation with

Gate-to-Source Voltage.

1.5 22.5 33.5

-VGS, GATE TO SOURCE VOLTAGE (V)

-ID

, DRAIN CURRENT (A)

TA = -125oC

25oC

-55oC

VDS = -5.0V

0.0001

0.001

0.01

0.1

100

00.2 0.4 0.6 0.8 11.2

-VSD , BODY DIODE FORWARD VOLTAGE (V)

-IS, REVERSE DRAIN CURRENT (A)

VGS = 0V

TA = 125oC

25oC

-55oC

Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation

with Source Current and Temperature.

FDS6679

FDS6679 Rev C(W)

Typical Characteristics

0 10 20 30 40 50 60 70 80

Qg, GATE CHARGE (nC)

-V GS, GATE-SOURCE VOLTAGE (V)

ID = -13A VDS = -5V -10V

-15V

1000

2000

3000

4000

5000

6000

0 5 10 15 20 25 30

-VDS

, DRAIN TO SOURCE VOLTAGE (V)

CAPACITANCE (pF)

ISS

COSS

CRSS

f = 1 MHz

VGS = 0 V

Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.

0.01

0.1

100

0.1 1 10 100

-VDS , DRAIN-SOURCE VOLTAGE (V)

-ID

, DRAIN CURRENT (A)

10s

1s 100ms

100

RDS(ON) LIMIT

VGS = -10V

SINGLE PULSE

RθJA = 125oC/W

TA = 25oC

10ms

1ms

0.001 0.01 0.1 1 10 100

t1, TIME (sec)

P(pk), PEAK TRANSIENT POWER (W)

SINGLE PULSE

RθJA = 125°C/W

TA = 25°C

Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum

Power Dissipation.

0.001

0.01

0.1

0.0001 0.001 0.01 0.1 110 100 1000

t1, TIME (sec)

r(t), NORMALIZED EFFECTIVE

TRANSIENT THERMAL RESISTANCE

RθJA(t) = r(t) + RθJA

RθJA = 125oC/W

TJ - TA = P * RθJA(t)

Duty Cycle, D = t1 / t2

P(pk)

t1t2

SINGLE PULSE

0.01

0.02

0.05

0.1

0.2

D = 0.5

Figure 11. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1c.

Transient thermal response will change depending on the circuit board design.

FDS6679

SOIC(8ld s) Packaging

Configuration: Figure 1.0

Components Leader Tape

1680mm minimum or

210 empty poc kets

Tr ailer Tape

640mm min imum or

80 empty poc kets

SOIC(8ld s) Tape Leader and Trailer

Configuration: Figure 2.0

Cover Tape

Carrier Tape

Note/Comments

Packaging Option

SOIC (8lds) Packaging Information

Standard

(no flow code) L86Z F011

Packaging type

Reel Size

TNR

13" Dia

Rail/Tube

TNR

13" Dia

Qty per Reel/Tube/Bag 2,500 95 4,000

Box Dimension (mm) 355x333x40 530x130x83 355x333x40

Max qty per Box 5,000 30,000 8,000

D84Z

TNR

7" Dia

500

193x183x80

2,000

Weig ht pe r un it (gm) 0.0774 0.0774 0.0774 0.0774

Weig ht pe r Reel (kg) 0.6060 -0.9696 0.1182

F63TNR Label sample

LOT: CBVK741B019

FSID: FDS9953A

D/C1: Z9842AB QTY1: SPEC REV:

SPEC:

QTY: 2500

D/C2: QTY2: CPN: N/F: F (F63TNR)3

852

NDS

9959

SOIC-8 Unit Orientation

852

NDS

9959

Pi n 1

Static Dissipative

Embossed Carrier Tape

F63TNR

Label

Antis tati c Cover Tape

Customized

Label

Packaging Description:

SOIC-8 parts are shipped in tape. The carrier tape is

made from a dissipative (carbon filled) polycarbonate

resin. The cover tape is a multilayer film (Heat Activated

Adhesive in nature) primarily composed of polyester film,

adhesive layer, sealant, and anti-static sprayed agent.

These reeled parts in standard option are shipped with

2,5 00 uni t s pe r 13" o r 33 0c m d ia met er re el . Th e re el s are

dark blue in color and is made of polystyrene plastic (anti-

static coated). Other option comes in 500 units per 7" or

177cm diameter reel. This and some other options are

further described in the Packaging Information table.

These full reels are individually barcode labeled and

placed inside a standard intermediate box (illustrated in

figure 1.0) made of recyclable corrugated brown paper.

One box contains two reels maximum. And these boxes

are placed inside a barcode labeled shipping box which

com e s in di ffe re nt s iz es depe ndin g on th e nu mbe r of part s

shipped.

852

NDS

9959

852

NDS

9959

852

NDS

9959

Embossed ESD Marking

ATTENTION

OBSERVE PRECAUTIONS

FOR HANDLING

ELECTROSTATIC

SENSITIVE

DEVICES

Embossed ESD Marking

ATTENTION

OBSERVE

FOR HANDLING

ELECTROSTATIC

SENSITIVE

DEVICES

ATTENTION

OBSERVE

FOR HANDLING

ELECTROSTATIC

SENSITIVE

DEVICES

ATTENTION

OBSERVE

FOR HANDLING

ATTENTION

OBSERVE

FOR HANDLING

ATTENTION

OBSERVE PRECAUTIONS

FOR HANDLING

ELECTROSTATIC

SENSITIVE

DEVICES

193mm x 183mm x 80mm

Pizza Box for Standard Option

Barcode

Label

Barcode

Label

Barcode Label

355mm x 333mm x 40mm

Intermediate container for 13” reel option

SOIC-8 Tape and Reel Data

January 2001, Rev. C

 1998 Fairchild Semiconductor Corporation

Dimensions are in millimeter

Pkg type

A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc

SOIC(8lds)

(12mm)

5.30

+/-0.10 6.50

+/-0.10 12.0

+/-0.3 1.55

+/-0.05 1.60

+/-0.10 1.75

+/-0.10 10.25

min 5.50

+/-0.05 8.0

+/-0.1 4.0

+/-0.1 2.1

+/-0.10

0.450

+/-

0.150

9.2

+/-0.3 0.06

+/-0.02

A0 D1

Dimensions are in inches and millimeters

Tape Siz e Reel

Option Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)

12m m 7" Dia 7.00

177.8 0.059

1.5 512 +0.020/-0.008

13 +0.5/-0.2 0.795

20.2 2.165

55 0.488 +0.078/-0.000

12.4 +2/0 0.724

18.4 0.469 – 0.606

11.9 – 15.4

12m m 13" Dia 13.00

330 0.059

1.5 512 +0.020/-0.008

13 +0.5/-0.2 0.795

20.2 7.00

178 0.488 +0.078/-0.000

12.4 +2/0 0.724

18.4 0.469 – 0.606

11.9 – 15.4

See detail AA

Dim A

max

13" Diameter Option

7" Diameter Option

Dim A

Max

See detail AA

W2 max Measured at Hub

W1 Measured at Hub

Dim N

Dim D

min

Dim C

B Min

DETAIL AA

Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481

rotational and lateral movement requirements (see sketches A, B, and C).

20 deg maximum component rotation

0.5mm

maximum

0.5mm

maximum

Sketch C (Top View)

Component lateral movement

Typical

component

cavity

center line

20 deg maximum

Typical

component

center line

Sketch B (Top View)

Component Rotation

Sketch A (Side or Front Sectional View)

Component Rotation

User Direction of Feed

SOIC(8ld s) Embossed Carrier Tape

Configuration: Figure 3.0

SOIC(8ld s) Reel Confi gu rat ion: Figure 4.0

SOIC-8 Tape and Reel Data, continued

January 2001, Rev. C

SOIC-8 (FS PKG Code S1)

1 : 1

Scale 1:1 on letter size paper

D i m ens ion s sh own belo w are i n:

inches [m illimet ers ]

Part Weight per unit (gram): 0.0774

SOIC-8 Package Dimensions

September 1998, Rev. A

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is

not intended to be an exhaustive list of all such trademarks.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF F AIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, or (c) whose

failure to perform when properly used in accordance

with instructions for use provided in the labeling, can be

reasonably expected to result in significant injury to the

user.

2. A critical component is any component of a life

support device or system whose failure to perform can

be reasonably expected to cause the failure of the life

support device or system, or to affect its safety or

effectiveness.

PRODUCT ST A TUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Formative or

In Design

First Production

Full Production

Not In Production

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN T O IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD

DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT

OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PA TENT

RIGHTS, NOR THE RIGHTS OF OTHERS.

OPTOPLANAR™

PACMAN™

POP™

PowerTrench

QFET™

QS™

QT Optoelectronics™

Quiet Series™

SILENT SWITCHER

SMART ST ART™

Stealth™

FAST

FASTr™

FRFET™

GlobalOptoisolator™

GTO™

HiSeC™

ISOPLANAR™

LittleFET™

MicroFET™

MICROWIRE™

OPTOLOGIC™

Rev. H2



ACEx™

Bottomless™

CoolFET™

CROSSVOLT™

DenseTrench™

DOME™

EcoSPARK™

E2CMOSTM

EnSignaTM

FACT™

F ACT Quiet Series™

SuperSOT™-3

SuperSOT™-6

SuperSOT™-8

SyncFET™

TinyLogic™

UHC™

UltraFET

VCX™

