HEXFET® Power MOSFET
S
D
G
V
DSS
40V
R
DS(on)
typ.
0.90m
Ω
max. 1.25m
Ω
I
D
(Silicon Limited)
400A
c
I
D
(Package Limited)
240A
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and
functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-
maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under
board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified.
GDS
Gate Drain Source
HEXFET® is a registered trademark of International Rectifier.
*Qualification standards can be found at http://www.irf.com/
Description
Specifically designed for Automotive applications, this
HEXFET® Power MOSFET utilizes the latest processing
techniques to achieve extremely low on-resistance per
silicon area. Additional features of this design are a 175°C
junction operating temperature, fast switching speed and
improved repetitive avalanche rating. These features
combine to make this design an extremely efficient and
reliable device for use in Automotive applications such as
Electric Power Steering, Battery Switch, SMPS and other
heavy loads.
Features
lAdvanced Process Technology
lUltra Low On-Resistance
l175°C Operating Temperature
lFast Switching
lRepetitive Avalanche Allowed up to Tjmax
lLead-Free, RoHS Compliant
l
Automotive Qualified *
Symbol
Parameter
Units
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
D
@ T
C
= 100°C
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V (Wire Bond Limited)
DM
Pulsed Drain Current
d
P
D
@T
C
= 25°C
Maximum Power Dissipation W
Linear Derating Factor W/°C
V
GS
Gate-to-Source Voltage V
E
AS
Single Pulse Avalanche Energy (Thermally limited)
e
mJ
AR
Avalanche Current
d
A
E
AR
Repetitive Avalanche Energy
d
mJ
dv/dt Peak Diode Recovery
f
V/ns
T
J
Operating Junction and
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Thermal Resistance
Symbol Parameter Typ. Max. Units
R
θJC
Junction-to-Case
kl
––– 0.40 °C/W
R
θJA
Junction-to-Ambient (PCB Mount)
j
––– 40
380
2.0
290
See Fig. 14, 15, 22a, 22b
A
°C
300
-55 to + 175
± 20
2.5
Max.
400
c
280
c
1610
240
AUTOMOTIVE GRADE
AUIRFS3004-7P
1 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback March 4, 2015
D2Pak 7 Pin
G
SS
D
SS
S
Standard Pack
Form Quantity
Tube 50 AUIRFS3004-7P
Tape and Reel Left 800 AUIRFS3004-7TRL
AUIRFS3004-7P D
2
Pak 7 Pin
Base part number Package Type Complete Part Number
2 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback March 4, 2015
AUIRFS3004-7P
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 240A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.01mH
RG = 25Ω, IAS = 240A, VGS =10V. Part not recommended for use
above this value .
S
D
G
ISD ≤ 240A, di/dt ≤ 740A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 400μs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C.
RθJC value shown is at time zero.
Static Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Symbol
Parameter
Min.
Typ.
Max.
Units
V
(BR)DSS
Drain-to-Source Breakdown Voltage
40
–––
–––
V
Δ
V
(BR)DSS
Δ
T
J
Breakdown Voltage Temp. Coefficient
–––
0.038
–––
V/°C
R
DS(on)
Static Drain-to-Source On-Resistance
–––
0.90
1.25
m
Ω
V
GS(th)
Gate Threshold Voltage
2.0
–––
4.0
V
gfs
Forward Transconductance
1300
–––
–––
S
R
G
Internal Gate Resistance
–––
2.0
–––
Ω
DSS
Drain-to-Source Leakage Current
–––
–––
20
μA
–––
–––
250
GSS
Gate-to-Source Forward Leakage
–––
–––
100
nA
Gate-to-Source Reverse Leakage
–––
–––
-100
Dynamic Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Symbol
Parameter
Min.
Typ.
Max.
Units
Q
g
Total Gate Charge
–––
160
240
nC
Q
gs
Gate-to-Source Charge
–––
42
–––
Q
gd
Gate-to-Drain ("Miller") Charge
–––
65
–––
Q
sync
Total Gate Charge Sync. (Q
g
- Q
gd
)
–––
95
–––
d(on)
Turn-On Delay Time
–––
23
–––
ns
r
Rise Time
–––
240
–––
d(off)
Turn-Off Delay Time
–––
91
–––
f
Fall Time
–––
160
–––
C
iss
Input Capacitance
–––
9130
–––
pF
C
oss
Output Capacitance
–––
2020
–––
C
rss
Reverse Transfer Capacitance
–––
990
–––
C
oss
eff. (ER)
Effective Output Capacitance (Energy Related)
i
–––
2590
–––
C
oss
eff. (TR)
Effective Output Capacitance (Time Related)
h
–––
2650
–––
Diode Characteristics
Symbol
Parameter
Min.
Typ.
Max.
Units
S
Continuous Source Current
–––
–––
400
c
A
(Body Diode)
SM
Pulsed Source Current
–––
–––
1610
A
(Body Diode)
d
V
SD
Diode Forward Voltage
–––
–––
1.3
V
rr
Reverse Recovery Time
–––
49
–––
ns
T
J
= 25°C
V
R
= 34V,
–––
51
–––
T
J
= 125°C
F
= 240A
Q
rr
Reverse Recovery Charge
–––
37
–––
nC
T
J
= 25°C
di/dt = 100A/μs
g
–––
41
–––
T
J
= 125°C
RRM
Reverse Recovery Current
–––
3.2
–––
A
T
J
= 25°C
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
I
D
= 240A
R
G
= 2.7
Ω
V
GS
= 10V
g
V
DD
= 26V
I
D
= 180A, V
DS
=0V, V
GS
= 10V
T
J
= 25°C, I
S
= 195A, V
GS
= 0V
g
integral reverse
p-n junction diode.
Conditions
V
GS
= 0V, I
D
= 250μA
Reference to 25°C, I
D
= 5mA
d
V
GS
= 10V, I
D
= 195A
g
V
DS
= V
GS
, I
D
= 250μA
V
DS
= 40V, V
GS
= 0V
V
DS
= 40V, V
GS
= 0V, T
J
= 125°C
MOSFET symbol
showing the
V
DS
=20V
Conditions
V
GS
= 10V
g
V
GS
= 0V
V
DS
= 25V
ƒ = 1.0 MHz, See Fig. 5
V
GS
= 0V, V
DS
= 0V to 32V
i
, See Fig. 11
V
GS
= 0V, V
DS
= 0V to 32V
h
V
DS
= 10V, I
D
= 195A
Conditions
I
D
= 180A
V
GS
= 20V
V
GS
= -20V
3 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback March 4, 2015
AUIRFS3004-7P
Qualification standards can be found at International Rectifiers web site: http://www.irf.com/
 Exceptions (if any) to AEC-Q101 requirements are noted in the qualification report.
 Highest passing voltage.
Qualification Information
†
D
2
PAK - 7 Pin MSL1
RoHS Compliant Yes
ESD
Machine Model Class M4 (+/- 800V)
†††
AEC-Q101-002
Human Body Model Class H3A (+/- 6000V)
†††
AEC-Q101-001
Qualification Level
Automotive
(per AEC-Q101)
††
Comments: This part number(s) passed Automotive qualification. IR’s
Industrial and Consumer qualification level is granted by extension of the
higher Automotive level.
Charged Device Model Class C5 (+/- 2000V)
†††
AEC-Q101-005
4 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback March 4, 2015
AUIRFS3004-7P
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature
Fig 2. Typical Output Characteristics
Fig 6. Typical Gate Charge vs. Gate-to-Source VoltageFig 5. Typical Capacitance vs. Drain-to-Source Voltage
0.1 110 100 1000
VDS, Drain-to-Source Voltage (V)
10
100
1000
ID, Drain-to-Source Current (A)
4.5V ≤60μs PULSE WIDTH
Tj = 175°C
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
0.1 110 100 1000
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
≤60μs PULSE WIDTH
Tj = 25°C
4.5V
345678
VGS, Gate-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
TJ = 25°C
TJ = 175°C
VDS = 25V
≤60μs PULSE WIDTH
-60 -40 -20 020 40 60 80 100120140160180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 195A
VGS = 10V
110 100
VDS, Drain-to-Source Voltage (V)
100
1000
10000
100000
C, Capacitance (pF)
VGS = 0V, f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0 50 100 150 200 250
QG, Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
VGS, Gate-to-Source Voltage (V)
VDS= 32V
VDS= 20V
ID= 180A
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AUIRFS3004-7P
Fig 8. Maximum Safe Operating Area
Fig 10. Drain-to-Source Breakdown Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 11. Typical COSS Stored Energy
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
0.0 0.5 1.0 1.5 2.0
VSD, Source-to-Drain Voltage (V)
0.1
1
10
100
1000
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 175°C
VGS = 0V
-60 -40 -20 020 40 60 80 100120140160180
TJ , Temperature ( °C )
40
42
44
46
48
50
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)
Id = 5mA
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
200
400
600
800
1000
1200
EAS , Single Pulse Avalanche Energy (mJ)
ID
TOP 44A
80A
BOTTOM 240A
-5 0 5 10 15 20 25 30 35 40 45
VDS, Drain-to-Source Voltage (V)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Energy (μJ)
0 1 10 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
10000
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
Tc = 25°C
Tj = 175°C
Single Pulse
100μsec
1msec
10msec
DC
25 50 75 100 125 150 175
TC , Case Temperature (°C)
0
60
120
180
240
300
360
420
ID, Drain Current (A)
Limited By Package
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AUIRFS3004-7P
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 14. Typical Avalanche Current vs.Pulsewidth
Fig 15. Maximum Avalanche Energy vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
Thermal Response ( Z thJC ) °C/W
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
τJ
τJ
τ1
τ1
τ2
τ2τ3
τ3
R1
R1R2
R2R3
R3
Ci i/Ri
Ci= τi/Ri
τ
τC
τ4
τ4
R4
R4Ri (°C/W) τi (sec)
0.00757 0.000006
0.06508 0.000064
0.18313 0.001511
0.14378 0.009800
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
1
10
100
1000
Avalanche Current (A)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
0.01
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
40
80
120
160
200
240
280
320
EAR , Avalanche Energy (mJ)
TOP Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 240A
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AUIRFS3004-7P
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
Fig. 19 - Typical Stored Charge vs. dif/dtFig. 18 - Typical Recovery Current vs. dif/dt
Fig. 20 - Typical Stored Charge vs. dif/dt
-75 -50 -25 025 50 75 100 125 150 175 200
TJ , Temperature ( °C )
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VGS(th), Gate threshold Voltage (V)
ID = 250μA
ID = 1.0mA
ID = 1.0A
100 200 300 400 500
diF /dt (A/μs)
2
3
4
5
6
7
8
9
10
IRRM (A)
IF = 96A
VR = 34V
TJ = 25°C
TJ = 125°C
100 200 300 400 500
diF /dt ( A/μs)
2
3
4
5
6
7
8
9
10
11
12
IRRM (A)
IF = 144A
VR = 34V
TJ = 25°C
TJ = 125°C
100 200 300 400 500
diF /dt (A/μs)
20
40
60
80
100
120
140
QRR (nC)
IF = 96A
VR = 34V
TJ = 25°C
TJ = 125°C
100 200 300 400 500
diF /dt ( A/μs)
20
40
60
80
100
120
140
160
180
QRR (nC)
IF = 144A
VR = 34V
TJ = 25°C
TJ = 125°C
8 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback March 4, 2015
AUIRFS3004-7P
Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
Inductor Current
D.U.T. VDS
ID
IG
3mA
VGS
.3μF
50KΩ
.2μF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
VDS
90%
10%
VGS
t
d(on)
t
r
t
d(off)
t
f
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-
VDD
VGS
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AUIRFS3004-7P
D2Pak - 7 Pin Package Outline
Dimensions are shown in millimeters (inches)
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback March 4, 2015
AUIRFS3004-7P
D2Pak - 7 Pin Part Marking Information
D2Pak - 7 Pin Tape and Reel
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
AUFS3004-7P
YWWA
XX or XX
Date Code
Y= Year
WW= Work Week
A= Automotive, LeadFree
Part Number
IR Logo
Lot Code
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AUIRFS3004-7P
IMPORTANT NOTICE
Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries (IR) reserve the right to make
corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or
services without notice. Part numbers designated with the “AU” prefix follow automotive industry and / or customer specific requirements with regards
to product discontinuance and process change notification. All products are sold subject to IR’s terms and conditions of sale supplied at the time of order
acknowledgment.
IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with IR’s standard warranty. Testing
and other quality control techniques are used to the extent IR deems necessary to support this warranty. Except where mandated by government
requirements, testing of all parameters of each product is not necessarily performed.
IR assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using IR
components. To minimize the risks with customer products and applications, customers should provide adequate design and operating safeguards.
Reproduction of IR information in IR data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all
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such statements.
IR products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or in other applications
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For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
101 N. Sepulveda Blvd., El Segundo, California 90245
Tel: (310) 252-7105
12 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback March 4, 2015
AUIRFS3004-7P
Date Comments
• Updated datasheet based on new IR corporate template .
• Updated part marking from "AUS3004-7P" to "AUFS3004-7P" on page 10.
Revision History
3/4/2015